--- zzzz-none-000/linux-5.4.213/drivers/cpufreq/qcom-cpufreq-nvmem.c 2022-09-15 10:04:56.000000000 +0000 +++ miami-7690-761/linux-5.4.213/drivers/cpufreq/qcom-cpufreq-nvmem.c 2024-05-29 11:19:50.000000000 +0000 @@ -36,11 +36,31 @@ APQ8096V3 = 0x123ul, MSM8996SG = 0x131ul, APQ8096SG = 0x138ul, + IPQ5332V1 = 0x250ul, + IPQ5322V1 = 0x251ul, + IPQ5312V1 = 0x252ul, + IPQ5302V1 = 0x253ul, + IPQ5300V1 = 0x270ul, + IPQ6018V1 = 0x192ul, + IPQ6028V1 = 0x193ul, + IPQ6000V1 = 0x1a5ul, + IPQ6010V1 = 0x1a6ul, + IPQ6005V1 = 0x1c5ul, + IPQ9574V1 = 0x202ul, + IPQ9570V1 = 0x201ul, + IPQ9554V1 = 0x200ul, + IPQ9550V1 = 0x1fful, + IPQ9514V1 = 0x1feul, + IPQ9510V1 = 0x209ul, }; enum _msm8996_version { MSM8996_V3, MSM8996_SG, + IPQ53XX_V1, + IPQ60XX_V1, + IPQ6000_V1, + IPQ95XX_V1, NUM_OF_MSM8996_VERSIONS, }; @@ -84,6 +104,30 @@ case APQ8096SG: version = MSM8996_SG; break; + case IPQ5332V1: + case IPQ5322V1: + case IPQ5312V1: + case IPQ5302V1: + case IPQ5300V1: + version = IPQ53XX_V1; + break; + case IPQ6018V1: + case IPQ6028V1: + case IPQ6010V1: + case IPQ6005V1: + version = IPQ60XX_V1; + break; + case IPQ6000V1: + version = IPQ6000_V1; + break; + case IPQ9574V1: + case IPQ9570V1: + case IPQ9554V1: + case IPQ9550V1: + case IPQ9514V1: + case IPQ9510V1: + version = IPQ95XX_V1; + break; default: version = NUM_OF_MSM8996_VERSIONS; } @@ -116,6 +160,46 @@ case MSM8996_SG: drv->versions = 1 << ((unsigned int)(*speedbin) + 4); break; + case IPQ53XX_V1: + /* Fuse Value Freq BIT to set + * --------------------------------- + * 2’b00 No Limit BIT(0) + * 2’b01 1.5 GHz BIT(1) + * 2’b10 1.2 Ghz BIT(2) + * 2’b11 1.0 GHz BIT(3) + */ + drv->versions = 1 << (unsigned int)(*speedbin); + break; + case IPQ95XX_V1: + /* Fuse Value Freq BIT to set + * --------------------------------- + * 2’b00 No Limit BIT(0) + * 2’b10 1.8 GHz BIT(1) + * 2’b01 1.5 Ghz BIT(2) + * 2’b11 1.2 GHz BIT(3) */ + if ((unsigned int)(*speedbin) == 2) + drv->versions = BIT(1); + else if ((unsigned int)(*speedbin) == 1) + drv->versions = BIT(2); + else + drv->versions = 1 << (unsigned int)(*speedbin); + break; + case IPQ60XX_V1: + /* Fuse Value Freq BIT to set + * --------------------------------- + * 2’b0 No Limit BIT(0) + * 2’b1 1.5 GHz BIT(1) + */ + drv->versions = 1 << (unsigned int)(*speedbin); + break; + case IPQ6000_V1: + /** + * IPQ60xx family of SoCs has only one bit in QFPROM to + * limit the CPU frequency to 1.5GHz. IPQ6000 variant + * is limited to 1.2GHz. So lets hard code the value. + */ + drv->versions = BIT(2); + break; default: BUG(); break; @@ -153,7 +237,9 @@ if (!np) return -ENOENT; - ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu"); + ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu") || + of_device_is_compatible(np, "operating-points-v2-ipq5332") || + of_device_is_compatible(np, "operating-points-v2-ipq6018"); if (!ret) { of_node_put(np); return -ENOENT; @@ -303,6 +389,9 @@ { .compatible = "qcom,apq8096", .data = &match_data_kryo }, { .compatible = "qcom,msm8996", .data = &match_data_kryo }, { .compatible = "qcom,qcs404", .data = &match_data_qcs404 }, + { .compatible = "qcom,ipq5332", .data = &match_data_kryo }, + { .compatible = "qcom,ipq6018", .data = &match_data_kryo }, + { .compatible = "qcom,ipq9574", .data = &match_data_kryo }, {}, }; MODULE_DEVICE_TABLE(of, qcom_cpufreq_match_list);