--- zzzz-none-000/linux-5.4.213/drivers/soc/qcom/socinfo.c 2022-09-15 10:04:56.000000000 +0000 +++ miami-7690-761/linux-5.4.213/drivers/soc/qcom/socinfo.c 2024-05-29 11:20:02.000000000 +0000 @@ -14,6 +14,8 @@ #include #include #include +#include +#include /* * SoC version type with major number in the upper 16 bits and minor @@ -25,6 +27,7 @@ #define SMEM_SOCINFO_BUILD_ID_LENGTH 32 +#define OEMID_REG 0xA6080 /* * SMEM item id, used to acquire handles to respective * SMEM region. @@ -198,6 +201,44 @@ { 310, "MSM8996AU" }, { 311, "APQ8096AU" }, { 312, "APQ8096SG" }, + { CPU_IPQ8074, "IPQ8074" }, + { CPU_IPQ8072, "IPQ8072" }, + { CPU_IPQ8076, "IPQ8076" }, + { CPU_IPQ8078, "IPQ8078" }, + { CPU_IPQ8070, "IPQ8070" }, + { CPU_IPQ8071, "IPQ8071" }, + { CPU_IPQ8072A, "IPQ8072A" }, + { CPU_IPQ8074A, "IPQ8074A" }, + { CPU_IPQ8076A, "IPQ8076A" }, + { CPU_IPQ8078A, "IPQ8078A" }, + { CPU_IPQ8070A, "IPQ8070A" }, + { CPU_IPQ8071A, "IPQ8071A" }, + { CPU_IPQ8172, "IPQ8172" }, + { CPU_IPQ8173, "IPQ8173" }, + { CPU_IPQ8174, "IPQ8174" }, + { CPU_IPQ6018, "IPQ6018" }, + { CPU_IPQ6028, "IPQ6028" }, + { CPU_IPQ6000, "IPQ6000" }, + { CPU_IPQ6010, "IPQ6010" }, + { CPU_IPQ6005, "IPQ6005" }, + { CPU_IPQ5010, "IPQ5010" }, + { CPU_IPQ5018, "IPQ5018" }, + { CPU_IPQ5028, "IPQ5028" }, + { CPU_IPQ5000, "IPQ5000" }, + { CPU_IPQ5016, "IPQ5016" }, + { CPU_IPQ0509, "IPQ0509" }, + { CPU_IPQ0518, "IPQ0518" }, + { CPU_IPQ9514, "IPQ9514" }, + { CPU_IPQ9554, "IPQ9554" }, + { CPU_IPQ9570, "IPQ9570" }, + { CPU_IPQ9574, "IPQ9574" }, + { CPU_IPQ9550, "IPQ9550" }, + { CPU_IPQ9510, "IPQ9510" }, + { CPU_IPQ5332, "IPQ5332" }, + { CPU_IPQ5322, "IPQ5322" }, + { CPU_IPQ5312, "IPQ5312" }, + { CPU_IPQ5302, "IPQ5302" }, + { CPU_IPQ5300, "IPQ5300" }, }; static const char *socinfo_machine(struct device *dev, unsigned int id) @@ -266,6 +307,20 @@ return 0; } +static void qcom_get_oemid(__le32 *oemid, __le32 *prodid) +{ + void __iomem *oem_id_reg; + u32 value; + + oem_id_reg = ioremap(OEMID_REG, 4); + value = readl(oem_id_reg); + /* The upper 16 bits hold the OEM ID and lower 16 bits hold the OEM PRODUCT ID */ + *oemid = (__le32)(value >> 16); + *prodid = (__le32)(value & 0xffff); + + iounmap(oem_id_reg); +} + QCOM_OPEN(build_id, qcom_show_build_id); QCOM_OPEN(pmic_model, qcom_show_pmic_model); QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision); @@ -413,9 +468,13 @@ struct qcom_socinfo *qs; struct socinfo *info; size_t item_size; + __le32 oem_id, prod_id; info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, &item_size); + + qcom_get_oemid(&oem_id, &prod_id); + if (IS_ERR(info)) { dev_err(&pdev->dev, "Couldn't find socinfo\n"); return PTR_ERR(info); @@ -425,7 +484,7 @@ if (!qs) return -ENOMEM; - qs->attr.family = "Snapdragon"; + qs->attr.family = "IPQ"; qs->attr.machine = socinfo_machine(&pdev->dev, le32_to_cpu(info->id)); qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u", @@ -438,10 +497,20 @@ "%u", le32_to_cpu(info->serial_num)); + qs->attr.oem_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, + "%u", + le32_to_cpu(oem_id)); + qs->attr.prod_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, + "%u", + le32_to_cpu(prod_id)); qs->soc_dev = soc_device_register(&qs->attr); if (IS_ERR(qs->soc_dev)) return PTR_ERR(qs->soc_dev); + pr_info("CPU: %s, SoC Version: %s\n", qs->attr.machine, + qs->attr.revision); + pr_info("OEM_ID: %s, PROD_ID: %s\n", qs->attr.oem_id, + qs->attr.prod_id); socinfo_debugfs_init(qs, info); /* Feed the soc specific unique data into entropy pool */