// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)

/dts-v1/;

#ifdef __IPQ_MEM_PROFILE_512_MB__
#include "ipq5332-512MB-memory.dtsi"
#else
#include "ipq5332-default-memory.dtsi"
#endif
#include "ipq5332-avm-common.dtsi"

/ {
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	model = "FRITZ!Eval Miami Speedboard";

	aliases {
		ethernet0 = "/soc/dp1";
		ethernet1 = "/soc/dp2";
	};

	avm-hui {
		compatible = "avm,hui";
		pinctrl-0 = <&avm_led_pins>;
		pinctrl-names = "default";
		status = "ok";

		dim_leds: dim-leds {
			brightness-range = <0>, <255>;
			compatible = "avm,hui-generic-led-pwm";
			led-type = "default-on";
			/* GPIO 29 is channel 3 */
			pwms = <&pwm 3 1000000>;
			dimmable;
		};

		box-power@0 {
			compatible = "avm,hui-generic-led-gpio";
			gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
			location = <1>;
		};

		box-wlan@0 {
			compatible = "avm,hui-generic-led-gpio";
			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
			location = <2>;
		};

		box-fon-dect@0 {
			compatible = "avm,hui-generic-led-gpio";
			gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
			location = <3>;
		};

		connect@0 {
			compatible = "avm,hui-generic-led-gpio";
			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
			location = <4>;
		};

		box_info: info {
			compatible = "avm,hui-generic-led-gpio";
			gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>,
					<&tlmm 2 GPIO_ACTIVE_HIGH>;
			location = <5>;
			colors {
					normal = <0x00>, <0xFF>, <0x00>;
					error  = <0xFF>, <0x00>, <0x00>;
			};
		};

		box-wlan@1 {
			compatible = "avm,hui-generic-button-gpio";
			gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
		};

		box-fon@1 {
			compatible = "avm,hui-generic-button-gpio";
			gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
		};

		box-connect@1 {
			compatible = "avm,hui-generic-button-gpio";
			gpios = <&tlmm 23 GPIO_ACTIVE_LOW>;
		};
	};

	soc {
		pinctrl@1000000 {
			usb_pw_en_pins: usb_pwr_en_pinmux {
				pins = "gpio49";
				function = "gpio";
				drive-strength = <8>;
				bias-disable;
				output-low;
			};

			/* This is an MDIO where the Miami is slave */
			mdio0_pins: mdio0_pinmux {
				mux_0 {
					pins = "gpio25";
					function = "mdc0";
					drive-strength = <2>;
					bias-pull-up;
				};
				mux_1 {
					pins = "gpio26";
					function = "mdio0";
					drive-strength = <2>;
					bias-pull-up;
				};
			};

			mdio1_pins: mdio_pinmux {
				mux_0 {
					pins = "gpio27";
					function = "mdc1";
					drive-strength = <8>;
					bias-disable;
				};
				mux_1 {
					pins = "gpio28";
					function = "mdio1";
					drive-strength = <8>;
					bias-pull-up;
				};
			};

			avm_led_pins: avm_led_pins {
				mux {
					pins = "gpio0", "gpio2", "gpio3", "gpio4", "gpio6", "gpio7", "gpio23", "gpio34", "gpio50";
					function = "gpio";
					drive-strength = <2>;
					bias-disable;
				};
			};

			avm_pwm_pins: avm_pwm_pins {
				mux {
					pins = "gpio29";
					function = "pwm1";
					drive-strength = <8>;
				};
			};
		};

		avm-usb-en-gpio {
			compatible = "avm,gpio-aggregator";
			pinctrl-0 = <&usb_pw_en_pins>;
			pinctrl-names = "default";

			gpios = <&tlmm 49 GPIO_ACTIVE_HIGH>;
			gpio-line-names = "usb-pwr-en";
		};


		/* USB */
		eud@78000 {
			status = "ok";
		};

		/* USB: disable USB3 SuperSpeed, otherwise pcie0 can not be used */
		usb3@8A00000 {
			status = "ok";
			qcom,select-utmi-as-pipe-clk;
			dwc3@8A00000 {
				/delete-property/ #phy-cells;
				/delete-property/ phys;
				/delete-property/ phy-names;
			};
		};

		/* USB */
		hs_m31phy_0: hs_m31phy@7b000 {
			status = "ok";
		};

		avm_mac_addr_maceth_1: dp1 {
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <2>;
			reg = <0x3a504000 0x4000>;
			qcom,mactype = <1>;
			local-mac-address = [000000000000];
			qcom,phy-mdio-addr = <0>;
			qcom,link-poll = <1>;
			phy-mode = "sgmii";
			devname = "eth1";
		};

		avm_mac_addr_maceth_0: dp2 {
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <1>;
			reg = <0x3a500000 0x4000>;
			qcom,mactype = <1>;
			local-mac-address = [000000000000];
			qcom,phy-mdio-addr = <8>;
			qcom,link-poll = <1>;
			phy-mode = "sgmii";
			devname = "eth0";
		};

		mdio:mdio@90000 {
			#address-cells = <1>;
			#size-cells = <0>;
			status = "ok";
			pinctrl-0 = <&mdio1_pins>;
			pinctrl-names = "default";
			/*gpio22 and gpio24 for aqr reset*/
			//phy-reset-gpio = <&tlmm 22 0 &tlmm 24 0>;

			phy0: ethernet-phy@0 {
				reg = <8>;
				compatible ="ethernet-phy-ieee802.3-c45";
			};
			phy1: ethernet-phy@1 {
				reg = <0>;
				compatible ="ethernet-phy-ieee802.3-c45";
			};
		};

		ess-instance {
			ess-switch@3a000000 {
				switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
				switch_lan_bmp = <0x2>; /* lan port bitmap */
				switch_wan_bmp = <0x4>; /* wan port bitmap */
				switch_mac_mode = <0xd>; /* mac mode for uniphy instance0*/
				switch_mac_mode1 = <0xd>; /* mac mode for uniphy instance1*/
				switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
				qcom,port_phyinfo {
					port@0 {
						port_id = <1>;
						phy_address = <8>;
						ethernet-phy-ieee802.3-c45;
					};
					port@1 {
						port_id = <2>;
						phy_address = <0>;
						ethernet-phy-ieee802.3-c45;
					};
				};
			};
		};

		/* EDMA host driver configuration for the board */
		edma@3ab00000 {
			qcom,txdesc-ring-start = <4>;		/* Tx desc ring start ID */
			qcom,txdesc-rings = <12>;		/* Total number of Tx desc rings to be provisioned */
			qcom,txcmpl-ring-start = <4>;		/* Tx complete ring start ID */
			qcom,txcmpl-rings = <12>;		/* Total number of Tx complete rings to be provisioned */
			qcom,rxfill-ring-start = <4>;		/* Rx fill ring start ID */
			qcom,rxfill-rings = <4>;		/* Total number of Rx fill rings to be provisioned */
			qcom,rxdesc-ring-start = <12>;		/* Rx desc ring start ID */
			qcom,rxdesc-rings = <4>;		/* Total number of Rx desc rings to be provisioned */
			qcom,rx-page-mode = <0>;		/* Rx fill ring page mode */
			qcom,tx-map-priority-level = <1>;	/* Tx priority level per port */
			qcom,rx-map-priority-level = <1>;	/* Rx priority level per core */
			qcom,ppeds-num = <2>;			/* Number of PPEDS nodes */
			/* PPE-DS node format: <Rx-fill Tx-cmpl Rx Tx Queue-base Queue-count> */
			qcom,ppeds-map = <1 1 1 1 32 8>,	/* PPEDS Node#0 ring and queue map */
					<2 2 2 2 40 8>;		/* PPEDS Node#1 ring and queue map */
			qcom,txdesc-map = <8 9 10 11>,		/* Port0 per-core Tx ring map */
					  <12 13 14 15>,	/* MHT-Port1 per-core Tx ring map */
					  <4 5 6 7>,            /* MHT-Port2 per-core Tx ring map/packets from  vp*/
					  <16 17 18 19>,        /* MHT-Port3 per-core Tx ring map */
					  <20 21 22 23>;        /* MHT-Port4 per-core Tx ring map */
			qcom,txdesc-fc-grp-map = <1 2>;		/* Per GMAC flow control group map */
			qcom,rxfill-map = <4 5 6 7>;		/* Per-core Rx fill ring map */
			qcom,rxdesc-map = <12 13 14 15>;	/* Per-core Rx desc ring map */
			qcom,rx-queue-start = <0>;		/* Rx queue start */
			qcom,rx-ring-queue-map = <0 8 16 24>,	/* Priority 0 queues per-core Rx ring map */
						<1 9 17 25>,	/* Priority 1 queues per-core Rx ring map */
						<2 10 18 26>,	/* Priority 2 queues per-core Rx ring map */
						<3 11 19 27>,	/* Priority 3 queues per-core Rx ring map */
						<4 12 20 28>,	/* Priority 4 queues per-core Rx ring map */
						<5 13 21 29>,	/* Priority 5 queues per-core Rx ring map */
						<6 14 22 30>,	/* Priority 6 queues per-core Rx ring map */
						<7 15 23 31>;	/* Priority 7 queues per-core Rx ring map */
			interrupts = <0 163 4>,			/* Tx complete ring id #4 IRQ info */
				   <0 164 4>,			/* Tx complete ring id #5 IRQ info */
				   <0 165 4>,			/* Tx complete ring id #6 IRQ info */
				   <0 166 4>,			/* Tx complete ring id #7 IRQ info */
				   <0 167 4>,			/* Tx complete ring id #8 IRQ info */
				   <0 168 4>,			/* Tx complete ring id #9 IRQ info */
				   <0 169 4>,			/* Tx complete ring id #10 IRQ info */
				   <0 170 4>,			/* Tx complete ring id #11 IRQ info */
				   <0 171 4>,			/* Tx complete ring id #12 IRQ info */
				   <0 172 4>,			/* Tx complete ring id #13 IRQ info */
				   <0 173 4>,			/* Tx complete ring id #14 IRQ info */
				   <0 174 4>,			/* Tx complete ring id #15 IRQ info */
				   <0 139 4>,			/* Rx desc ring id #12 IRQ info */
				   <0 140 4>,			/* Rx desc ring id #13 IRQ info */
				   <0 141 4>,			/* Rx desc ring id #14 IRQ info */
				   <0 142 4>,			/* Rx desc ring id #15 IRQ info */
				   <0 191 4>,			/* Misc error IRQ info */
				<0 160 4>,			/* PPEDS Node #1(TxComp ring id #1) TxComplete IRQ info */
				<0 128 4>,			/* PPEDS Node #1(Rx Desc ring id #1) Rx Desc IRQ info */
				<0 152 4>,			/* PPEDS Node #1(RxFill Desc ring id #1) Rx Fill IRQ info */
				<0 161 4>,			/* PPEDS Node #2(TxComp ring id #2) TxComplete IRQ info */
				<0 129 4>,			/* PPEDS Node #2(Rx Desc ring id #2) Rx Desc IRQ info */
				<0 153 4>;			/* PPEDS Node #2(RxFill Desc ring id #2) Rx Fill IRQ info */
		};
	};
};

&pwm {
	pinctrl-0 = <&avm_pwm_pins>;
	used-pwm-indices = <0>, <0>, <0>, <1>;
	pinctrl-names = "default";
	#pwm-cells = <2>;
	status = "ok";
};

/* internal wifi: disabled */
&wifi0 {
	status = "disabled";
};
&q6_region {
	status = "disabled";
};
&m3_dump {
	status = "disabled";
};
&q6_etr_region {
	status = "disabled";
};
&q6_caldb_region {
	status = "disabled";
};

/* Remove unused avm special mac address definitions */
/delete-node/ &avm_mac_addr_macrouter_3;