--- zzzz-none-000/linux-5.4.213/drivers/clk/qcom/clk-rcg.h	2022-09-15 10:04:56.000000000 +0000
+++ alder-5690pro-762/linux-5.4.213/drivers/clk/qcom/clk-rcg.h	2024-08-14 09:01:37.000000000 +0000
@@ -135,6 +135,7 @@
  * @mnd_width: number of bits in m/n/d values
  * @hid_width: number of bits in half integer divider
  * @safe_src_index: safe src index value
+ * @flags: RCG2 specific clock flags
  * @parent_map: map from software's parent index to hardware's src_sel field
  * @freq_tbl: frequency table
  * @clkr: regmap clock handle
@@ -145,6 +146,9 @@
 	u8			mnd_width;
 	u8			hid_width;
 	u8			safe_src_index;
+
+#define CLK_RCG2_HW_CONTROLLED		BIT(0)
+	u8			flags;
 	const struct parent_map	*parent_map;
 	const struct freq_tbl	*freq_tbl;
 	struct clk_regmap	clkr;