--- zzzz-none-000/linux-2.6.32.61/drivers/usb/host/xhci.h	2013-06-10 09:43:48.000000000 +0000
+++ ar9-7330-650/linux-2.6.32.61/drivers/usb/host/xhci.h	2014-10-29 15:55:54.000000000 +0000
@@ -20,16 +20,54 @@
  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
+/* -- 20140828 AVM/WK some XHCI reset patches from newer kernel --*/
 #ifndef __LINUX_XHCI_HCD_H
 #define __LINUX_XHCI_HCD_H
 
+#include <linux/version.h>
 #include <linux/usb.h>
 #include <linux/timer.h>
 #include <linux/kernel.h>
 
 #include "../core/hcd.h"
+
+static inline __u16 SWAP16(__u16 val)
+{
+	__u16 ret;
+	ret =
+		((val&0xFF00)>>8 ) |
+		((val&0x00FF)<<8 ) ;
+	return ret;
+}
+static inline __u32 SWAP32(__u32 val)
+{
+	__u32 ret;
+	ret =
+		((val&0xFF000000)>>24) |
+		((val&0x00FF0000)>>8 ) |
+		((val&0x0000FF00)<<8 ) |
+		((val&0x000000FF)<<24) ;
+	return ret;
+}
+
+static inline __u64 SWAP64(__u64 val)
+{
+	__u64 valt,ret;
+	__u32 *reth,*retl,*valh,*vall;
+	valt=val;
+	vall=((__u32 *)(&valt))+0;
+	valh=((__u32 *)(&valt))+1;
+	retl=((__u32 *)(&ret))+1;
+	reth=((__u32 *)(&ret))+0;
+
+	(*retl) = SWAP32(*vall);
+	(*reth) = SWAP32(*valh);
+	return ret;
+}
+
 /* Code sharing between pci-quirks and xhci hcd */
 #include	"xhci-ext-caps.h"
+#include	"xhci-fwdload.h"
 
 /* xHCI PCI Configuration Registers */
 #define XHCI_SBRN_OFFSET	(0x60)
@@ -117,7 +155,7 @@
 /* true: no secondary Stream ID Support */
 #define HCC_NSS(p)		((p) & (1 << 7))
 /* Max size for Primary Stream Arrays - 2^(n+1), where n is bits 12:15 */
-#define HCC_MAX_PSA		(1 << ((((p) >> 12) & 0xf) + 1))
+#define HCC_MAX_PSA(p)		(1 << ((((p) >> 12) & 0xf) + 1))
 /* Extended Capabilities pointer from PCI base - section 5.3.6 */
 #define HCC_EXT_CAPS(p)		XHCI_HCC_EXT_CAPS(p)
 
@@ -609,11 +647,10 @@
 #define MAX_PACKET_MASK		(0xffff << 16)
 #define MAX_PACKET_DECODED(p)	(((p) >> 16) & 0xffff)
 
-/* tx_info bitmasks */
-#define AVG_TRB_LENGTH_FOR_EP(p)	((p) & 0xffff)
-#define MAX_ESIT_PAYLOAD_FOR_EP(p)	(((p) & 0xffff) << 16)
-
-
+ /* tx_info bitmasks */
+ #define AVG_TRB_LENGTH_FOR_EP(p)        ((p) & 0xffff)
+ #define MAX_ESIT_PAYLOAD_FOR_EP(p)      (((p) & 0xffff) << 16)
+ 
 /**
  * struct xhci_input_control_context
  * Input control context; see section 6.2.5.
@@ -1094,6 +1131,11 @@
 	unsigned int		quirks;
 #define	XHCI_LINK_TRB_QUIRK	(1 << 0)
 #define XHCI_RESET_EP_QUIRK	(1 << 1)
+
+#ifdef XHCI_FWDOWNLOAD_72020x
+    struct firmware *firmware_pointer;
+#endif
+
 };
 
 /* For testing purposes */
@@ -1130,15 +1172,12 @@
 static inline unsigned int xhci_readl(const struct xhci_hcd *xhci,
 		__u32 __iomem *regs)
 {
-	return readl(regs);
+	return SWAP32(readl(regs));
 }
 static inline void xhci_writel(struct xhci_hcd *xhci,
 		const unsigned int val, __u32 __iomem *regs)
 {
-	xhci_dbg(xhci,
-			"`MEM_WRITE_DWORD(3'b000, 32'h%p, 32'h%0x, 4'hf);\n",
-			regs, val);
-	writel(val, regs);
+	writel(SWAP32(val), regs);
 }
 
 /*
@@ -1154,8 +1193,8 @@
 		__u64 __iomem *regs)
 {
 	__u32 __iomem *ptr = (__u32 __iomem *) regs;
-	u64 val_lo = readl(ptr);
-	u64 val_hi = readl(ptr + 1);
+	u64 val_lo = xhci_readl(xhci,(ptr+0));
+	u64 val_hi = xhci_readl(xhci,(ptr+1));
 	return val_lo + (val_hi << 32);
 }
 static inline void xhci_write_64(struct xhci_hcd *xhci,
@@ -1165,11 +1204,8 @@
 	u32 val_lo = lower_32_bits(val);
 	u32 val_hi = upper_32_bits(val);
 
-	xhci_dbg(xhci,
-			"`MEM_WRITE_DWORD(3'b000, 64'h%p, 64'h%0lx, 4'hf);\n",
-			regs, (long unsigned int) val);
-	writel(val_lo, ptr);
-	writel(val_hi, ptr + 1);
+	xhci_writel(xhci,val_lo, (ptr+0));
+	xhci_writel(xhci,val_hi, (ptr+1));
 }
 
 static inline int xhci_link_trb_quirk(struct xhci_hcd *xhci)
@@ -1199,6 +1235,7 @@
 void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id);
 int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, struct usb_device *udev, gfp_t flags);
 int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev);
+void xhci_copy_ep0_dequeue_into_input_ctx(struct xhci_hcd *xhci, struct usb_device *udev);
 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc);
 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc);
 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index);
@@ -1245,6 +1282,7 @@
 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev, struct usb_host_endpoint *ep);
 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev, struct usb_host_endpoint *ep);
 void xhci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep);
+int xhci_reset_device(struct usb_hcd *hcd, struct usb_device *udev);
 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev);
 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev);
 
@@ -1271,6 +1309,7 @@
 		u32 slot_id);
 int xhci_queue_reset_ep(struct xhci_hcd *xhci, int slot_id,
 		unsigned int ep_index);
+int xhci_queue_reset_device(struct xhci_hcd *xhci, u32 slot_id);
 void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
 		unsigned int slot_id, unsigned int ep_index,
 		struct xhci_td *cur_td, struct xhci_dequeue_state *state);