/* * <:copyright-BRCM:2017:DUAL/GPL:standard * * Copyright (c) 2017 Broadcom * All Rights Reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as published by * the Free Software Foundation (the "GPL"). * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * * A copy of the GPL is available at http://www.broadcom.com/licenses/GPLv2.php, or by * writing to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, * Boston, MA 02111-1307, USA. * * :> */ #ifndef __BCM_UBUS4_H__ #define __BCM_UBUS4_H__ #include typedef struct ub_mst_addr_map_t { int port_id; unsigned long base; } ub_mst_addr_map_t; #if defined (CONFIG_BCM96858) || defined(_BCM96858_) #define UCB_NODE_ID_SLV_SYS 0 #define UCB_NODE_ID_MST_PCIE0 3 #define UCB_NODE_ID_SLV_PCIE0 4 #define UCB_NODE_ID_MST_PCIE2 5 #define UCB_NODE_ID_SLV_PCIE2 6 #define UCB_NODE_ID_MST_SATA UCB_NODE_ID_MST_PCIE2 #define UCB_NODE_ID_SLV_SATA UCB_NODE_ID_SLV_PCIE2 #define UCB_NODE_ID_MST_USB 14 #define UCB_NODE_ID_SLV_USB 15 #define UCB_NODE_ID_SLV_LPORT 19 #define UCB_NODE_ID_SLV_WAN 21 int ubus_master_set_rte_addr(int master_port_id, int port, int val); #endif #if defined(CONFIG_BCM96856) || defined(_BCM96856_) #define UCB_NODE_ID_SLV_SYS 0 #define UCB_NODE_ID_MST_PCIE0 3 #define UCB_NODE_ID_SLV_PCIE0 4 #define UCB_NODE_ID_MST_USB 14 #define UCB_NODE_ID_SLV_USB 15 #define UCB_NODE_ID_SLV_MEMC 16 #elif defined(CONFIG_BCM96846) || defined(_BCM96846_) #define UCB_NODE_ID_MST_PCIE0 3 #define UCB_NODE_ID_SLV_PCIE0 4 #define UCB_NODE_ID_MST_USB 14 #define UCB_NODE_ID_SLV_USB 15 #define UCB_NODE_ID_SLV_MEMC 16 #endif #if defined(CONFIG_BCM96846) || defined(_BCM96846_) || defined (CONFIG_BCM96856) || defined(_BCM96856_) || defined (CONFIG_BCM96855) || defined(_BCM96855_) extern unsigned int g_board_size_power_of_2; #endif #if defined (CONFIG_BCM963158) || defined(_BCM963158_) #define UBUS_MAX_PORT_NUM 32 #define UBUS_NUM_OF_MST_PORTS 17 #define UBUS_PORT_ID_LAST_SYSTOP 13 #define UBUS_PORT_ID_BIU 2 #define UBUS_PORT_ID_DMA0 24 #define UBUS_PORT_ID_DQM 23 #define UBUS_PORT_ID_DSLCPU 11 #define UBUS_PORT_ID_DSL 6 #define UBUS_PORT_ID_FPM 21 #define UBUS_PORT_ID_MEMC 1 #define UBUS_PORT_ID_NATC 26 #define UBUS_PORT_ID_PCIE0 8 #define UBUS_PORT_ID_PCIE2 9 #define UBUS_PORT_ID_PCIE3 10 #define UBUS_PORT_ID_PERDMA 7 #define UBUS_PORT_ID_PER 3 #define UBUS_PORT_ID_PMC 13 #define UBUS_PORT_ID_PSRAM 16 #define UBUS_PORT_ID_QM 22 #define UBUS_PORT_ID_RQ0 32 #define UBUS_PORT_ID_SPU 5 #define UBUS_PORT_ID_SWH 14 #define UBUS_PORT_ID_SYS 31 #define UBUS_PORT_ID_SYSXRDP 27 #define UBUS_PORT_ID_USB 4 #define UBUS_PORT_ID_VPB 20 #define UBUS_PORT_ID_WAN 12 #elif defined (CONFIG_BCM96858) || defined(_BCM96858_) #define UBUS_MAX_PORT_NUM 35 #define UBUS_NUM_OF_MST_PORTS 19 #define UBUS_PORT_ID_LAST_SYSTOP 15 #define UBUS_PORT_ID_MEMC 1 #define UBUS_PORT_ID_BIU 2 #define UBUS_PORT_ID_PER 3 #define UBUS_PORT_ID_USB 4 #define UBUS_PORT_ID_PERDMA 5 #define UBUS_PORT_ID_SPU 6 #define UBUS_PORT_ID_PCIE0 8 #define UBUS_PORT_ID_PCIE2 9 #define UBUS_PORT_ID_PMC 15 #define UBUS_PORT_ID_XRDP_VPB 20 #define UBUS_PORT_ID_QM 22 #define UBUS_PORT_ID_DQM 23 #define UBUS_PORT_ID_DMA0 24 #define UBUS_PORT_ID_DMA1 25 #define UBUS_PORT_ID_NATC 26 #define UBUS_PORT_ID_TOP_BUFF 28 #define UBUS_PORT_ID_XRDP_BUFF 29 #define UBUS_PORT_ID_RQ0 32 #define UBUS_PORT_ID_RQ1 33 #define UBUS_PORT_ID_RQ2 34 #define UBUS_PORT_ID_RQ3 35 #elif defined (CONFIG_BCM96846) || defined(_BCM96846_) #define UBUS_MAX_PORT_NUM 15 #define UBUS_NUM_OF_MST_PORTS 9 #define UBUS_PORT_ID_LAST_SYSTOP 7 #define UBUS_PORT_ID_MEMC 1 #define UBUS_PORT_ID_BIU 2 #define UBUS_PORT_ID_PER 3 #define UBUS_PORT_ID_USB 4 #define UBUS_PORT_ID_PCIE0 7 #define UBUS_PORT_ID_QM 11 #define UBUS_PORT_ID_DQM 12 #define UBUS_PORT_ID_DMA0 13 #define UBUS_PORT_ID_NATC 14 #define UBUS_PORT_ID_RQ0 15 #elif defined (CONFIG_BCM96878) || defined(_BCM96878_) #define UBUS_PORT_ID_MEMC 1 #define UBUS_MAX_PORT_NUM 14 #define UBUS_NUM_OF_MST_PORTS 8 #define UBUS_PORT_ID_LAST_SYSTOP 7 #define UBUS_PORT_ID_BIU 2 #define UBUS_PORT_ID_PER 3 #define UBUS_PORT_ID_USB 4 #define UBUS_PORT_ID_WIFI 6 #define UBUS_PORT_ID_PCIE0 7 #define UBUS_PORT_ID_QM 11 #define UBUS_PORT_ID_DMA0 13 #define UBUS_PORT_ID_RQ0 14 #define UBUS_PORT_ID_VPB 9 #elif defined (CONFIG_BCM96855) || defined(_BCM96855_) #define UBUS_PORT_ID_MEMC 1 #define UBUS_MAX_PORT_NUM 21 #define UBUS_NUM_OF_MST_PORTS 11 #define UBUS_PORT_ID_LAST_SYSTOP 12 #define UBUS_PORT_ID_BIU 2 #define UBUS_PORT_ID_PER 3 #define UBUS_PORT_ID_USB 4 #define UBUS_PORT_ID_PCIE0 10 #define UBUS_PORT_ID_WIFI 12 #define UBUS_PORT_ID_DMA0 16 #define UBUS_PORT_ID_DMA1 17 #define UBUS_PORT_ID_DMA2 18 #define UBUS_PORT_ID_QM 19 #define UBUS_PORT_ID_RQ0 20 #define UBUS_PORT_ID_RQ1 21 #elif defined (CONFIG_BCM963178) || defined(_BCM963178_) #define UBUS_MAX_PORT_NUM 11 #define UBUS_NUM_OF_MST_PORTS 9 #define UBUS_PORT_ID_LAST_SYSTOP 0 #define UBUS_PORT_ID_SYS 0 #define UBUS_PORT_ID_MEMC 1 #define UBUS_PORT_ID_BIU 2 #define UBUS_PORT_ID_PER 3 #define UBUS_PORT_ID_USB 4 #define UBUS_PORT_ID_DSL 5 #define UBUS_PORT_ID_DSLCPU 6 #define UBUS_PORT_ID_PMC 7 #define UBUS_PORT_ID_SWH 8 #define UBUS_PORT_ID_PCIE0 10 #define UBUS_PORT_ID_WIFI 12 #elif defined (CONFIG_BCM947622) || defined(_BCM947622_) #define UBUS_MAX_PORT_NUM 12 #define UBUS_NUM_OF_MST_PORTS 10 #define UBUS_PORT_ID_LAST_SYSTOP 0 #define UBUS_PORT_ID_SYS 0 #define UBUS_PORT_ID_MEMC 1 #define UBUS_PORT_ID_BIU 2 #define UBUS_PORT_ID_PER 3 #define UBUS_PORT_ID_USB 4 #define UBUS_PORT_ID_PMC 7 #define UBUS_PORT_ID_SYSPORT 8 #define UBUS_PORT_ID_SYSPORT1 9 #define UBUS_PORT_ID_PCIE0 10 #define UBUS_PORT_ID_SPU 11 #define UBUS_PORT_ID_WIFI 13 #define UBUS_PORT_ID_WIFI1 14 #elif defined (CONFIG_BCM96856) || defined(_BCM96856_) #define UBUS_MAX_PORT_NUM 19 #define UBUS_NUM_OF_MST_PORTS 12 #define UBUS_PORT_ID_LAST_SYSTOP 7 #define UBUS_PORT_ID_MEMC 1 #define UBUS_PORT_ID_BIU 2 #define UBUS_PORT_ID_PER 3 #define UBUS_PORT_ID_USB 4 #define UBUS_PORT_ID_PCIE2 6 #define UBUS_PORT_ID_PCIE0 7 #define UBUS_PORT_ID_QM 11 #define UBUS_PORT_ID_DQM 12 #define UBUS_PORT_ID_DMA0 13 #define UBUS_PORT_ID_NATC 14 #define UBUS_PORT_ID_DMA1 17 #define UBUS_PORT_ID_RQ0 18 #define UBUS_PORT_ID_RQ1 19 #endif #ifdef CONFIG_BCM_GLB_COHERENCY #define IS_DDR_COHERENT 1 #else #define IS_DDR_COHERENT 0 #endif #define DECODE_CFG_SIZE_MASK 0xff00 #define DECODE_CFG_SIZE_SHIFT 8 #define DECODE_CFG_ENABLE_MASK 0x60000 #define DECODE_CFG_ENABLE_SHIFT 17 #define DECODE_CFG_CACHE_BITS_MASK 0x380000 #define DECODE_CFG_CACHE_BITS_SHIFT 19 #define DECODE_CFG_CMD_DTA_MASK 0x10000 #define DECODE_CFG_CMD_DTA_SHIFT 16 #define DECODE_CFG_STRICT_MASK 0x400000 #define DECODE_CFG_STRICT_SHIFT 22 #define DECODE_CFG_PORT_ID_MASK 0xff #define DECODE_CFG_PORT_ID_SHIFT 0 #define DECODE_CFG_CTRL_CACHE_SEL_SHIFT 4 #define DECODE_CFG_CTRL_CACHE_SEL_MASK (0x3<> f##_SHIFT) typedef struct { uint32 base_addr; uint32 remap_addr; uint32 attributes; }DecodeCfgMstWndRegs; /* BIU Registers */ /* not relevant for 6846 platform but stil compile in pon stack */ #define NGPON2_IDX 0 typedef struct { uint32 ctrl; uint32 cache_cfg; uint32 reserved[2]; DecodeCfgMstWndRegs window[4]; } DecodeCfgRegs; #if defined(CONFIG_BCM963178) || defined(_BCM963178_) || defined(CONFIG_BCM947622) || defined(_BCM947622_) || defined(CONFIG_BCM96878) || defined(_BCM96878_) || defined(CONFIG_BCM96855) || defined(_BCM96855_) #define ROUTE_ADDR_SIZE 0x100 #define TOKEN_SIZE 0x100 #else #define ROUTE_ADDR_SIZE 0x80 #define TOKEN_SIZE 0x80 #endif typedef struct { uint32 port_cfg[8]; #define DCM_UBUS_CONGESTION_THRESHOLD 3 uint32 reserved1[56]; uint32 loopback[20]; uint32 reserved2[44]; uint32 routing_addr[ROUTE_ADDR_SIZE]; uint32 token[TOKEN_SIZE]; DecodeCfgRegs decode_cfg; } MstPortNode; typedef struct ubus_credit_cfg { int port_id; int credit; }ubus_credit_cfg_t; void ubus_master_port_init(void); void bcm_ubus_config(void); void ubus_cong_threshold_wr(int port_id, unsigned int val); int ubus_master_remap_port(int master_port_id); int log2_32 (unsigned int value); int ubus_master_set_token_credits(int master_port_id, int token, int credits); void ubus_deregister_port(int ucbid); void ubus_register_port(int ucbid); #if defined(CONFIG_BCM963158) || defined(CONFIG_BCM96858) void apply_ubus_credit_each_master(int master); #endif #if defined(_BCM96858_) void ubus_master_rte_cfg(void); #endif #if defined(CONFIG_BCM963178) void configure_ubus_sar_reg_decode(void); #endif #endif