#include "inc/68252R.dtsi" / { memory_controller { memcfg = <(BP_DDR_SPEED_1067_14_14_14 | \ BP_DDR_TOTAL_SIZE_512MB | \ BP_DDR_DEVICE_WIDTH_16 | \ BP_DDR_TOTAL_WIDTH_16BIT | \ BP_DDR_SSC_CONFIG_1)>; }; }; / { model = "968252XSV_252R"; buttons { compatible = "brcm,buttons"; reset_button { ext_irq = <&bca_extintr 14 BCA_GPIO_ACTIVE_LOW (BCA_EXTINTR_TYPE_LOW_LEVEL | BCA_EXTINTR_TYPE_SENSE_EDGE)>; press { print = "Button Press -- Hold for 5s to do restore to default"; }; hold { rst_to_dflt = <5>; }; release { reset = <0>; }; }; ses_button { ext_irq = <&bca_extintr 26 BCA_GPIO_ACTIVE_LOW (BCA_EXTINTR_TYPE_LOW_LEVEL | BCA_EXTINTR_TYPE_SENSE_EDGE)>; release { ses_short_period = <0>; ses_long_period = <3>; }; }; }; xfp_sfp: xfp_sfp { compatible = "brcm,sfp"; pinctrl-names = "default", "tx-sd"; pinctrl-0 = <&pon_lbe_p_pin_100>; pinctrl-1 = <&pon_lbe_p_pin_100 &rogue_onu_in_pin_29>; i2c-bus = <&mux1_i2c>; los-gpio = <&gpioc 12 GPIO_ACTIVE_HIGH>; tx-power-gpio = <&gpioc 13 GPIO_ACTIVE_HIGH>; }; wan_serdes { compatible = "brcm,pon-drv"; trx = <&xfp_sfp>; tx-polarity-invert; }; }; &i2c0 { i2cswitch { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; reg = <0x72>; mux1_i2c: i2c@1 { reg = <0x1>; }; }; }; &i2c0 { pinctrl-0 = <&i2c_scl_pin_77 &i2c_sda_pin_78>; pinctrl-names = "default"; status = "okay"; }; &nand { status = "okay"; }; &wdt { status = "okay"; }; &uart0 { status = "okay"; }; &uart1 { pinctrl-0 = <&c_uart1_sin_pin_30 &c_uart1_sout_pin_31>; pinctrl-names = "default"; status = "okay"; }; &hs_uart0 { pinctrl-0 = <&uart2_cts_pin_3 &uart2_rts_pin_4 &uart2_sin_pin_5 &uart2_sout_pin_6>; pinctrl-names = "default"; status = "okay"; }; &usb_ctrl { pinctrl-names = "default"; pinctrl-0 = <&usb0_pwr_pins &usb1_pwr_pins>; status = "okay"; }; &usb0_ehci { status = "okay"; }; &usb0_ohci { status = "okay"; }; &usb1_ehci { status = "okay"; }; &usb1_ohci { status = "okay"; }; &rgmii { rgmii-disabled; status = "okay"; }; &egphy { base-addr = <2>; }; &mdio { phy2:2 { status = "okay"; }; phy3:3 { status = "okay"; }; phy4:4 { status = "okay"; }; phy5:5 { status = "okay"; }; }; &switch0 { pinctrl-names = "default"; pinctrl-0 = <&per_mdc_pin_68 &per_mdio_pin_69>; ports { port0@0 { phy-handle = <&phy2>; status = "okay"; }; port1@1 { phy-handle = <&phy3>; status = "okay"; }; port2@2 { phy-handle = <&phy4>; status = "okay"; }; port3@3 { phy-handle = <&phy5>; status = "okay"; }; }; }; #if defined(CONFIG_BCM_PCIE_HCD) || defined(CONFIG_BCM_PCIE_HCD_MODULE) &pcie0 { brcm,dual-lane; status = "okay"; }; #endif &pincontroller { pinctrl-names = "default"; pinctrl-0 = <&c0_femctrl_0_pin_84 &c0_femctrl_1_pin_85 &c0_femctrl_2_pin_86 &c0_femctrl_3_pin_87 \ &c0_femctrl_4_pin_88 &c0_femctrl_5_pin_89 &c1_femctrl_0_pin_90 &c1_femctrl_1_pin_91 \ &c1_femctrl_2_pin_92 &c1_femctrl_3_pin_93 &c1_femctrl_4_pin_94 &c1_femctrl_5_pin_95 >; };