#include "inc/68552.dtsi"
#include "../bcm_voice.dtsi"

/ {
	memory_controller {
		memcfg = <(BP_DDR_SPEED_1067_14_14_14 | \
					BP_DDR_TOTAL_SIZE_1024MB  | \
					BP_DDR_DEVICE_WIDTH_16    | \
					BP_DDR_TOTAL_WIDTH_32BIT  | \
					BP_DDR_SSC_CONFIG_1)>;
	};
};

/ {
	model = "968550XSV";

    xfp_sfp: xfp_sfp {
        compatible = "brcm,sfp";
        pinctrl-names = "default", "tx-sd";
        pinctrl-0 = <&pon_lbe_p_pin_100>;
        pinctrl-1 = <&pon_lbe_p_pin_100 &rogue_onu_in_pin_29>;
        i2c-bus = <&mux1_i2c>;
        los-gpio = <&gpioc 12 GPIO_ACTIVE_HIGH>;
        tx-power-gpio = <&gpioc 13 GPIO_ACTIVE_HIGH>;
    };

    wan_serdes {
            compatible = "brcm,pon-drv";
            trx = <&xfp_sfp>;
            tx-polarity-invert;
    };
};

&i2c0 {
    i2cswitch {
        compatible = "nxp,pca9548";
        #address-cells = <1>;
        #size-cells = <0>;
        reg = <0x72>;

        mux1_i2c: i2c@1 {
            reg = <0x1>;
        };
    };
};

&i2c0 {
    pinctrl-0 = <&i2c_scl_pin_77 &i2c_sda_pin_78>;
    pinctrl-names = "default";
    status = "okay";
};

&i2c1 {
    status = "okay";
};

&nand {
	status = "okay";
};
&wdt {
	status = "okay";
};
&uart0 {
	status = "okay";
};
&uart1 {
    pinctrl-0 = <&c_uart1_sin_pin_30 &c_uart1_sout_pin_31>;
    pinctrl-names = "default";
    status = "okay";
};
&hs_uart0 {
    pinctrl-0 = <&uart2_cts_pin_3 &uart2_rts_pin_4 &uart2_sin_pin_5 &uart2_sout_pin_6>;
    pinctrl-names = "default";
    status = "okay";
};

&usb_ctrl {
    pinctrl-names = "default";
    pinctrl-0 = <&usb0_pwr_pins &usb1_pwr_pins>;
    xhci-enable;
    status = "okay";
};
&usb0_ehci {
    status = "okay";
};
&usb0_xhci {
    status = "okay";
};
&usb0_ohci {
    status = "okay";
};
&usb1_ehci {
    status = "okay";
};
&usb1_ohci {
    status = "okay";
};

&egphy {
        base-addr = <2>;
};

&rgmii {
        status = "okay";
};

&mdio {
        phy2:2 {
                status = "okay";
        };

        phy3:3 {
                status = "okay";
        };

        phy4:4 {
                status = "okay";
        };

        phy5:5 {
                status = "okay";
        };

        phy_rgmii: rgmii {
                reg = <1>;
                tx-delay;
                status = "okay";
        };

        phy_serdes: serdes {
                phy-handle = <&phy_ext_serdes>;
                status = "okay";
        };

        phy_ext_serdes: ext_serdes {
                reg = <0x1e>;
                enet-phy-lane-swap;
                caps-no-10000;
                caps-no-5000;
                status = "okay";
        };
};

&switch0 {
        pinctrl-names = "default", "rgmii1";
        pinctrl-0 = <&per_mdc_pin_68 &per_mdio_pin_69 &rgmii_pins>;
        pinctrl-1 = <&rgmii_pins>;

        ports {
                port0@0 {
                        phy-handle = <&phy2>;
                        status = "okay";
                };

                port1@1 {
                        phy-handle = <&phy3>;
                        status = "okay";
                };

                port2@2 {
                        phy-handle = <&phy4>;
                        status = "okay";
                };

                port3@3 {
                        phy-handle = <&phy5>;
                        status = "okay";
                };

                port4@4 {
                        mii-pinctrl-state = "rgmii1";
                        rgmii-1p8v;
                        tx-delay;
                        status = "okay";
                };

                port5@5 {
                        status = "okay";
                };
        };
};

#if defined(CONFIG_BCM_PCIE_HCD) || defined(CONFIG_BCM_PCIE_HCD_MODULE)
&pcie0 {
    status = "okay";
};
&pcie1 {
    status = "okay";
};
#endif

&bcm_voice{
	sliclist = SLICSLAC_LIST_COMMON_NOFXO;
};

&hsspi {
	status = "okay";
	voice0 {
		pinctrl-0 = <&spim_ss0_b_pin_75>;
		pinctrl-names = "default";
		compatible = "bcm-spi-voice";
		reg = <0>; 
		spi-max-frequency = <1024000>;
		reset-gpio = <&gpioc 15 GPIO_ACTIVE_LOW>;
		spi-index = <0>;
	};	
};