--- zzzz-none-000/linux-4.19.183/arch/arm64/include/asm/pgtable-hwdef.h	2021-03-24 10:07:39.000000000 +0000
+++ bcm63-7530ax-756/linux-4.19.183/arch/arm64/include/asm/pgtable-hwdef.h	2023-06-28 08:54:18.000000000 +0000
@@ -159,7 +159,11 @@
 #define PTE_TABLE_BIT		(_AT(pteval_t, 1) << 1)
 #define PTE_USER		(_AT(pteval_t, 1) << 6)		/* AP[1] */
 #define PTE_RDONLY		(_AT(pteval_t, 1) << 7)		/* AP[2] */
+#if defined(CONFIG_BCM_KF_GLB_COHERENCY) && defined(CONFIG_BCM_GLB_COHERENCY)
+#define PTE_SHARED		(_AT(pteval_t, 2) << 8)		/* SH[1:0], outer shareable */
+#else
 #define PTE_SHARED		(_AT(pteval_t, 3) << 8)		/* SH[1:0], inner shareable */
+#endif
 #define PTE_AF			(_AT(pteval_t, 1) << 10)	/* Access Flag */
 #define PTE_NG			(_AT(pteval_t, 1) << 11)	/* nG */
 #define PTE_DBM			(_AT(pteval_t, 1) << 51)	/* Dirty Bit Management */
@@ -266,11 +270,22 @@
 #define TCR_SH0_SHIFT		12
 #define TCR_SH0_MASK		(UL(3) << TCR_SH0_SHIFT)
 #define TCR_SH0_INNER		(UL(3) << TCR_SH0_SHIFT)
+#if defined(CONFIG_BCM_KF_GLB_COHERENCY) && defined(CONFIG_BCM_GLB_COHERENCY)
+#define TCR_SH0_OUTER		(UL(2) << TCR_SH0_SHIFT)
+#endif
 
 #define TCR_SH1_SHIFT		28
 #define TCR_SH1_MASK		(UL(3) << TCR_SH1_SHIFT)
 #define TCR_SH1_INNER		(UL(3) << TCR_SH1_SHIFT)
+#if defined(CONFIG_BCM_KF_GLB_COHERENCY) && defined(CONFIG_BCM_GLB_COHERENCY)
+#define TCR_SH1_OUTER		(UL(2) << TCR_SH1_SHIFT)
+#endif
+
+#if defined(CONFIG_BCM_KF_GLB_COHERENCY) && defined(CONFIG_BCM_GLB_COHERENCY)
+#define TCR_SHARED		(TCR_SH0_OUTER | TCR_SH1_OUTER)
+#else
 #define TCR_SHARED		(TCR_SH0_INNER | TCR_SH1_INNER)
+#endif
 
 #define TCR_TG0_SHIFT		14
 #define TCR_TG0_MASK		(UL(3) << TCR_TG0_SHIFT)