#define BOOT_STATE_VERSION_1 0x01
#define BOOT_STATE_VERSION_2 0x02

#define SPI_DO_NOT_RESET_ON_WATCHDOG (1<<22)
#define SPI_FLASH_CNTRL_RESET_VAL 0x050b

#define PCIE_RESET_STATUS       0x10000000
#define SW_RESET_STATUS         0x20000000
#define HW_RESET_STATUS         0x40000000
#define POR_RESET_STATUS        0x80000000
#define RESET_STATUS_MASK       0xF0000000