--- zzzz-none-000/linux-4.1.38/drivers/irqchip/irq-gic-common.c	2017-01-18 18:48:06.000000000 +0000
+++ bcm63-7582-715/linux-4.1.38/drivers/irqchip/irq-gic-common.c	2020-11-25 10:06:48.000000000 +0000
@@ -90,12 +90,19 @@
 		writel_relaxed(GICD_INT_DEF_PRI_X4, base + GIC_DIST_PRI + i);
 
 	/*
+	 * Set all global interrupts to non-secure.
+	 */
+	for (i = 32; i < gic_irqs; i += 32)
+		writel_relaxed(GICD_INT_DEF_NONSEC,
+					base + GIC_DIST_IGROUP + i / 8);
+
+	/*
 	 * Disable all interrupts.  Leave the PPI and SGIs alone
 	 * as they are enabled by redistributor registers.
 	 */
 	for (i = 32; i < gic_irqs; i += 32)
 		writel_relaxed(GICD_INT_EN_CLR_X32,
-					base + GIC_DIST_ENABLE_CLEAR + i / 8);
+			       base + GIC_DIST_ENABLE_CLEAR + i / 8);
 
 	if (sync_access)
 		sync_access();
@@ -107,10 +114,11 @@
 
 	/*
 	 * Deal with the banked PPI and SGI interrupts - disable all
-	 * PPI interrupts, ensure all SGI interrupts are enabled.
+	 * PPI interrupts, ensure all SGI interrupts are enabled and non-secure.
 	 */
 	writel_relaxed(GICD_INT_EN_CLR_PPI, base + GIC_DIST_ENABLE_CLEAR);
 	writel_relaxed(GICD_INT_EN_SET_SGI, base + GIC_DIST_ENABLE_SET);
+	writel_relaxed(GICD_INT_DEF_NONSEC, base + GIC_DIST_IGROUP);
 
 	/*
 	 * Set priority on PPI and SGI interrupts