* Broadcom 963XX PCIe host controller for ARM/ARM64 based SoC's

Properties of the host controller node:

- compatible         : Must be "brcm,bcm963xx-pcie"

- device_type        : Must be "pci".

- bus-range          : Optional property (also described in IEEE Std 1275-1994)
                       to indicate the range of bus numbers for this controller.
                       If absent, defaults to <0 255> (i.e. all buses).

- #address-cells     : Must be 3.

- #size-cells        : Must be 2.

- #interrupt-cells   : Must be 1

- reg                : The PCIe core register base and outgoing window base addresses 

- interrupt-map      : <see aforementioned specification>

- interrupt-map-mask : <see aforementioned specification>

- linux,pci-domain   : <see aforementioned specification>


Broadcom 963xx specific properties

- brcm,coreid        : Must be set to PCIe core id as defined in the SoC

- brcm,ssc           : Optional property. Spread Spectrum Clock feature (non-zero: Enable)
                       Default disabled.

- brcm,speed         : Optional property. To force PCIe speed (0: auto (set by SoC), 1: 2.5Gbps, 2: 5Gbps)
                       Default as set by SoC

How to enable device tree entries for PCIe driver
- Remove the static interrupt mapping for INTERRUPT_ID_PCIE<X> in shared/opensource/include/bcm963xx/<SoC>_intr.h
- Add device tree entry to kernel/dts/<SoC>.dts file. Below is an example for 6836 SoC
  For other SoC's please check SoC specification and update the core register base and size, memory window base and size, and Interrupt number if needed 

	pcie0: pcie@80040000 {
		compatible = "brcm,bcm963xx-pcie";
		device_type = "pci";
		status = "okay";

		reg = <0 0x80040000 0 0x0000A000>,
		      <0 0x90000000 0 0x10000000>;
		#address-cells = <3>;
		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0>;
		interrupt-map = <0 0 0 0 &gic GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
		linux,pci-domain = <0>;
		brcm,coreid = <0>;
	};

	pcie1: pcie@80050000 {
		compatible = "brcm,bcm963xx-pcie";
		device_type = "pci";
		status = "okay";

		reg = <0 0x80050000 0 0x0000A000>,
		      <0 0xA0000000 0 0x10000000>;
		#address-cells = <3>;
		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0>;
		interrupt-map = <0 0 0 0 &gic GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
		linux,pci-domain = <1>;
		brcm,coreid = <1>;
	};

	pcie2: pcie@80060000 {
		compatible = "brcm,bcm963xx-pcie";
		device_type = "pci";
		status = "okay";

		reg = <0 0x80060000 0 0x0000A000>,
		      <0 0xB0000000 0 0x10000000>;
		#address-cells = <3>;
		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0>;
		interrupt-map = <0 0 0 0 &gic GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
		linux,pci-domain = <2>;
		brcm,coreid = <2>;
	};