#define GIC_DIST_BASE	0x81001000
#define GIC_CPUI_BASE	0x81002000

#define TIMER_HYP_PPI			10
#define TIMER_VIRT_PPI			11
#define TIMER_PHYS_SECURE_PPI		13
#define TIMER_PHYS_NONSECURE_PPI	14

#define PMU_CORE0_SPI			9
#define PMU_CORE1_SPI			10
#define PMU_CORE2_SPI			11
#define PMU_CORE3_SPI			12
#define SDIO_EMMC_SPI           95

#include "bcm_b53_template.dtsi"

/ {
	/* according to inclusion rules of device tree */
	reserved-memory {
#if defined (CONFIG_BCM_RDPA)
		dt_reserved_fpm_pool {
			reg = <0x00000000 DRAM_OFFSET_RDP_PARAM1 0x0 RDP_PARAM1_DDR_SIZE>; /* 32MB */
			no-map;
		};
		dt_reserved_rnr_tbls {
			reg = <0x00000000 DRAM_OFFSET_RDP_PARAM2 0x0 RDP_PARAM2_DDR_SIZE>; /* 8MB */
			no-map;
		};
#endif
	};

	/* Legacy UBUS base */
	ubus@ff800000 {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges = <0x0 0x0 0x0 0xff800000 0x0 0x8000>;

		nand@ff801800 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "brcm,nand-bcm63xx", "brcm,brcmnand-v7.1";
			reg = <0x0 0x1800 0x0 0x600>, <0x0 0x2000 0x0 0x10>;
			reg-names = "nand", "nand-int-base";
			status = "okay";

			nandcs@0 {
				compatible = "brcm,nandcs";
				reg = <0>;
				nand-on-flash-bbt;
			};

		};

		watchdog@ff800428 {
			compatible = "brcm,bcm96xxx-wdt";
			reg = <0x0 0x428 0x0 0x10>;
			timeout-sec = <80>;
		};
	};
};