/* Copyright (c) 2015 Broadcom All Rights Reserved <:label-BRCM:2015:DUAL/GPL:standard Unless you and Broadcom execute a separate written software license agreement governing use of this software, this software is licensed to you under the terms of the GNU General Public License version 2 (the "GPL"), available at http://www.broadcom.com/licenses/GPLv2.php, with the following added to such license: As a special exception, the copyright holders of this software give you permission to link this software with independent modules, and to copy and distribute the resulting executable under terms of your choice, provided that you also meet, for each linked independent module, the terms and conditions of the license of that module. An independent module is a module which is not derived from this software. The special exception does not apply to any modifications of the software. Not withstanding the above, under no circumstances may you combine this software in any way with any other Broadcom software provided under a license other than the GPL, without Broadcom's express prior written consent. :> */ /* This is an automated file. Do not edit its contents. */ #ifndef _RDD_RUNNER_DEFS_AUTO_H #define _RDD_RUNNER_DEFS_AUTO_H #ifdef WL4908 /* PRIVATE_A */ #define INGRESS_HANDLER_BUFFER_ADDRESS 0x0000 #define INGRESS_HANDLER_BUFFER_BYTE_SIZE 0x2000 #define INGRESS_HANDLER_BUFFER_LOG2_BYTE_SIZE 0x000d #define RDD_INGRESS_HANDLER_BUFFER_SIZE 32 #define RDD_INGRESS_HANDLER_BUFFER_LOG2_SIZE 5 #define DS_FREE_PACKET_DESCRIPTORS_POOL_ADDRESS 0x2000 #define DS_FREE_PACKET_DESCRIPTORS_POOL_BYTE_SIZE 0x4000 #define DS_FREE_PACKET_DESCRIPTORS_POOL_LOG2_BYTE_SIZE 0x000e #define RDD_DS_FREE_PACKET_DESCRIPTORS_POOL_SIZE 2048 #define RDD_DS_FREE_PACKET_DESCRIPTORS_POOL_LOG2_SIZE 11 #define DS_CONNECTION_CONTEXT_BUFFER_ADDRESS 0x6000 #define DS_CONNECTION_CONTEXT_BUFFER_BYTE_SIZE 0x0400 #define DS_CONNECTION_CONTEXT_BUFFER_LOG2_BYTE_SIZE 0x000a #define RDD_DS_CONNECTION_CONTEXT_BUFFER_SIZE 8 #define RDD_DS_CONNECTION_CONTEXT_BUFFER_LOG2_SIZE 3 #define DS_GSO_HEADER_BUFFER_ADDRESS 0x6400 #define DS_GSO_HEADER_BUFFER_BYTE_SIZE 0x0080 #define DS_GSO_HEADER_BUFFER_LOG2_BYTE_SIZE 0x0007 #define DS_GSO_PSEUDO_HEADER_BUFFER_ADDRESS 0x6480 #define DS_GSO_PSEUDO_HEADER_BUFFER_BYTE_SIZE 0x0028 #define DS_GSO_PSEUDO_HEADER_BUFFER_LOG2_BYTE_SIZE 0x0006 #define DS_CPU_PARAMETERS_BLOCK_ADDRESS 0x64a8 #define DS_CPU_PARAMETERS_BLOCK_BYTE_SIZE 0x0008 #define DS_CPU_PARAMETERS_BLOCK_LOG2_BYTE_SIZE 0x0003 #define DS_RATE_SHAPER_BUDGET_ALLOCATOR_TABLE_ADDRESS 0x64b0 #define DS_RATE_SHAPER_BUDGET_ALLOCATOR_TABLE_BYTE_SIZE 0x0010 #define DS_RATE_SHAPER_BUDGET_ALLOCATOR_TABLE_LOG2_BYTE_SIZE 0x0004 #define RDD_DS_RATE_SHAPER_BUDGET_ALLOCATOR_TABLE_SIZE 8 #define RDD_DS_RATE_SHAPER_BUDGET_ALLOCATOR_TABLE_LOG2_SIZE 3 #define DS_CPU_REASON_TO_METER_TABLE_ADDRESS 0x64c0 #define DS_CPU_REASON_TO_METER_TABLE_BYTE_SIZE 0x0040 #define DS_CPU_REASON_TO_METER_TABLE_LOG2_BYTE_SIZE 0x0006 #define RDD_DS_CPU_REASON_TO_METER_TABLE_SIZE 64 #define RDD_DS_CPU_REASON_TO_METER_TABLE_LOG2_SIZE 6 #define DS_GSO_CHUNK_BUFFER_ADDRESS 0x6500 #define DS_GSO_CHUNK_BUFFER_BYTE_SIZE 0x0080 #define DS_GSO_CHUNK_BUFFER_LOG2_BYTE_SIZE 0x0007 #define DS_SERVICE_QUEUES_DESCRIPTORS_TABLE_ADDRESS 0x6580 #define DS_SERVICE_QUEUES_DESCRIPTORS_TABLE_BYTE_SIZE 0x0080 #define DS_SERVICE_QUEUES_DESCRIPTORS_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_DS_SERVICE_QUEUES_DESCRIPTORS_TABLE_SIZE 8 #define RDD_DS_SERVICE_QUEUES_DESCRIPTORS_TABLE_LOG2_SIZE 3 #define DS_WAN_FLOW_TABLE_ADDRESS 0x6600 #define DS_WAN_FLOW_TABLE_BYTE_SIZE 0x0200 #define DS_WAN_FLOW_TABLE_LOG2_BYTE_SIZE 0x0009 #define RDD_DS_WAN_FLOW_TABLE_SIZE 256 #define RDD_DS_WAN_FLOW_TABLE_LOG2_SIZE 8 #define DS_INGRESS_CLASSIFICATION_CONTEXT_TABLE_ADDRESS 0x6800 #define DS_INGRESS_CLASSIFICATION_CONTEXT_TABLE_BYTE_SIZE 0x0800 #define DS_INGRESS_CLASSIFICATION_CONTEXT_TABLE_LOG2_BYTE_SIZE 0x000b #define RDD_DS_INGRESS_CLASSIFICATION_CONTEXT_TABLE_SIZE 256 #define RDD_DS_INGRESS_CLASSIFICATION_CONTEXT_TABLE_LOG2_SIZE 8 #define ETH_TX_QUEUES_TABLE_ADDRESS 0x7000 #define ETH_TX_QUEUES_TABLE_BYTE_SIZE 0x0480 #define ETH_TX_QUEUES_TABLE_LOG2_BYTE_SIZE 0x000b #define RDD_ETH_TX_QUEUES_TABLE_SIZE 72 #define RDD_ETH_TX_QUEUES_TABLE_LOG2_SIZE 7 #define DS_CPU_RX_METER_TABLE_ADDRESS 0x7480 #define DS_CPU_RX_METER_TABLE_BYTE_SIZE 0x0080 #define DS_CPU_RX_METER_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_DS_CPU_RX_METER_TABLE_SIZE 16 #define RDD_DS_CPU_RX_METER_TABLE_LOG2_SIZE 4 #define WLAN_MCAST_CONTROL_TABLE_ADDRESS 0x7500 #define WLAN_MCAST_CONTROL_TABLE_BYTE_SIZE 0x0094 #define WLAN_MCAST_CONTROL_TABLE_LOG2_BYTE_SIZE 0x0008 #define DS_WAN_UDP_FILTER_CONTROL_TABLE_ADDRESS 0x7594 #define DS_WAN_UDP_FILTER_CONTROL_TABLE_BYTE_SIZE 0x0004 #define DS_WAN_UDP_FILTER_CONTROL_TABLE_LOG2_BYTE_SIZE 0x0002 #define DS_RUNNER_FLOW_HEADER_DESCRIPTOR_ADDRESS 0x7598 #define DS_RUNNER_FLOW_HEADER_DESCRIPTOR_BYTE_SIZE 0x0008 #define DS_RUNNER_FLOW_HEADER_DESCRIPTOR_LOG2_BYTE_SIZE 0x0003 #define DS_MAIN_TIMER_TASK_DESCRIPTOR_TABLE_ADDRESS 0x75a0 #define DS_MAIN_TIMER_TASK_DESCRIPTOR_TABLE_BYTE_SIZE 0x0020 #define DS_MAIN_TIMER_TASK_DESCRIPTOR_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_DS_MAIN_TIMER_TASK_DESCRIPTOR_TABLE_SIZE 4 #define RDD_DS_MAIN_TIMER_TASK_DESCRIPTOR_TABLE_LOG2_SIZE 2 #define DS_PICO_TIMER_TASK_DESCRIPTOR_TABLE_ADDRESS 0x75c0 #define DS_PICO_TIMER_TASK_DESCRIPTOR_TABLE_BYTE_SIZE 0x0020 #define DS_PICO_TIMER_TASK_DESCRIPTOR_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_DS_PICO_TIMER_TASK_DESCRIPTOR_TABLE_SIZE 4 #define RDD_DS_PICO_TIMER_TASK_DESCRIPTOR_TABLE_LOG2_SIZE 2 #define DS_MAIN_PROFILING_BUFFER_RUNNER_ADDRESS 0x75e0 #define DS_MAIN_PROFILING_BUFFER_RUNNER_BYTE_SIZE 0x0100 #define DS_MAIN_PROFILING_BUFFER_RUNNER_LOG2_BYTE_SIZE 0x0008 #define RDD_DS_MAIN_PROFILING_BUFFER_RUNNER_SIZE 32 #define RDD_DS_MAIN_PROFILING_BUFFER_RUNNER_LOG2_SIZE 5 #define DS_FC_L2_UCAST_TUPLE_BUFFER_ADDRESS 0x76e0 #define DS_FC_L2_UCAST_TUPLE_BUFFER_BYTE_SIZE 0x0020 #define DS_FC_L2_UCAST_TUPLE_BUFFER_LOG2_BYTE_SIZE 0x0005 #define DS_POLICER_TABLE_ADDRESS 0x7700 #define DS_POLICER_TABLE_BYTE_SIZE 0x0100 #define DS_POLICER_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_DS_POLICER_TABLE_SIZE 16 #define RDD_DS_POLICER_TABLE_LOG2_SIZE 4 #define FC_MCAST_CONNECTION2_TABLE_ADDRESS 0x7800 #define FC_MCAST_CONNECTION2_TABLE_BYTE_SIZE 0x0800 #define FC_MCAST_CONNECTION2_TABLE_LOG2_BYTE_SIZE 0x000b #define RDD_FC_MCAST_CONNECTION2_TABLE_SIZE 128 #define RDD_FC_MCAST_CONNECTION2_TABLE_LOG2_SIZE 7 #define ETH_TX_RS_QUEUE_DESCRIPTOR_TABLE_ADDRESS 0x8000 #define ETH_TX_RS_QUEUE_DESCRIPTOR_TABLE_BYTE_SIZE 0x0800 #define ETH_TX_RS_QUEUE_DESCRIPTOR_TABLE_LOG2_BYTE_SIZE 0x000b #define RDD_ETH_TX_RS_QUEUE_DESCRIPTOR_TABLE_SIZE 128 #define RDD_ETH_TX_RS_QUEUE_DESCRIPTOR_TABLE_LOG2_SIZE 7 #define ETH_TX_QUEUES_POINTERS_TABLE_ADDRESS 0x8800 #define ETH_TX_QUEUES_POINTERS_TABLE_BYTE_SIZE 0x0120 #define ETH_TX_QUEUES_POINTERS_TABLE_LOG2_BYTE_SIZE 0x0009 #define RDD_ETH_TX_QUEUES_POINTERS_TABLE_SIZE 72 #define RDD_ETH_TX_QUEUES_POINTERS_TABLE_LOG2_SIZE 7 #define DS_FAST_RUNNER_GLOBAL_REGISTERS_INIT_ADDRESS 0x8920 #define DS_FAST_RUNNER_GLOBAL_REGISTERS_INIT_BYTE_SIZE 0x0020 #define DS_FAST_RUNNER_GLOBAL_REGISTERS_INIT_LOG2_BYTE_SIZE 0x0005 #define RDD_DS_FAST_RUNNER_GLOBAL_REGISTERS_INIT_SIZE 8 #define RDD_DS_FAST_RUNNER_GLOBAL_REGISTERS_INIT_LOG2_SIZE 3 #define RATE_LIMITER_REMAINDER_TABLE_ADDRESS 0x8940 #define RATE_LIMITER_REMAINDER_TABLE_BYTE_SIZE 0x0040 #define RATE_LIMITER_REMAINDER_TABLE_LOG2_BYTE_SIZE 0x0006 #define RDD_RATE_LIMITER_REMAINDER_TABLE_SIZE 32 #define RDD_RATE_LIMITER_REMAINDER_TABLE_LOG2_SIZE 5 #define SBPM_REPLY_ADDRESS 0x8980 #define SBPM_REPLY_BYTE_SIZE 0x0080 #define SBPM_REPLY_LOG2_BYTE_SIZE 0x0007 #define DS_WAN_UDP_FILTER_TABLE_ADDRESS 0x8a00 #define DS_WAN_UDP_FILTER_TABLE_BYTE_SIZE 0x0200 #define DS_WAN_UDP_FILTER_TABLE_LOG2_BYTE_SIZE 0x0009 #define RDD_DS_WAN_UDP_FILTER_TABLE_SIZE 32 #define RDD_DS_WAN_UDP_FILTER_TABLE_LOG2_SIZE 5 #define GSO_PICO_QUEUE_ADDRESS 0x8c00 #define GSO_PICO_QUEUE_BYTE_SIZE 0x0200 #define GSO_PICO_QUEUE_LOG2_BYTE_SIZE 0x0009 #define RDD_GSO_PICO_QUEUE_SIZE 64 #define RDD_GSO_PICO_QUEUE_LOG2_SIZE 6 #define FC_MCAST_PORT_HEADER_BUFFER_ADDRESS 0x8e00 #define FC_MCAST_PORT_HEADER_BUFFER_BYTE_SIZE 0x0200 #define FC_MCAST_PORT_HEADER_BUFFER_LOG2_BYTE_SIZE 0x0009 #define RDD_FC_MCAST_PORT_HEADER_BUFFER_SIZE 8 #define RDD_FC_MCAST_PORT_HEADER_BUFFER_LOG2_SIZE 3 #define RDD_FC_MCAST_PORT_HEADER_BUFFER_SIZE2 64 #define RDD_FC_MCAST_PORT_HEADER_BUFFER_LOG2_SIZE2 6 #define DOWNSTREAM_LAN_ENQUEUE_SQ_PD_ADDRESS 0x9000 #define DOWNSTREAM_LAN_ENQUEUE_SQ_PD_BYTE_SIZE 0x0200 #define DOWNSTREAM_LAN_ENQUEUE_SQ_PD_LOG2_BYTE_SIZE 0x0009 #define RDD_DOWNSTREAM_LAN_ENQUEUE_SQ_PD_SIZE 64 #define RDD_DOWNSTREAM_LAN_ENQUEUE_SQ_PD_LOG2_SIZE 6 #define DOWNSTREAM_LAN_ENQUEUE_INGRESS_QUEUE_ADDRESS 0x9200 #define DOWNSTREAM_LAN_ENQUEUE_INGRESS_QUEUE_BYTE_SIZE 0x0040 #define DOWNSTREAM_LAN_ENQUEUE_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_DOWNSTREAM_LAN_ENQUEUE_INGRESS_QUEUE_SIZE 64 #define RDD_DOWNSTREAM_LAN_ENQUEUE_INGRESS_QUEUE_LOG2_SIZE 6 #define DS_FAST_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_ADDRESS 0x9240 #define DS_FAST_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_BYTE_SIZE 0x0040 #define DS_FAST_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_DS_FAST_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_SIZE 16 #define RDD_DS_FAST_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_LOG2_SIZE 4 #define DS_PICO_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_ADDRESS 0x9280 #define DS_PICO_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_BYTE_SIZE 0x0040 #define DS_PICO_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_DS_PICO_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_SIZE 16 #define RDD_DS_PICO_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_LOG2_SIZE 4 #define DS_INGRESS_CLASSIFICATION_KEY_PRIMITIVE_TABLE_ADDRESS 0x92c0 #define DS_INGRESS_CLASSIFICATION_KEY_PRIMITIVE_TABLE_BYTE_SIZE 0x0040 #define DS_INGRESS_CLASSIFICATION_KEY_PRIMITIVE_TABLE_LOG2_BYTE_SIZE 0x0006 #define RDD_DS_INGRESS_CLASSIFICATION_KEY_PRIMITIVE_TABLE_SIZE 32 #define RDD_DS_INGRESS_CLASSIFICATION_KEY_PRIMITIVE_TABLE_LOG2_SIZE 5 #define DS_RATE_LIMITER_TABLE_ADDRESS 0x9300 #define DS_RATE_LIMITER_TABLE_BYTE_SIZE 0x0100 #define DS_RATE_LIMITER_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_DS_RATE_LIMITER_TABLE_SIZE 32 #define RDD_DS_RATE_LIMITER_TABLE_LOG2_SIZE 5 #define CPU_RX_SQ_PD_INGRESS_QUEUE_ADDRESS 0x9400 #define CPU_RX_SQ_PD_INGRESS_QUEUE_BYTE_SIZE 0x0200 #define CPU_RX_SQ_PD_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0009 #define RDD_CPU_RX_SQ_PD_INGRESS_QUEUE_SIZE 64 #define RDD_CPU_RX_SQ_PD_INGRESS_QUEUE_LOG2_SIZE 6 #define DS_CONNECTION_CONTEXT_MULTICAST_BUFFER_ADDRESS 0x9600 #define DS_CONNECTION_CONTEXT_MULTICAST_BUFFER_BYTE_SIZE 0x0200 #define DS_CONNECTION_CONTEXT_MULTICAST_BUFFER_LOG2_BYTE_SIZE 0x0009 #define RDD_DS_CONNECTION_CONTEXT_MULTICAST_BUFFER_SIZE 8 #define RDD_DS_CONNECTION_CONTEXT_MULTICAST_BUFFER_LOG2_SIZE 3 #define SERVICE_QUEUES_RATE_LIMITER_TABLE_ADDRESS 0x9800 #define SERVICE_QUEUES_RATE_LIMITER_TABLE_BYTE_SIZE 0x0300 #define SERVICE_QUEUES_RATE_LIMITER_TABLE_LOG2_BYTE_SIZE 0x000a #define RDD_SERVICE_QUEUES_RATE_LIMITER_TABLE_SIZE 32 #define RDD_SERVICE_QUEUES_RATE_LIMITER_TABLE_LOG2_SIZE 5 #define DS_FORWARDING_MATRIX_TABLE_ADDRESS 0x9b00 #define DS_FORWARDING_MATRIX_TABLE_BYTE_SIZE 0x0090 #define DS_FORWARDING_MATRIX_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_DS_FORWARDING_MATRIX_TABLE_SIZE 9 #define RDD_DS_FORWARDING_MATRIX_TABLE_LOG2_SIZE 4 #define RDD_DS_FORWARDING_MATRIX_TABLE_SIZE2 16 #define RDD_DS_FORWARDING_MATRIX_TABLE_LOG2_SIZE2 4 #define DS_TIMER_SCHEDULER_PRIMITIVE_TABLE_ADDRESS 0x9b90 #define DS_TIMER_SCHEDULER_PRIMITIVE_TABLE_BYTE_SIZE 0x0010 #define DS_TIMER_SCHEDULER_PRIMITIVE_TABLE_LOG2_BYTE_SIZE 0x0004 #define RDD_DS_TIMER_SCHEDULER_PRIMITIVE_TABLE_SIZE 8 #define RDD_DS_TIMER_SCHEDULER_PRIMITIVE_TABLE_LOG2_SIZE 3 #define DS_PICO_RUNNER_GLOBAL_REGISTERS_INIT_ADDRESS 0x9ba0 #define DS_PICO_RUNNER_GLOBAL_REGISTERS_INIT_BYTE_SIZE 0x0020 #define DS_PICO_RUNNER_GLOBAL_REGISTERS_INIT_LOG2_BYTE_SIZE 0x0005 #define RDD_DS_PICO_RUNNER_GLOBAL_REGISTERS_INIT_SIZE 8 #define RDD_DS_PICO_RUNNER_GLOBAL_REGISTERS_INIT_LOG2_SIZE 3 #define DHD_TX_COMPLETE_FLOW_RING_BUFFER_ADDRESS 0x9bc0 #define DHD_TX_COMPLETE_FLOW_RING_BUFFER_BYTE_SIZE 0x0030 #define DHD_TX_COMPLETE_FLOW_RING_BUFFER_LOG2_BYTE_SIZE 0x0006 #define RDD_DHD_TX_COMPLETE_FLOW_RING_BUFFER_SIZE 3 #define RDD_DHD_TX_COMPLETE_FLOW_RING_BUFFER_LOG2_SIZE 2 #define DS_FC_L2_UCAST_CONNECTION_BUFFER_ADDRESS 0x9bf0 #define DS_FC_L2_UCAST_CONNECTION_BUFFER_BYTE_SIZE 0x0010 #define DS_FC_L2_UCAST_CONNECTION_BUFFER_LOG2_BYTE_SIZE 0x0004 #define DS_CPU_TX_BBH_DESCRIPTORS_ADDRESS 0x9c00 #define DS_CPU_TX_BBH_DESCRIPTORS_BYTE_SIZE 0x0100 #define DS_CPU_TX_BBH_DESCRIPTORS_LOG2_BYTE_SIZE 0x0008 #define RDD_DS_CPU_TX_BBH_DESCRIPTORS_SIZE 32 #define RDD_DS_CPU_TX_BBH_DESCRIPTORS_LOG2_SIZE 5 #define REVERSE_FFI_TABLE_ADDRESS 0x9d00 #define REVERSE_FFI_TABLE_BYTE_SIZE 0x0100 #define REVERSE_FFI_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_REVERSE_FFI_TABLE_SIZE 256 #define RDD_REVERSE_FFI_TABLE_LOG2_SIZE 8 #define DHD_TX_POST_PD_INGRESS_QUEUE_ADDRESS 0x9e00 #define DHD_TX_POST_PD_INGRESS_QUEUE_BYTE_SIZE 0x0100 #define DHD_TX_POST_PD_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0008 #define RDD_DHD_TX_POST_PD_INGRESS_QUEUE_SIZE 32 #define RDD_DHD_TX_POST_PD_INGRESS_QUEUE_LOG2_SIZE 5 #define INGRESS_HANDLER_SKB_DATA_POINTER_ADDRESS 0x9f00 #define INGRESS_HANDLER_SKB_DATA_POINTER_BYTE_SIZE 0x0080 #define INGRESS_HANDLER_SKB_DATA_POINTER_LOG2_BYTE_SIZE 0x0007 #define RDD_INGRESS_HANDLER_SKB_DATA_POINTER_SIZE 32 #define RDD_INGRESS_HANDLER_SKB_DATA_POINTER_LOG2_SIZE 5 #define DS_RUNNER_FLOW_HEADER_BUFFER_ADDRESS 0x9f80 #define DS_RUNNER_FLOW_HEADER_BUFFER_BYTE_SIZE 0x0080 #define DS_RUNNER_FLOW_HEADER_BUFFER_LOG2_BYTE_SIZE 0x0007 #define DS_PROFILING_BUFFER_PICO_RUNNER_ADDRESS 0xa000 #define DS_PROFILING_BUFFER_PICO_RUNNER_BYTE_SIZE 0x0100 #define DS_PROFILING_BUFFER_PICO_RUNNER_LOG2_BYTE_SIZE 0x0008 #define DS_INGRESS_CLASSIFICATION_RULE_CFG_TABLE_ADDRESS 0xa100 #define DS_INGRESS_CLASSIFICATION_RULE_CFG_TABLE_BYTE_SIZE 0x0080 #define DS_INGRESS_CLASSIFICATION_RULE_CFG_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_DS_INGRESS_CLASSIFICATION_RULE_CFG_TABLE_SIZE 16 #define RDD_DS_INGRESS_CLASSIFICATION_RULE_CFG_TABLE_LOG2_SIZE 4 #define ETH_TX_LOCAL_REGISTERS_ADDRESS 0xa180 #define ETH_TX_LOCAL_REGISTERS_BYTE_SIZE 0x0048 #define ETH_TX_LOCAL_REGISTERS_LOG2_BYTE_SIZE 0x0007 #define RDD_ETH_TX_LOCAL_REGISTERS_SIZE 9 #define RDD_ETH_TX_LOCAL_REGISTERS_LOG2_SIZE 4 #define SERVICE_QUEUES_WLAN_SCRATCH_ADDRESS 0xa1c8 #define SERVICE_QUEUES_WLAN_SCRATCH_BYTE_SIZE 0x0008 #define SERVICE_QUEUES_WLAN_SCRATCH_LOG2_BYTE_SIZE 0x0003 #define RUNNER_FWTRACE_MAINA_PARAM_ADDRESS 0xa1d0 #define RUNNER_FWTRACE_MAINA_PARAM_BYTE_SIZE 0x0010 #define RUNNER_FWTRACE_MAINA_PARAM_LOG2_BYTE_SIZE 0x0004 #define RDD_RUNNER_FWTRACE_MAINA_PARAM_SIZE 2 #define RDD_RUNNER_FWTRACE_MAINA_PARAM_LOG2_SIZE 1 #define DS_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_ADDRESS 0xa1e0 #define DS_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_BYTE_SIZE 0x0020 #define DS_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_DS_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_SIZE 8 #define RDD_DS_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_SIZE 3 #define DOWNSTREAM_MULTICAST_LAN_ENQUEUE_INGRESS_QUEUE_ADDRESS 0xa200 #define DOWNSTREAM_MULTICAST_LAN_ENQUEUE_INGRESS_QUEUE_BYTE_SIZE 0x0080 #define DOWNSTREAM_MULTICAST_LAN_ENQUEUE_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0007 #define RDD_DOWNSTREAM_MULTICAST_LAN_ENQUEUE_INGRESS_QUEUE_SIZE 16 #define RDD_DOWNSTREAM_MULTICAST_LAN_ENQUEUE_INGRESS_QUEUE_LOG2_SIZE 4 #define DS_SPDSVC_CONTEXT_TABLE_ADDRESS 0xa280 #define DS_SPDSVC_CONTEXT_TABLE_BYTE_SIZE 0x0048 #define DS_SPDSVC_CONTEXT_TABLE_LOG2_BYTE_SIZE 0x0007 #define DS_FAST_MALLOC_RESULT_TABLE_ADDRESS 0xa2c8 #define DS_FAST_MALLOC_RESULT_TABLE_BYTE_SIZE 0x0008 #define DS_FAST_MALLOC_RESULT_TABLE_LOG2_BYTE_SIZE 0x0003 #define RDD_DS_FAST_MALLOC_RESULT_TABLE_SIZE 2 #define RDD_DS_FAST_MALLOC_RESULT_TABLE_LOG2_SIZE 1 #define RUNNER_FWTRACE_PICOA_PARAM_ADDRESS 0xa2d0 #define RUNNER_FWTRACE_PICOA_PARAM_BYTE_SIZE 0x0010 #define RUNNER_FWTRACE_PICOA_PARAM_LOG2_BYTE_SIZE 0x0004 #define RDD_RUNNER_FWTRACE_PICOA_PARAM_SIZE 2 #define RDD_RUNNER_FWTRACE_PICOA_PARAM_LOG2_SIZE 1 #define DS_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_ADDRESS 0xa2e0 #define DS_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_BYTE_SIZE 0x0020 #define DS_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_DS_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_SIZE 8 #define RDD_DS_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_SIZE 3 #define DOWNSTREAM_MULTICAST_LAN_ENQUEUE_SERVICE_QUEUE_ADDRESS 0xa300 #define DOWNSTREAM_MULTICAST_LAN_ENQUEUE_SERVICE_QUEUE_BYTE_SIZE 0x0080 #define DOWNSTREAM_MULTICAST_LAN_ENQUEUE_SERVICE_QUEUE_LOG2_BYTE_SIZE 0x0007 #define RDD_DOWNSTREAM_MULTICAST_LAN_ENQUEUE_SERVICE_QUEUE_SIZE 16 #define RDD_DOWNSTREAM_MULTICAST_LAN_ENQUEUE_SERVICE_QUEUE_LOG2_SIZE 4 #define DS_QUEUE_PROFILE_TABLE_ADDRESS 0xa380 #define DS_QUEUE_PROFILE_TABLE_BYTE_SIZE 0x0080 #define DS_QUEUE_PROFILE_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_DS_QUEUE_PROFILE_TABLE_SIZE 8 #define RDD_DS_QUEUE_PROFILE_TABLE_LOG2_SIZE 3 #define CPU_RX_PD_INGRESS_QUEUE_ADDRESS 0xa400 #define CPU_RX_PD_INGRESS_QUEUE_BYTE_SIZE 0x0080 #define CPU_RX_PD_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0007 #define RDD_CPU_RX_PD_INGRESS_QUEUE_SIZE 16 #define RDD_CPU_RX_PD_INGRESS_QUEUE_LOG2_SIZE 4 #define DS_GSO_DESC_TABLE_ADDRESS 0xa480 #define DS_GSO_DESC_TABLE_BYTE_SIZE 0x0080 #define DS_GSO_DESC_TABLE_LOG2_BYTE_SIZE 0x0007 #define CPU_RX_FAST_PD_INGRESS_QUEUE_ADDRESS 0xa500 #define CPU_RX_FAST_PD_INGRESS_QUEUE_BYTE_SIZE 0x0080 #define CPU_RX_FAST_PD_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0007 #define RDD_CPU_RX_FAST_PD_INGRESS_QUEUE_SIZE 16 #define RDD_CPU_RX_FAST_PD_INGRESS_QUEUE_LOG2_SIZE 4 #define EMAC_SKB_ENQUEUED_INDEXES_FIFO_ADDRESS 0xa580 #define EMAC_SKB_ENQUEUED_INDEXES_FIFO_BYTE_SIZE 0x00a0 #define EMAC_SKB_ENQUEUED_INDEXES_FIFO_LOG2_BYTE_SIZE 0x0008 #define RDD_EMAC_SKB_ENQUEUED_INDEXES_FIFO_SIZE 5 #define RDD_EMAC_SKB_ENQUEUED_INDEXES_FIFO_LOG2_SIZE 3 #define DS_NULL_BUFFER_ADDRESS 0xa620 #define DS_NULL_BUFFER_BYTE_SIZE 0x0018 #define DS_NULL_BUFFER_LOG2_BYTE_SIZE 0x0005 #define RDD_DS_NULL_BUFFER_SIZE 3 #define RDD_DS_NULL_BUFFER_LOG2_SIZE 2 #define DS_PICO_MALLOC_RESULT_TABLE_ADDRESS 0xa638 #define DS_PICO_MALLOC_RESULT_TABLE_BYTE_SIZE 0x0008 #define DS_PICO_MALLOC_RESULT_TABLE_LOG2_BYTE_SIZE 0x0003 #define RDD_DS_PICO_MALLOC_RESULT_TABLE_SIZE 2 #define RDD_DS_PICO_MALLOC_RESULT_TABLE_LOG2_SIZE 1 #define DHD_COMPLETE_RING_DESCRIPTOR_BUFFER_ADDRESS 0xa640 #define DHD_COMPLETE_RING_DESCRIPTOR_BUFFER_BYTE_SIZE 0x0030 #define DHD_COMPLETE_RING_DESCRIPTOR_BUFFER_LOG2_BYTE_SIZE 0x0006 #define RDD_DHD_COMPLETE_RING_DESCRIPTOR_BUFFER_SIZE 3 #define RDD_DHD_COMPLETE_RING_DESCRIPTOR_BUFFER_LOG2_SIZE 2 #define EMAC_SKB_ENQUEUED_INDEXES_PUT_PTR_ADDRESS 0xa670 #define EMAC_SKB_ENQUEUED_INDEXES_PUT_PTR_BYTE_SIZE 0x0010 #define EMAC_SKB_ENQUEUED_INDEXES_PUT_PTR_LOG2_BYTE_SIZE 0x0004 #define RDD_EMAC_SKB_ENQUEUED_INDEXES_PUT_PTR_SIZE 8 #define RDD_EMAC_SKB_ENQUEUED_INDEXES_PUT_PTR_LOG2_SIZE 3 #define DS_SQ_ENQUEUE_QUEUE_ADDRESS 0xa680 #define DS_SQ_ENQUEUE_QUEUE_BYTE_SIZE 0x0040 #define DS_SQ_ENQUEUE_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_DS_SQ_ENQUEUE_QUEUE_SIZE 64 #define RDD_DS_SQ_ENQUEUE_QUEUE_LOG2_SIZE 6 #define DS_CPU_TX_MESSAGE_DATA_BUFFER_ADDRESS 0xa6c0 #define DS_CPU_TX_MESSAGE_DATA_BUFFER_BYTE_SIZE 0x0040 #define DS_CPU_TX_MESSAGE_DATA_BUFFER_LOG2_BYTE_SIZE 0x0006 #define DS_GSO_CONTEXT_TABLE_ADDRESS 0xa700 #define DS_GSO_CONTEXT_TABLE_BYTE_SIZE 0x0084 #define DS_GSO_CONTEXT_TABLE_LOG2_BYTE_SIZE 0x0008 #define DS_BPM_EXTRA_DDR_BUFFERS_BASE_ADDRESS 0xa784 #define DS_BPM_EXTRA_DDR_BUFFERS_BASE_BYTE_SIZE 0x0004 #define DS_BPM_EXTRA_DDR_BUFFERS_BASE_LOG2_BYTE_SIZE 0x0002 #define WLAN_MCAST_SSID_STATS_STATE_TABLE_ADDRESS 0xa788 #define WLAN_MCAST_SSID_STATS_STATE_TABLE_BYTE_SIZE 0x0006 #define WLAN_MCAST_SSID_STATS_STATE_TABLE_LOG2_BYTE_SIZE 0x0003 #define DS_MAIN_TIMER_CONTROL_DESCRIPTOR_ADDRESS 0xa78e #define DS_MAIN_TIMER_CONTROL_DESCRIPTOR_BYTE_SIZE 0x0002 #define DS_MAIN_TIMER_CONTROL_DESCRIPTOR_LOG2_BYTE_SIZE 0x0001 #define EMAC_SKB_ENQUEUED_INDEXES_FREE_PTR_ADDRESS 0xa790 #define EMAC_SKB_ENQUEUED_INDEXES_FREE_PTR_BYTE_SIZE 0x0010 #define EMAC_SKB_ENQUEUED_INDEXES_FREE_PTR_LOG2_BYTE_SIZE 0x0004 #define RDD_EMAC_SKB_ENQUEUED_INDEXES_FREE_PTR_SIZE 8 #define RDD_EMAC_SKB_ENQUEUED_INDEXES_FREE_PTR_LOG2_SIZE 3 #define DHD_COMPLETE_RING_BUFFER_ADDRESS 0xa7a0 #define DHD_COMPLETE_RING_BUFFER_BYTE_SIZE 0x0018 #define DHD_COMPLETE_RING_BUFFER_LOG2_BYTE_SIZE 0x0005 #define RDD_DHD_COMPLETE_RING_BUFFER_SIZE 3 #define RDD_DHD_COMPLETE_RING_BUFFER_LOG2_SIZE 2 #define DS_SERVICE_TM_DESCRIPTOR_ADDRESS 0xa7b8 #define DS_SERVICE_TM_DESCRIPTOR_BYTE_SIZE 0x0004 #define DS_SERVICE_TM_DESCRIPTOR_LOG2_BYTE_SIZE 0x0002 #define DS_BPM_DDR_OPTIMIZED_BUFFERS_BASE_ADDRESS 0xa7bc #define DS_BPM_DDR_OPTIMIZED_BUFFERS_BASE_BYTE_SIZE 0x0004 #define DS_BPM_DDR_OPTIMIZED_BUFFERS_BASE_LOG2_BYTE_SIZE 0x0002 #define MULTICAST_HEADER_BUFFER_ADDRESS 0xa7c0 #define MULTICAST_HEADER_BUFFER_BYTE_SIZE 0x0040 #define MULTICAST_HEADER_BUFFER_LOG2_BYTE_SIZE 0x0006 #define DS_CPU_RX_PICO_INGRESS_QUEUE_ADDRESS 0xa800 #define DS_CPU_RX_PICO_INGRESS_QUEUE_BYTE_SIZE 0x0040 #define DS_CPU_RX_PICO_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_DS_CPU_RX_PICO_INGRESS_QUEUE_SIZE 64 #define RDD_DS_CPU_RX_PICO_INGRESS_QUEUE_LOG2_SIZE 6 #define DS_GPE_COMMAND_PRIMITIVE_TABLE_ADDRESS 0xa840 #define DS_GPE_COMMAND_PRIMITIVE_TABLE_BYTE_SIZE 0x0040 #define DS_GPE_COMMAND_PRIMITIVE_TABLE_LOG2_BYTE_SIZE 0x0006 #define RDD_DS_GPE_COMMAND_PRIMITIVE_TABLE_SIZE 32 #define RDD_DS_GPE_COMMAND_PRIMITIVE_TABLE_LOG2_SIZE 5 #define DOWNSTREAM_MULTICAST_INGRESS_QUEUE_ADDRESS 0xa880 #define DOWNSTREAM_MULTICAST_INGRESS_QUEUE_BYTE_SIZE 0x0040 #define DOWNSTREAM_MULTICAST_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_DOWNSTREAM_MULTICAST_INGRESS_QUEUE_SIZE 64 #define RDD_DOWNSTREAM_MULTICAST_INGRESS_QUEUE_LOG2_SIZE 6 #define DS_DHD_TX_POST_FLOW_RING_BUFFER_ADDRESS 0xa8c0 #define DS_DHD_TX_POST_FLOW_RING_BUFFER_BYTE_SIZE 0x0030 #define DS_DHD_TX_POST_FLOW_RING_BUFFER_LOG2_BYTE_SIZE 0x0006 #define HASH_BUFFER_ADDRESS 0xa8f0 #define HASH_BUFFER_BYTE_SIZE 0x0010 #define HASH_BUFFER_LOG2_BYTE_SIZE 0x0004 #define DS_ROUTER_INGRESS_QUEUE_ADDRESS 0xa900 #define DS_ROUTER_INGRESS_QUEUE_BYTE_SIZE 0x0040 #define DS_ROUTER_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_DS_ROUTER_INGRESS_QUEUE_SIZE 64 #define RDD_DS_ROUTER_INGRESS_QUEUE_LOG2_SIZE 6 #define FC_MCAST_CONNECTION_TABLE_PLUS_ADDRESS 0xa940 #define FC_MCAST_CONNECTION_TABLE_PLUS_BYTE_SIZE 0x0014 #define FC_MCAST_CONNECTION_TABLE_PLUS_LOG2_BYTE_SIZE 0x0005 #define DS_BPM_DDR_1_OPTIMIZED_BUFFERS_BASE_ADDRESS 0xa954 #define DS_BPM_DDR_1_OPTIMIZED_BUFFERS_BASE_BYTE_SIZE 0x0004 #define DS_BPM_DDR_1_OPTIMIZED_BUFFERS_BASE_LOG2_BYTE_SIZE 0x0002 #define DS_BPM_DDR_BUFFERS_BASE_ADDRESS 0xa958 #define DS_BPM_DDR_BUFFERS_BASE_BYTE_SIZE 0x0004 #define DS_BPM_DDR_BUFFERS_BASE_LOG2_BYTE_SIZE 0x0002 #define DS_BPM_DDR_1_BUFFERS_BASE_ADDRESS 0xa95c #define DS_BPM_DDR_1_BUFFERS_BASE_BYTE_SIZE 0x0004 #define DS_BPM_DDR_1_BUFFERS_BASE_LOG2_BYTE_SIZE 0x0002 #define DS_DATA_POINTER_DUMMY_TARGET_ADDRESS 0xa960 #define DS_DATA_POINTER_DUMMY_TARGET_BYTE_SIZE 0x0014 #define DS_DATA_POINTER_DUMMY_TARGET_LOG2_BYTE_SIZE 0x0005 #define RDD_DS_DATA_POINTER_DUMMY_TARGET_SIZE 5 #define RDD_DS_DATA_POINTER_DUMMY_TARGET_LOG2_SIZE 3 #define DS_CONNECTION_TABLE_CONFIG_ADDRESS 0xa974 #define DS_CONNECTION_TABLE_CONFIG_BYTE_SIZE 0x0004 #define DS_CONNECTION_TABLE_CONFIG_LOG2_BYTE_SIZE 0x0002 #define DS_CONTEXT_TABLE_CONFIG_ADDRESS 0xa978 #define DS_CONTEXT_TABLE_CONFIG_BYTE_SIZE 0x0004 #define DS_CONTEXT_TABLE_CONFIG_LOG2_BYTE_SIZE 0x0002 #define DS_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_ADDRESS 0xa97c #define DS_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_BYTE_SIZE 0x0004 #define DS_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_LOG2_BYTE_SIZE 0x0002 #define RDD_DS_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_SIZE 4 #define RDD_DS_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_LOG2_SIZE 2 #define DS_CPU_RX_FAST_INGRESS_QUEUE_ADDRESS 0xa980 #define DS_CPU_RX_FAST_INGRESS_QUEUE_BYTE_SIZE 0x0040 #define DS_CPU_RX_FAST_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_DS_CPU_RX_FAST_INGRESS_QUEUE_SIZE 64 #define RDD_DS_CPU_RX_FAST_INGRESS_QUEUE_LOG2_SIZE 6 #define DS_DEBUG_BUFFER_ADDRESS 0xa9c0 #define DS_DEBUG_BUFFER_BYTE_SIZE 0x0080 #define DS_DEBUG_BUFFER_LOG2_BYTE_SIZE 0x0007 #define RDD_DS_DEBUG_BUFFER_SIZE 32 #define RDD_DS_DEBUG_BUFFER_LOG2_SIZE 5 #define DS_FW_MAC_ADDRS_ADDRESS 0xaa40 #define DS_FW_MAC_ADDRS_BYTE_SIZE 0x0080 #define DS_FW_MAC_ADDRS_LOG2_BYTE_SIZE 0x0007 #define RDD_DS_FW_MAC_ADDRS_SIZE 16 #define RDD_DS_FW_MAC_ADDRS_LOG2_SIZE 4 #define DS_DHD_FLOW_RING_DROP_COUNTER_ADDRESS 0xaac0 #define DS_DHD_FLOW_RING_DROP_COUNTER_BYTE_SIZE 0x0014 #define DS_DHD_FLOW_RING_DROP_COUNTER_LOG2_BYTE_SIZE 0x0005 #define RDD_DS_DHD_FLOW_RING_DROP_COUNTER_SIZE 5 #define RDD_DS_DHD_FLOW_RING_DROP_COUNTER_LOG2_SIZE 3 #define DS_DEBUG_PERIPHERALS_STATUS_REGISTER_ADDRESS 0xaad4 #define DS_DEBUG_PERIPHERALS_STATUS_REGISTER_BYTE_SIZE 0x0004 #define DS_DEBUG_PERIPHERALS_STATUS_REGISTER_LOG2_BYTE_SIZE 0x0002 #define DS_PARALLEL_PROCESSING_TASK_REORDER_FIFO_ADDRESS 0xaad8 #define DS_PARALLEL_PROCESSING_TASK_REORDER_FIFO_BYTE_SIZE 0x0004 #define DS_PARALLEL_PROCESSING_TASK_REORDER_FIFO_LOG2_BYTE_SIZE 0x0002 #define RDD_DS_PARALLEL_PROCESSING_TASK_REORDER_FIFO_SIZE 4 #define RDD_DS_PARALLEL_PROCESSING_TASK_REORDER_FIFO_LOG2_SIZE 2 #define DS_CONTEXT_CONTINUATION_TABLE_CONFIG_ADDRESS 0xaadc #define DS_CONTEXT_CONTINUATION_TABLE_CONFIG_BYTE_SIZE 0x0004 #define DS_CONTEXT_CONTINUATION_TABLE_CONFIG_LOG2_BYTE_SIZE 0x0002 #define DS_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_ADDRESS 0xaae0 #define DS_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_BYTE_SIZE 0x0010 #define DS_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_LOG2_BYTE_SIZE 0x0004 #define RDD_DS_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_SIZE 8 #define RDD_DS_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_LOG2_SIZE 3 #define DS_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_CAM_ADDRESS 0xaaf0 #define DS_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_CAM_BYTE_SIZE 0x0010 #define DS_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_CAM_LOG2_BYTE_SIZE 0x0004 #define RDD_DS_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_CAM_SIZE 8 #define RDD_DS_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_CAM_LOG2_SIZE 3 #define DS_DHD_TX_POST_INGRESS_QUEUE_ADDRESS 0xab00 #define DS_DHD_TX_POST_INGRESS_QUEUE_BYTE_SIZE 0x0040 #define DS_DHD_TX_POST_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_DS_DHD_TX_POST_INGRESS_QUEUE_SIZE 64 #define RDD_DS_DHD_TX_POST_INGRESS_QUEUE_LOG2_SIZE 6 #define DS_SYSTEM_CONFIGURATION_ADDRESS 0xab40 #define DS_SYSTEM_CONFIGURATION_BYTE_SIZE 0x0024 #define DS_SYSTEM_CONFIGURATION_LOG2_BYTE_SIZE 0x0006 #define DS_PICO_TIMER_CONTROL_DESCRIPTOR_ADDRESS 0xab64 #define DS_PICO_TIMER_CONTROL_DESCRIPTOR_BYTE_SIZE 0x0002 #define DS_PICO_TIMER_CONTROL_DESCRIPTOR_LOG2_BYTE_SIZE 0x0001 #define IPTV_COUNTERS_BUFFER_ADDRESS 0xab66 #define IPTV_COUNTERS_BUFFER_BYTE_SIZE 0x0002 #define IPTV_COUNTERS_BUFFER_LOG2_BYTE_SIZE 0x0001 #define DS_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_TABLE_ADDRESS 0xab68 #define DS_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_TABLE_BYTE_SIZE 0x0008 #define DS_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_TABLE_LOG2_BYTE_SIZE 0x0003 #define RDD_DS_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_TABLE_SIZE 8 #define RDD_DS_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_TABLE_LOG2_SIZE 3 #define DS_BRIDGE_PORT_TO_LOOKUP_PORT_MAPPING_TABLE_ADDRESS 0xab70 #define DS_BRIDGE_PORT_TO_LOOKUP_PORT_MAPPING_TABLE_BYTE_SIZE 0x0010 #define DS_BRIDGE_PORT_TO_LOOKUP_PORT_MAPPING_TABLE_LOG2_BYTE_SIZE 0x0004 #define RDD_DS_BRIDGE_PORT_TO_LOOKUP_PORT_MAPPING_TABLE_SIZE 16 #define RDD_DS_BRIDGE_PORT_TO_LOOKUP_PORT_MAPPING_TABLE_LOG2_SIZE 4 #define WLAN_MCAST_INGRESS_QUEUE_ADDRESS 0xab80 #define WLAN_MCAST_INGRESS_QUEUE_BYTE_SIZE 0x0040 #define WLAN_MCAST_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_WLAN_MCAST_INGRESS_QUEUE_SIZE 64 #define RDD_WLAN_MCAST_INGRESS_QUEUE_LOG2_SIZE 6 #define DS_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_ADDRESS 0xabc0 #define DS_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_BYTE_SIZE 0x0010 #define DS_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_LOG2_BYTE_SIZE 0x0004 #define RDD_DS_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_SIZE 8 #define RDD_DS_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_LOG2_SIZE 3 #define GSO_TX_DHD_L2_BUFFER_ADDRESS 0xabd0 #define GSO_TX_DHD_L2_BUFFER_BYTE_SIZE 0x0016 #define GSO_TX_DHD_L2_BUFFER_LOG2_BYTE_SIZE 0x0005 #define RDD_GSO_TX_DHD_L2_BUFFER_SIZE 22 #define RDD_GSO_TX_DHD_L2_BUFFER_LOG2_SIZE 5 #define CPU_TX_PICO_INGRESS_QUEUE_PTR_ADDRESS 0xabe6 #define CPU_TX_PICO_INGRESS_QUEUE_PTR_BYTE_SIZE 0x0002 #define CPU_TX_PICO_INGRESS_QUEUE_PTR_LOG2_BYTE_SIZE 0x0001 #define CPU_TX_DHD_L2_BUFFER_ADDRESS 0xabe8 #define CPU_TX_DHD_L2_BUFFER_BYTE_SIZE 0x0016 #define CPU_TX_DHD_L2_BUFFER_LOG2_BYTE_SIZE 0x0005 #define RDD_CPU_TX_DHD_L2_BUFFER_SIZE 22 #define RDD_CPU_TX_DHD_L2_BUFFER_LOG2_SIZE 5 #define FREE_PACKET_DESCRIPTORS_POOL_THRESHOLD_ADDRESS 0xabfe #define FREE_PACKET_DESCRIPTORS_POOL_THRESHOLD_BYTE_SIZE 0x0002 #define FREE_PACKET_DESCRIPTORS_POOL_THRESHOLD_LOG2_BYTE_SIZE 0x0001 #define CPU_TX_FAST_QUEUE_ADDRESS 0xac00 #define CPU_TX_FAST_QUEUE_BYTE_SIZE 0x0080 #define CPU_TX_FAST_QUEUE_LOG2_BYTE_SIZE 0x0007 #define RDD_CPU_TX_FAST_QUEUE_SIZE 16 #define RDD_CPU_TX_FAST_QUEUE_LOG2_SIZE 4 #define ETH_TX_SCRATCH_ADDRESS 0xac80 #define ETH_TX_SCRATCH_BYTE_SIZE 0x0010 #define ETH_TX_SCRATCH_LOG2_BYTE_SIZE 0x0004 #define RDD_ETH_TX_SCRATCH_SIZE 16 #define RDD_ETH_TX_SCRATCH_LOG2_SIZE 4 #define DS_INGRESS_CLASSIFICATION_KEY_BUFFER_ADDRESS 0xac90 #define DS_INGRESS_CLASSIFICATION_KEY_BUFFER_BYTE_SIZE 0x0010 #define DS_INGRESS_CLASSIFICATION_KEY_BUFFER_LOG2_BYTE_SIZE 0x0004 #define CPU_TX_DS_PICO_DHD_TX_POST_CONTEXT_ADDRESS 0xaca0 #define CPU_TX_DS_PICO_DHD_TX_POST_CONTEXT_BYTE_SIZE 0x0010 #define CPU_TX_DS_PICO_DHD_TX_POST_CONTEXT_LOG2_BYTE_SIZE 0x0004 #define WLAN_MCAST_DHD_TX_POST_CONTEXT_ADDRESS 0xacb0 #define WLAN_MCAST_DHD_TX_POST_CONTEXT_BYTE_SIZE 0x0010 #define WLAN_MCAST_DHD_TX_POST_CONTEXT_LOG2_BYTE_SIZE 0x0004 #define GSO_TX_DS_PICO_DHD_TX_POST_CONTEXT_ADDRESS 0xacc0 #define GSO_TX_DS_PICO_DHD_TX_POST_CONTEXT_BYTE_SIZE 0x0010 #define GSO_TX_DS_PICO_DHD_TX_POST_CONTEXT_LOG2_BYTE_SIZE 0x0004 #define GSO_TX_ENQUEUE_PCI_PACKET_CONTEXT_ADDRESS 0xacd0 #define GSO_TX_ENQUEUE_PCI_PACKET_CONTEXT_BYTE_SIZE 0x0008 #define GSO_TX_ENQUEUE_PCI_PACKET_CONTEXT_LOG2_BYTE_SIZE 0x0003 #define CPU_TX_ENQUEUE_PCI_PACKET_CONTEXT_ADDRESS 0xacd8 #define CPU_TX_ENQUEUE_PCI_PACKET_CONTEXT_BYTE_SIZE 0x0008 #define CPU_TX_ENQUEUE_PCI_PACKET_CONTEXT_LOG2_BYTE_SIZE 0x0003 #define EMAC_SKB_ENQUEUED_INDEXES_FIFO_COUNTERS_ADDRESS 0xace0 #define EMAC_SKB_ENQUEUED_INDEXES_FIFO_COUNTERS_BYTE_SIZE 0x0005 #define EMAC_SKB_ENQUEUED_INDEXES_FIFO_COUNTERS_LOG2_BYTE_SIZE 0x0003 #define RDD_EMAC_SKB_ENQUEUED_INDEXES_FIFO_COUNTERS_SIZE 5 #define RDD_EMAC_SKB_ENQUEUED_INDEXES_FIFO_COUNTERS_LOG2_SIZE 3 #define ETH_TX_EMACS_STATUS_ADDRESS 0xace5 #define ETH_TX_EMACS_STATUS_BYTE_SIZE 0x0001 #define ETH_TX_EMACS_STATUS_LOG2_BYTE_SIZE 0x0001 #define DOWNSTREAM_MULTICAST_LAN_ENQUEUE_INGRESS_QUEUE_PTR_ADDRESS 0xace6 #define DOWNSTREAM_MULTICAST_LAN_ENQUEUE_INGRESS_QUEUE_PTR_BYTE_SIZE 0x0002 #define DOWNSTREAM_MULTICAST_LAN_ENQUEUE_INGRESS_QUEUE_PTR_LOG2_BYTE_SIZE 0x0001 #define HASH_BASED_FORWARDING_PORT_TABLE_ADDRESS 0xace8 #define HASH_BASED_FORWARDING_PORT_TABLE_BYTE_SIZE 0x0004 #define HASH_BASED_FORWARDING_PORT_TABLE_LOG2_BYTE_SIZE 0x0002 #define RDD_HASH_BASED_FORWARDING_PORT_TABLE_SIZE 4 #define RDD_HASH_BASED_FORWARDING_PORT_TABLE_LOG2_SIZE 2 #define GSO_DESC_PTR_ADDRESS 0xacec #define GSO_DESC_PTR_BYTE_SIZE 0x0004 #define GSO_DESC_PTR_LOG2_BYTE_SIZE 0x0002 #define FIREWALL_IPV6_R16_BUFFER_ADDRESS 0xacf0 #define FIREWALL_IPV6_R16_BUFFER_BYTE_SIZE 0x0004 #define FIREWALL_IPV6_R16_BUFFER_LOG2_BYTE_SIZE 0x0002 #define CPU_RX_PD_INGRESS_QUEUE_PTR_ADDRESS 0xacf4 #define CPU_RX_PD_INGRESS_QUEUE_PTR_BYTE_SIZE 0x0002 #define CPU_RX_PD_INGRESS_QUEUE_PTR_LOG2_BYTE_SIZE 0x0001 #define DS_CPU_RX_PICO_INGRESS_QUEUE_PTR_ADDRESS 0xacf6 #define DS_CPU_RX_PICO_INGRESS_QUEUE_PTR_BYTE_SIZE 0x0002 #define DS_CPU_RX_PICO_INGRESS_QUEUE_PTR_LOG2_BYTE_SIZE 0x0001 #define DS_BPM_DDR_BUFFER_HEADROOM_SIZE_ADDRESS 0xacf8 #define DS_BPM_DDR_BUFFER_HEADROOM_SIZE_BYTE_SIZE 0x0002 #define DS_BPM_DDR_BUFFER_HEADROOM_SIZE_LOG2_BYTE_SIZE 0x0001 #define DS_BPM_DDR_BUFFER_HEADROOM_SIZE_2_BYTE_RESOLUTION_ADDRESS 0xacfa #define DS_BPM_DDR_BUFFER_HEADROOM_SIZE_2_BYTE_RESOLUTION_BYTE_SIZE 0x0002 #define DS_BPM_DDR_BUFFER_HEADROOM_SIZE_2_BYTE_RESOLUTION_LOG2_BYTE_SIZE 0x0001 #define DS_CPU_RX_FAST_INGRESS_QUEUE_PTR_ADDRESS 0xacfc #define DS_CPU_RX_FAST_INGRESS_QUEUE_PTR_BYTE_SIZE 0x0002 #define DS_CPU_RX_FAST_INGRESS_QUEUE_PTR_LOG2_BYTE_SIZE 0x0001 #define DS_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_PTR_ADDRESS 0xacfe #define DS_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_PTR_BYTE_SIZE 0x0002 #define DS_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_PTR_LOG2_BYTE_SIZE 0x0001 #define CPU_TX_PICO_QUEUE_ADDRESS 0xad00 #define CPU_TX_PICO_QUEUE_BYTE_SIZE 0x0080 #define CPU_TX_PICO_QUEUE_LOG2_BYTE_SIZE 0x0007 #define RDD_CPU_TX_PICO_QUEUE_SIZE 16 #define RDD_CPU_TX_PICO_QUEUE_LOG2_SIZE 4 #define DS_ANY_SRC_PORT_FLOW_COUNTER_ADDRESS 0xad80 #define DS_ANY_SRC_PORT_FLOW_COUNTER_BYTE_SIZE 0x0002 #define DS_ANY_SRC_PORT_FLOW_COUNTER_LOG2_BYTE_SIZE 0x0001 #define GSO_PICO_QUEUE_PTR_ADDRESS 0xad82 #define GSO_PICO_QUEUE_PTR_BYTE_SIZE 0x0002 #define GSO_PICO_QUEUE_PTR_LOG2_BYTE_SIZE 0x0001 #define DS_DHD_TX_POST_HOST_DATA_PTR_BUFFER_ADDRESS 0xad84 #define DS_DHD_TX_POST_HOST_DATA_PTR_BUFFER_BYTE_SIZE 0x0004 #define DS_DHD_TX_POST_HOST_DATA_PTR_BUFFER_LOG2_BYTE_SIZE 0x0002 #define GSO_TX_DHD_HOST_BUF_PTR_ADDRESS 0xad88 #define GSO_TX_DHD_HOST_BUF_PTR_BYTE_SIZE 0x0004 #define GSO_TX_DHD_HOST_BUF_PTR_LOG2_BYTE_SIZE 0x0002 #define RDD_GSO_TX_DHD_HOST_BUF_PTR_SIZE 4 #define RDD_GSO_TX_DHD_HOST_BUF_PTR_LOG2_SIZE 2 #define DS_MEMLIB_SEMAPHORE_ADDRESS 0xad8c #define DS_MEMLIB_SEMAPHORE_BYTE_SIZE 0x0002 #define DS_MEMLIB_SEMAPHORE_LOG2_BYTE_SIZE 0x0001 #define WAN_PHYSICAL_PORT_ADDRESS 0xad8e #define WAN_PHYSICAL_PORT_BYTE_SIZE 0x0002 #define WAN_PHYSICAL_PORT_LOG2_BYTE_SIZE 0x0001 #define CPU_TX_DHD_HOST_BUF_PTR_ADDRESS 0xad90 #define CPU_TX_DHD_HOST_BUF_PTR_BYTE_SIZE 0x0004 #define CPU_TX_DHD_HOST_BUF_PTR_LOG2_BYTE_SIZE 0x0002 #define RDD_CPU_TX_DHD_HOST_BUF_PTR_SIZE 4 #define RDD_CPU_TX_DHD_HOST_BUF_PTR_LOG2_SIZE 2 #define DOWNSTREAM_MULTICAST_LAN_ENQUEUE_SERVICE_QUEUE_INGRESS_QUEUE_PTR_ADDRESS 0xad94 #define DOWNSTREAM_MULTICAST_LAN_ENQUEUE_SERVICE_QUEUE_INGRESS_QUEUE_PTR_BYTE_SIZE 0x0002 #define DOWNSTREAM_MULTICAST_LAN_ENQUEUE_SERVICE_QUEUE_INGRESS_QUEUE_PTR_LOG2_BYTE_SIZE 0x0001 #define DS_RUNNER_CONGESTION_STATE_ADDRESS 0xad96 #define DS_RUNNER_CONGESTION_STATE_BYTE_SIZE 0x0002 #define DS_RUNNER_CONGESTION_STATE_LOG2_BYTE_SIZE 0x0001 #define DS_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_PTR_ADDRESS 0xad98 #define DS_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_PTR_BYTE_SIZE 0x0002 #define DS_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_PTR_LOG2_BYTE_SIZE 0x0001 #define DHD_TX_COMPLETE_BPM_REF_COUNTER_ADDRESS 0xad9a #define DHD_TX_COMPLETE_BPM_REF_COUNTER_BYTE_SIZE 0x0002 #define DHD_TX_COMPLETE_BPM_REF_COUNTER_LOG2_BYTE_SIZE 0x0001 #define DHD_TX_POST_CPU_BPM_REF_COUNTER_ADDRESS 0xad9c #define DHD_TX_POST_CPU_BPM_REF_COUNTER_BYTE_SIZE 0x0002 #define DHD_TX_POST_CPU_BPM_REF_COUNTER_LOG2_BYTE_SIZE 0x0001 #define DS_DHD_BPM_CONGESTION_UG3_DROP_COUNTER_ADDRESS 0xad9e #define DS_DHD_BPM_CONGESTION_UG3_DROP_COUNTER_BYTE_SIZE 0x0002 #define DS_DHD_BPM_CONGESTION_UG3_DROP_COUNTER_LOG2_BYTE_SIZE 0x0001 #define DS_DHD_BPM_CONGESTION_ALLOC_FAIL_DROP_COUNTER_ADDRESS 0xada0 #define DS_DHD_BPM_CONGESTION_ALLOC_FAIL_DROP_COUNTER_BYTE_SIZE 0x0002 #define DS_DHD_BPM_CONGESTION_ALLOC_FAIL_DROP_COUNTER_LOG2_BYTE_SIZE 0x0001 #define PRIVATE_A_DUMMY_STORE_ADDRESS 0xada2 #define PRIVATE_A_DUMMY_STORE_BYTE_SIZE 0x0001 #define PRIVATE_A_DUMMY_STORE_LOG2_BYTE_SIZE 0x0001 #define ETH_TX_INTER_LAN_SCHEDULING_OFFSET_ADDRESS 0xada3 #define ETH_TX_INTER_LAN_SCHEDULING_OFFSET_BYTE_SIZE 0x0001 #define ETH_TX_INTER_LAN_SCHEDULING_OFFSET_LOG2_BYTE_SIZE 0x0001 #define DS_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_PTR_ADDRESS 0xada4 #define DS_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_PTR_BYTE_SIZE 0x0001 #define DS_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_PTR_LOG2_BYTE_SIZE 0x0001 #define DS_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_PTR_ADDRESS 0xada5 #define DS_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_PTR_BYTE_SIZE 0x0001 #define DS_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_PTR_LOG2_BYTE_SIZE 0x0001 #define CPU_TX_DS_PICO_SEMAPHORE_ADDRESS 0xada6 #define CPU_TX_DS_PICO_SEMAPHORE_BYTE_SIZE 0x0001 #define CPU_TX_DS_PICO_SEMAPHORE_LOG2_BYTE_SIZE 0x0001 #define DS_FC_ACCEL_MODE_ADDRESS 0xada7 #define DS_FC_ACCEL_MODE_BYTE_SIZE 0x0001 #define DS_FC_ACCEL_MODE_LOG2_BYTE_SIZE 0x0001 #define DS_INGRESS_CLASSIFICATION_RULE_CFG_DESCRIPTOR_ADDRESS 0xada8 #define DS_INGRESS_CLASSIFICATION_RULE_CFG_DESCRIPTOR_BYTE_SIZE 0x0001 #define DS_INGRESS_CLASSIFICATION_RULE_CFG_DESCRIPTOR_LOG2_BYTE_SIZE 0x0001 #define DS_PACKET_BUFFER_SIZE_ASR_8_ADDRESS 0xada9 #define DS_PACKET_BUFFER_SIZE_ASR_8_BYTE_SIZE 0x0001 #define DS_PACKET_BUFFER_SIZE_ASR_8_LOG2_BYTE_SIZE 0x0001 #define DS_MAIN_DMA_SYNCRONIZATION_ADDRESS_ADDRESS 0xadaa #define DS_MAIN_DMA_SYNCRONIZATION_ADDRESS_BYTE_SIZE 0x0001 #define DS_MAIN_DMA_SYNCRONIZATION_ADDRESS_LOG2_BYTE_SIZE 0x0001 #define DS_PICO_DMA_SYNCRONIZATION_ADDRESS_ADDRESS 0xadab #define DS_PICO_DMA_SYNCRONIZATION_ADDRESS_BYTE_SIZE 0x0001 #define DS_PICO_DMA_SYNCRONIZATION_ADDRESS_LOG2_BYTE_SIZE 0x0001 #define DS_RUNNER_FLOW_IH_RESPONSE_MUTEX_ADDRESS 0xadac #define DS_RUNNER_FLOW_IH_RESPONSE_MUTEX_BYTE_SIZE 0x0001 #define DS_RUNNER_FLOW_IH_RESPONSE_MUTEX_LOG2_BYTE_SIZE 0x0001 #define DS_PARALLEL_PROCESSING_SLAVE_VECTOR_ADDRESS 0xadad #define DS_PARALLEL_PROCESSING_SLAVE_VECTOR_BYTE_SIZE 0x0001 #define DS_PARALLEL_PROCESSING_SLAVE_VECTOR_LOG2_BYTE_SIZE 0x0001 #define DS_PARALLEL_PROCESSING_CONTEXT_CACHE_MODE_ADDRESS 0xadae #define DS_PARALLEL_PROCESSING_CONTEXT_CACHE_MODE_BYTE_SIZE 0x0001 #define DS_PARALLEL_PROCESSING_CONTEXT_CACHE_MODE_LOG2_BYTE_SIZE 0x0001 #define DS_FAST_MALLOC_RESULT_MUTEX_ADDRESS 0xadaf #define DS_FAST_MALLOC_RESULT_MUTEX_BYTE_SIZE 0x0001 #define DS_FAST_MALLOC_RESULT_MUTEX_LOG2_BYTE_SIZE 0x0001 #define DS_PICO_MALLOC_RESULT_MUTEX_ADDRESS 0xadb0 #define DS_PICO_MALLOC_RESULT_MUTEX_BYTE_SIZE 0x0001 #define DS_PICO_MALLOC_RESULT_MUTEX_LOG2_BYTE_SIZE 0x0001 #define DS_RX_SBPM_TO_FPM_COPY_SEMAPHORE_ADDRESS 0xadb1 #define DS_RX_SBPM_TO_FPM_COPY_SEMAPHORE_BYTE_SIZE 0x0001 #define DS_RX_SBPM_TO_FPM_COPY_SEMAPHORE_LOG2_BYTE_SIZE 0x0001 #define DS_FW_MAC_ADDRS_COUNT_ADDRESS 0xadb2 #define DS_FW_MAC_ADDRS_COUNT_BYTE_SIZE 0x0001 #define DS_FW_MAC_ADDRS_COUNT_LOG2_BYTE_SIZE 0x0001 #define DS_DHD_DMA_SYNCHRONIZATION_ADDRESS 0xadb3 #define DS_DHD_DMA_SYNCHRONIZATION_BYTE_SIZE 0x0001 #define DS_DHD_DMA_SYNCHRONIZATION_LOG2_BYTE_SIZE 0x0001 #define DHD_TX_POST_CPU_SEMAPHORE_ADDRESS 0xadb4 #define DHD_TX_POST_CPU_SEMAPHORE_BYTE_SIZE 0x0001 #define DHD_TX_POST_CPU_SEMAPHORE_LOG2_BYTE_SIZE 0x0001 #define EMAC_ABSOLUTE_TX_BBH_COUNTER_ADDRESS 0xb2c0 #define EMAC_ABSOLUTE_TX_BBH_COUNTER_BYTE_SIZE 0x0050 #define EMAC_ABSOLUTE_TX_BBH_COUNTER_LOG2_BYTE_SIZE 0x0007 #define RDD_EMAC_ABSOLUTE_TX_BBH_COUNTER_SIZE 10 #define RDD_EMAC_ABSOLUTE_TX_BBH_COUNTER_LOG2_SIZE 4 #define FREE_PACKET_DESCRIPTORS_POOL_DESCRIPTOR_ADDRESS 0xb310 #define FREE_PACKET_DESCRIPTORS_POOL_DESCRIPTOR_BYTE_SIZE 0x000a #define FREE_PACKET_DESCRIPTORS_POOL_DESCRIPTOR_LOG2_BYTE_SIZE 0x0004 #define GPON_RX_DIRECT_DESCRIPTORS_ADDRESS 0xb400 #define GPON_RX_DIRECT_DESCRIPTORS_BYTE_SIZE 0x0100 #define GPON_RX_DIRECT_DESCRIPTORS_LOG2_BYTE_SIZE 0x0008 #define RDD_GPON_RX_DIRECT_DESCRIPTORS_SIZE 32 #define RDD_GPON_RX_DIRECT_DESCRIPTORS_LOG2_SIZE 5 #define RUNNER_FLOW_IH_RESPONSE_ADDRESS 0xb6f0 #define RUNNER_FLOW_IH_RESPONSE_BYTE_SIZE 0x0008 #define RUNNER_FLOW_IH_RESPONSE_LOG2_BYTE_SIZE 0x0003 #define ETH_TX_MAC_TABLE_ADDRESS 0xbb00 #define ETH_TX_MAC_TABLE_BYTE_SIZE 0x0100 #define ETH_TX_MAC_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_ETH_TX_MAC_TABLE_SIZE 8 #define RDD_ETH_TX_MAC_TABLE_LOG2_SIZE 3 #define GPON_RX_NORMAL_DESCRIPTORS_ADDRESS 0xbe00 #define GPON_RX_NORMAL_DESCRIPTORS_BYTE_SIZE 0x0100 #define GPON_RX_NORMAL_DESCRIPTORS_LOG2_BYTE_SIZE 0x0008 #define RDD_GPON_RX_NORMAL_DESCRIPTORS_SIZE 32 #define RDD_GPON_RX_NORMAL_DESCRIPTORS_LOG2_SIZE 5 /* PRIVATE_B */ #define US_INGRESS_HANDLER_BUFFER_ADDRESS 0x0000 #define US_INGRESS_HANDLER_BUFFER_BYTE_SIZE 0x2000 #define US_INGRESS_HANDLER_BUFFER_LOG2_BYTE_SIZE 0x000d #define RDD_US_INGRESS_HANDLER_BUFFER_SIZE 32 #define RDD_US_INGRESS_HANDLER_BUFFER_LOG2_SIZE 5 #define US_CSO_CHUNK_BUFFER_ADDRESS 0x2000 #define US_CSO_CHUNK_BUFFER_BYTE_SIZE 0x0080 #define US_CSO_CHUNK_BUFFER_LOG2_BYTE_SIZE 0x0007 #define US_CSO_PSEUDO_HEADER_BUFFER_ADDRESS 0x2080 #define US_CSO_PSEUDO_HEADER_BUFFER_BYTE_SIZE 0x0028 #define US_CSO_PSEUDO_HEADER_BUFFER_LOG2_BYTE_SIZE 0x0006 #define US_CPU_PARAMETERS_BLOCK_ADDRESS 0x20a8 #define US_CPU_PARAMETERS_BLOCK_BYTE_SIZE 0x0008 #define US_CPU_PARAMETERS_BLOCK_LOG2_BYTE_SIZE 0x0003 #define US_RATE_CONTROL_BUDGET_ALLOCATOR_TABLE_ADDRESS 0x20b0 #define US_RATE_CONTROL_BUDGET_ALLOCATOR_TABLE_BYTE_SIZE 0x0010 #define US_RATE_CONTROL_BUDGET_ALLOCATOR_TABLE_LOG2_BYTE_SIZE 0x0004 #define RDD_US_RATE_CONTROL_BUDGET_ALLOCATOR_TABLE_SIZE 8 #define RDD_US_RATE_CONTROL_BUDGET_ALLOCATOR_TABLE_LOG2_SIZE 3 #define US_CPU_REASON_TO_METER_TABLE_ADDRESS 0x20c0 #define US_CPU_REASON_TO_METER_TABLE_BYTE_SIZE 0x0040 #define US_CPU_REASON_TO_METER_TABLE_LOG2_BYTE_SIZE 0x0006 #define RDD_US_CPU_REASON_TO_METER_TABLE_SIZE 64 #define RDD_US_CPU_REASON_TO_METER_TABLE_LOG2_SIZE 6 #define US_MAIN_PROFILING_BUFFER_RUNNER_ADDRESS 0x2100 #define US_MAIN_PROFILING_BUFFER_RUNNER_BYTE_SIZE 0x0100 #define US_MAIN_PROFILING_BUFFER_RUNNER_LOG2_BYTE_SIZE 0x0008 #define RDD_US_MAIN_PROFILING_BUFFER_RUNNER_SIZE 32 #define RDD_US_MAIN_PROFILING_BUFFER_RUNNER_LOG2_SIZE 5 #define US_FREE_PACKET_DESCRIPTORS_POOL_ADDRESS 0x2200 #define US_FREE_PACKET_DESCRIPTORS_POOL_BYTE_SIZE 0x6000 #define US_FREE_PACKET_DESCRIPTORS_POOL_LOG2_BYTE_SIZE 0x000f #define RDD_US_FREE_PACKET_DESCRIPTORS_POOL_SIZE 3072 #define RDD_US_FREE_PACKET_DESCRIPTORS_POOL_LOG2_SIZE 12 #define US_RUNNER_FLOW_HEADER_BUFFER_ADDRESS 0x8200 #define US_RUNNER_FLOW_HEADER_BUFFER_BYTE_SIZE 0x0180 #define US_RUNNER_FLOW_HEADER_BUFFER_LOG2_BYTE_SIZE 0x0009 #define RDD_US_RUNNER_FLOW_HEADER_BUFFER_SIZE 3 #define RDD_US_RUNNER_FLOW_HEADER_BUFFER_LOG2_SIZE 2 #define US_QUEUE_PROFILE_TABLE_ADDRESS 0x8380 #define US_QUEUE_PROFILE_TABLE_BYTE_SIZE 0x0080 #define US_QUEUE_PROFILE_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_US_QUEUE_PROFILE_TABLE_SIZE 8 #define RDD_US_QUEUE_PROFILE_TABLE_LOG2_SIZE 3 #define WAN_CHANNELS_8_39_TABLE_ADDRESS 0x8400 #define WAN_CHANNELS_8_39_TABLE_BYTE_SIZE 0x0400 #define WAN_CHANNELS_8_39_TABLE_LOG2_BYTE_SIZE 0x000a #define RDD_WAN_CHANNELS_8_39_TABLE_SIZE 32 #define RDD_WAN_CHANNELS_8_39_TABLE_LOG2_SIZE 5 #define US_POLICER_TABLE_ADDRESS 0x8800 #define US_POLICER_TABLE_BYTE_SIZE 0x0100 #define US_POLICER_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_US_POLICER_TABLE_SIZE 16 #define RDD_US_POLICER_TABLE_LOG2_SIZE 4 #define US_CPU_RX_METER_TABLE_ADDRESS 0x8900 #define US_CPU_RX_METER_TABLE_BYTE_SIZE 0x0080 #define US_CPU_RX_METER_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_US_CPU_RX_METER_TABLE_SIZE 16 #define RDD_US_CPU_RX_METER_TABLE_LOG2_SIZE 4 #define US_SBPM_REPLY_ADDRESS 0x8980 #define US_SBPM_REPLY_BYTE_SIZE 0x0080 #define US_SBPM_REPLY_LOG2_BYTE_SIZE 0x0007 #define US_CPU_TX_BBH_DESCRIPTORS_ADDRESS 0x8a00 #define US_CPU_TX_BBH_DESCRIPTORS_BYTE_SIZE 0x0100 #define US_CPU_TX_BBH_DESCRIPTORS_LOG2_BYTE_SIZE 0x0008 #define RDD_US_CPU_TX_BBH_DESCRIPTORS_SIZE 32 #define RDD_US_CPU_TX_BBH_DESCRIPTORS_LOG2_SIZE 5 #define US_FORWARDING_MATRIX_TABLE_ADDRESS 0x8b00 #define US_FORWARDING_MATRIX_TABLE_BYTE_SIZE 0x0090 #define US_FORWARDING_MATRIX_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_US_FORWARDING_MATRIX_TABLE_SIZE 9 #define RDD_US_FORWARDING_MATRIX_TABLE_LOG2_SIZE 4 #define RDD_US_FORWARDING_MATRIX_TABLE_SIZE2 16 #define RDD_US_FORWARDING_MATRIX_TABLE_LOG2_SIZE2 4 #define US_TIMER_SCHEDULER_PRIMITIVE_TABLE_ADDRESS 0x8b90 #define US_TIMER_SCHEDULER_PRIMITIVE_TABLE_BYTE_SIZE 0x0010 #define US_TIMER_SCHEDULER_PRIMITIVE_TABLE_LOG2_BYTE_SIZE 0x0004 #define RDD_US_TIMER_SCHEDULER_PRIMITIVE_TABLE_SIZE 8 #define RDD_US_TIMER_SCHEDULER_PRIMITIVE_TABLE_LOG2_SIZE 3 #define US_MAIN_TIMER_TASK_DESCRIPTOR_TABLE_ADDRESS 0x8ba0 #define US_MAIN_TIMER_TASK_DESCRIPTOR_TABLE_BYTE_SIZE 0x0020 #define US_MAIN_TIMER_TASK_DESCRIPTOR_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_US_MAIN_TIMER_TASK_DESCRIPTOR_TABLE_SIZE 4 #define RDD_US_MAIN_TIMER_TASK_DESCRIPTOR_TABLE_LOG2_SIZE 2 #define US_TRAFFIC_CLASS_TO_QUEUE_TABLE_ADDRESS 0x8bc0 #define US_TRAFFIC_CLASS_TO_QUEUE_TABLE_BYTE_SIZE 0x0040 #define US_TRAFFIC_CLASS_TO_QUEUE_TABLE_LOG2_BYTE_SIZE 0x0006 #define RDD_US_TRAFFIC_CLASS_TO_QUEUE_TABLE_SIZE 8 #define RDD_US_TRAFFIC_CLASS_TO_QUEUE_TABLE_LOG2_SIZE 3 #define RDD_US_TRAFFIC_CLASS_TO_QUEUE_TABLE_SIZE2 8 #define RDD_US_TRAFFIC_CLASS_TO_QUEUE_TABLE_LOG2_SIZE2 3 #define US_WAN_FLOW_TABLE_ADDRESS 0x8c00 #define US_WAN_FLOW_TABLE_BYTE_SIZE 0x0400 #define US_WAN_FLOW_TABLE_LOG2_BYTE_SIZE 0x000a #define RDD_US_WAN_FLOW_TABLE_SIZE 256 #define RDD_US_WAN_FLOW_TABLE_LOG2_SIZE 8 #define US_INGRESS_HANDLER_SKB_DATA_POINTER_ADDRESS 0x9000 #define US_INGRESS_HANDLER_SKB_DATA_POINTER_BYTE_SIZE 0x0080 #define US_INGRESS_HANDLER_SKB_DATA_POINTER_LOG2_BYTE_SIZE 0x0007 #define RDD_US_INGRESS_HANDLER_SKB_DATA_POINTER_SIZE 32 #define RDD_US_INGRESS_HANDLER_SKB_DATA_POINTER_LOG2_SIZE 5 #define US_INGRESS_CLASSIFICATION_RULE_CFG_TABLE_ADDRESS 0x9080 #define US_INGRESS_CLASSIFICATION_RULE_CFG_TABLE_BYTE_SIZE 0x0080 #define US_INGRESS_CLASSIFICATION_RULE_CFG_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_US_INGRESS_CLASSIFICATION_RULE_CFG_TABLE_SIZE 16 #define RDD_US_INGRESS_CLASSIFICATION_RULE_CFG_TABLE_LOG2_SIZE 4 #define US_PROFILING_BUFFER_PICO_RUNNER_ADDRESS 0x9100 #define US_PROFILING_BUFFER_PICO_RUNNER_BYTE_SIZE 0x0100 #define US_PROFILING_BUFFER_PICO_RUNNER_LOG2_BYTE_SIZE 0x0008 #define US_INGRESS_CLASSIFICATION_KEY_PRIMITIVE_TABLE_ADDRESS 0x9200 #define US_INGRESS_CLASSIFICATION_KEY_PRIMITIVE_TABLE_BYTE_SIZE 0x0040 #define US_INGRESS_CLASSIFICATION_KEY_PRIMITIVE_TABLE_LOG2_BYTE_SIZE 0x0006 #define RDD_US_INGRESS_CLASSIFICATION_KEY_PRIMITIVE_TABLE_SIZE 32 #define RDD_US_INGRESS_CLASSIFICATION_KEY_PRIMITIVE_TABLE_LOG2_SIZE 5 #define US_FAST_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_ADDRESS 0x9240 #define US_FAST_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_BYTE_SIZE 0x0040 #define US_FAST_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_US_FAST_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_SIZE 16 #define RDD_US_FAST_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_LOG2_SIZE 4 #define US_PICO_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_ADDRESS 0x9280 #define US_PICO_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_BYTE_SIZE 0x0040 #define US_PICO_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_US_PICO_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_SIZE 16 #define RDD_US_PICO_CPU_TX_DESCRIPTOR_ABS_DATA_PTR_QUEUE_LOG2_SIZE 4 #define US_PICO_TIMER_TASK_DESCRIPTOR_TABLE_ADDRESS 0x92c0 #define US_PICO_TIMER_TASK_DESCRIPTOR_TABLE_BYTE_SIZE 0x0020 #define US_PICO_TIMER_TASK_DESCRIPTOR_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_US_PICO_TIMER_TASK_DESCRIPTOR_TABLE_SIZE 4 #define RDD_US_PICO_TIMER_TASK_DESCRIPTOR_TABLE_LOG2_SIZE 2 #define US_FC_L2_UCAST_TUPLE_BUFFER_ADDRESS 0x92e0 #define US_FC_L2_UCAST_TUPLE_BUFFER_BYTE_SIZE 0x0020 #define US_FC_L2_UCAST_TUPLE_BUFFER_LOG2_BYTE_SIZE 0x0005 #define US_RATE_LIMITER_TABLE_ADDRESS 0x9300 #define US_RATE_LIMITER_TABLE_BYTE_SIZE 0x0080 #define US_RATE_LIMITER_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_US_RATE_LIMITER_TABLE_SIZE 16 #define RDD_US_RATE_LIMITER_TABLE_LOG2_SIZE 4 #define DHD_RX_COMPLETE_FLOW_RING_BUFFER_ADDRESS 0x9380 #define DHD_RX_COMPLETE_FLOW_RING_BUFFER_BYTE_SIZE 0x0060 #define DHD_RX_COMPLETE_FLOW_RING_BUFFER_LOG2_BYTE_SIZE 0x0007 #define RDD_DHD_RX_COMPLETE_FLOW_RING_BUFFER_SIZE 3 #define RDD_DHD_RX_COMPLETE_FLOW_RING_BUFFER_LOG2_SIZE 2 #define US_FAST_RUNNER_GLOBAL_REGISTERS_INIT_ADDRESS 0x93e0 #define US_FAST_RUNNER_GLOBAL_REGISTERS_INIT_BYTE_SIZE 0x0020 #define US_FAST_RUNNER_GLOBAL_REGISTERS_INIT_LOG2_BYTE_SIZE 0x0005 #define RDD_US_FAST_RUNNER_GLOBAL_REGISTERS_INIT_SIZE 8 #define RDD_US_FAST_RUNNER_GLOBAL_REGISTERS_INIT_LOG2_SIZE 3 #define US_CONNECTION_CONTEXT_BUFFER_ADDRESS 0x9400 #define US_CONNECTION_CONTEXT_BUFFER_BYTE_SIZE 0x0400 #define US_CONNECTION_CONTEXT_BUFFER_LOG2_BYTE_SIZE 0x000a #define RDD_US_CONNECTION_CONTEXT_BUFFER_SIZE 8 #define RDD_US_CONNECTION_CONTEXT_BUFFER_LOG2_SIZE 3 #define US_INGRESS_CLASSIFICATION_CONTEXT_TABLE_ADDRESS 0x9800 #define US_INGRESS_CLASSIFICATION_CONTEXT_TABLE_BYTE_SIZE 0x0800 #define US_INGRESS_CLASSIFICATION_CONTEXT_TABLE_LOG2_BYTE_SIZE 0x000b #define RDD_US_INGRESS_CLASSIFICATION_CONTEXT_TABLE_SIZE 256 #define RDD_US_INGRESS_CLASSIFICATION_CONTEXT_TABLE_LOG2_SIZE 8 #define WAN_CHANNELS_0_7_TABLE_ADDRESS 0xa000 #define WAN_CHANNELS_0_7_TABLE_BYTE_SIZE 0x02c0 #define WAN_CHANNELS_0_7_TABLE_LOG2_BYTE_SIZE 0x000a #define RDD_WAN_CHANNELS_0_7_TABLE_SIZE 8 #define RDD_WAN_CHANNELS_0_7_TABLE_LOG2_SIZE 3 #define US_CPU_TX_MESSAGE_DATA_BUFFER_ADDRESS 0xa2c0 #define US_CPU_TX_MESSAGE_DATA_BUFFER_BYTE_SIZE 0x0040 #define US_CPU_TX_MESSAGE_DATA_BUFFER_LOG2_BYTE_SIZE 0x0006 #define DHD_RX_POST_FLOW_RING_BUFFER_ADDRESS 0xa300 #define DHD_RX_POST_FLOW_RING_BUFFER_BYTE_SIZE 0x0060 #define DHD_RX_POST_FLOW_RING_BUFFER_LOG2_BYTE_SIZE 0x0007 #define RDD_DHD_RX_POST_FLOW_RING_BUFFER_SIZE 3 #define RDD_DHD_RX_POST_FLOW_RING_BUFFER_LOG2_SIZE 2 #define US_PICO_RUNNER_GLOBAL_REGISTERS_INIT_ADDRESS 0xa360 #define US_PICO_RUNNER_GLOBAL_REGISTERS_INIT_BYTE_SIZE 0x0020 #define US_PICO_RUNNER_GLOBAL_REGISTERS_INIT_LOG2_BYTE_SIZE 0x0005 #define RDD_US_PICO_RUNNER_GLOBAL_REGISTERS_INIT_SIZE 8 #define RDD_US_PICO_RUNNER_GLOBAL_REGISTERS_INIT_LOG2_SIZE 3 #define US_INGRESS_RATE_LIMITER_TABLE_ADDRESS 0xa380 #define US_INGRESS_RATE_LIMITER_TABLE_BYTE_SIZE 0x0050 #define US_INGRESS_RATE_LIMITER_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_US_INGRESS_RATE_LIMITER_TABLE_SIZE 5 #define RDD_US_INGRESS_RATE_LIMITER_TABLE_LOG2_SIZE 3 #define US_FC_L2_UCAST_CONNECTION_BUFFER_ADDRESS 0xa3d0 #define US_FC_L2_UCAST_CONNECTION_BUFFER_BYTE_SIZE 0x0010 #define US_FC_L2_UCAST_CONNECTION_BUFFER_LOG2_BYTE_SIZE 0x0004 #define DHD_RX_FPM_ALLOC_RESULT_TABLE_ADDRESS 0xa3e0 #define DHD_RX_FPM_ALLOC_RESULT_TABLE_BYTE_SIZE 0x0020 #define DHD_RX_FPM_ALLOC_RESULT_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_DHD_RX_FPM_ALLOC_RESULT_TABLE_SIZE 8 #define RDD_DHD_RX_FPM_ALLOC_RESULT_TABLE_LOG2_SIZE 3 #define US_SPDSVC_CONTEXT_TABLE_ADDRESS 0xa400 #define US_SPDSVC_CONTEXT_TABLE_BYTE_SIZE 0x0048 #define US_SPDSVC_CONTEXT_TABLE_LOG2_BYTE_SIZE 0x0007 #define US_ONE_BUFFER_ADDRESS 0xa448 #define US_ONE_BUFFER_BYTE_SIZE 0x0008 #define US_ONE_BUFFER_LOG2_BYTE_SIZE 0x0003 #define RUNNER_FWTRACE_MAINB_PARAM_ADDRESS 0xa450 #define RUNNER_FWTRACE_MAINB_PARAM_BYTE_SIZE 0x0010 #define RUNNER_FWTRACE_MAINB_PARAM_LOG2_BYTE_SIZE 0x0004 #define RDD_RUNNER_FWTRACE_MAINB_PARAM_SIZE 2 #define RDD_RUNNER_FWTRACE_MAINB_PARAM_LOG2_SIZE 1 #define US_0_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_ADDRESS 0xa460 #define US_0_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_BYTE_SIZE 0x0020 #define US_0_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_US_0_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_SIZE 8 #define RDD_US_0_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_SIZE 3 #define US_CPU_RX_PICO_INGRESS_QUEUE_ADDRESS 0xa480 #define US_CPU_RX_PICO_INGRESS_QUEUE_BYTE_SIZE 0x0040 #define US_CPU_RX_PICO_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_US_CPU_RX_PICO_INGRESS_QUEUE_SIZE 64 #define RDD_US_CPU_RX_PICO_INGRESS_QUEUE_LOG2_SIZE 6 #define US_0_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_ADDRESS 0xa4c0 #define US_0_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_BYTE_SIZE 0x0020 #define US_0_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_US_0_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_SIZE 8 #define RDD_US_0_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_SIZE 3 #define US_1_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_ADDRESS 0xa4e0 #define US_1_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_BYTE_SIZE 0x0020 #define US_1_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_US_1_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_SIZE 8 #define RDD_US_1_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_SIZE 3 #define US_ROUTER_INGRESS_QUEUE_ADDRESS 0xa500 #define US_ROUTER_INGRESS_QUEUE_BYTE_SIZE 0x0040 #define US_ROUTER_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_US_ROUTER_INGRESS_QUEUE_SIZE 64 #define RDD_US_ROUTER_INGRESS_QUEUE_LOG2_SIZE 6 #define US_1_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_ADDRESS 0xa540 #define US_1_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_BYTE_SIZE 0x0020 #define US_1_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_US_1_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_SIZE 8 #define RDD_US_1_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_SIZE 3 #define US_2_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_ADDRESS 0xa560 #define US_2_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_BYTE_SIZE 0x0020 #define US_2_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_US_2_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_SIZE 8 #define RDD_US_2_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_SIZE 3 #define US_CPU_RX_FAST_INGRESS_QUEUE_ADDRESS 0xa580 #define US_CPU_RX_FAST_INGRESS_QUEUE_BYTE_SIZE 0x0040 #define US_CPU_RX_FAST_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_US_CPU_RX_FAST_INGRESS_QUEUE_SIZE 64 #define RDD_US_CPU_RX_FAST_INGRESS_QUEUE_LOG2_SIZE 6 #define US_DEBUG_BUFFER_ADDRESS 0xa5c0 #define US_DEBUG_BUFFER_BYTE_SIZE 0x0080 #define US_DEBUG_BUFFER_LOG2_BYTE_SIZE 0x0007 #define RDD_US_DEBUG_BUFFER_SIZE 32 #define RDD_US_DEBUG_BUFFER_LOG2_SIZE 5 #define US_FW_MAC_ADDRS_ADDRESS 0xa640 #define US_FW_MAC_ADDRS_BYTE_SIZE 0x0080 #define US_FW_MAC_ADDRS_LOG2_BYTE_SIZE 0x0007 #define RDD_US_FW_MAC_ADDRS_SIZE 16 #define RDD_US_FW_MAC_ADDRS_LOG2_SIZE 4 #define US_2_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_ADDRESS 0xa6c0 #define US_2_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_BYTE_SIZE 0x0020 #define US_2_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_US_2_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_SIZE 8 #define RDD_US_2_MCAST_RX_SBPM_TO_FPM_COPY_FPM_ALLOC_RESULT_TABLE_LOG2_SIZE 3 #define US_RUNNER_FLOW_HEADER_DESCRIPTOR_ADDRESS 0xa6e0 #define US_RUNNER_FLOW_HEADER_DESCRIPTOR_BYTE_SIZE 0x0018 #define US_RUNNER_FLOW_HEADER_DESCRIPTOR_LOG2_BYTE_SIZE 0x0005 #define RDD_US_RUNNER_FLOW_HEADER_DESCRIPTOR_SIZE 3 #define RDD_US_RUNNER_FLOW_HEADER_DESCRIPTOR_LOG2_SIZE 2 #define US_NULL_BUFFER_ADDRESS 0xa6f8 #define US_NULL_BUFFER_BYTE_SIZE 0x0008 #define US_NULL_BUFFER_LOG2_BYTE_SIZE 0x0003 #define US_DHD_TX_POST_INGRESS_QUEUE_ADDRESS 0xa700 #define US_DHD_TX_POST_INGRESS_QUEUE_BYTE_SIZE 0x0040 #define US_DHD_TX_POST_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_US_DHD_TX_POST_INGRESS_QUEUE_SIZE 64 #define RDD_US_DHD_TX_POST_INGRESS_QUEUE_LOG2_SIZE 6 #define US_OVERALL_RATE_LIMITER_WAN_CHANNEL_PTR_TABLE_ADDRESS 0xa740 #define US_OVERALL_RATE_LIMITER_WAN_CHANNEL_PTR_TABLE_BYTE_SIZE 0x0060 #define US_OVERALL_RATE_LIMITER_WAN_CHANNEL_PTR_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_US_OVERALL_RATE_LIMITER_WAN_CHANNEL_PTR_TABLE_SIZE 48 #define RDD_US_OVERALL_RATE_LIMITER_WAN_CHANNEL_PTR_TABLE_LOG2_SIZE 6 #define US_GPE_COMMAND_PRIMITIVE_TABLE_ADDRESS 0xa7a0 #define US_GPE_COMMAND_PRIMITIVE_TABLE_BYTE_SIZE 0x0040 #define US_GPE_COMMAND_PRIMITIVE_TABLE_LOG2_BYTE_SIZE 0x0006 #define RDD_US_GPE_COMMAND_PRIMITIVE_TABLE_SIZE 32 #define RDD_US_GPE_COMMAND_PRIMITIVE_TABLE_LOG2_SIZE 5 #define US_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_ADDRESS 0xa7e0 #define US_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_BYTE_SIZE 0x0010 #define US_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_LOG2_BYTE_SIZE 0x0004 #define RDD_US_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_SIZE 8 #define RDD_US_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_LOG2_SIZE 3 #define RUNNER_FWTRACE_PICOB_PARAM_ADDRESS 0xa7f0 #define RUNNER_FWTRACE_PICOB_PARAM_BYTE_SIZE 0x0010 #define RUNNER_FWTRACE_PICOB_PARAM_LOG2_BYTE_SIZE 0x0004 #define RDD_RUNNER_FWTRACE_PICOB_PARAM_SIZE 2 #define RDD_RUNNER_FWTRACE_PICOB_PARAM_LOG2_SIZE 1 #define US_CSO_CONTEXT_TABLE_ADDRESS 0xa800 #define US_CSO_CONTEXT_TABLE_BYTE_SIZE 0x0054 #define US_CSO_CONTEXT_TABLE_LOG2_BYTE_SIZE 0x0007 #define US_ETH0_EEE_MODE_CONFIG_MESSAGE_ADDRESS 0xa854 #define US_ETH0_EEE_MODE_CONFIG_MESSAGE_BYTE_SIZE 0x0004 #define US_ETH0_EEE_MODE_CONFIG_MESSAGE_LOG2_BYTE_SIZE 0x0002 #define GPON_ABSOLUTE_TX_FIRMWARE_COUNTER_ADDRESS 0xa858 #define GPON_ABSOLUTE_TX_FIRMWARE_COUNTER_BYTE_SIZE 0x0028 #define GPON_ABSOLUTE_TX_FIRMWARE_COUNTER_LOG2_BYTE_SIZE 0x0006 #define RDD_GPON_ABSOLUTE_TX_FIRMWARE_COUNTER_SIZE 40 #define RDD_GPON_ABSOLUTE_TX_FIRMWARE_COUNTER_LOG2_SIZE 6 #define US_DHD_TX_POST_FLOW_RING_BUFFER_ADDRESS 0xa880 #define US_DHD_TX_POST_FLOW_RING_BUFFER_BYTE_SIZE 0x0030 #define US_DHD_TX_POST_FLOW_RING_BUFFER_LOG2_BYTE_SIZE 0x0006 #define US_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_CAM_ADDRESS 0xa8b0 #define US_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_CAM_BYTE_SIZE 0x0010 #define US_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_CAM_LOG2_BYTE_SIZE 0x0004 #define RDD_US_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_CAM_SIZE 8 #define RDD_US_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_CAM_LOG2_SIZE 3 #define CPU_TX_DS_EGRESS_DHD_TX_POST_FLOW_RING_BUFFER_ADDRESS 0xa8c0 #define CPU_TX_DS_EGRESS_DHD_TX_POST_FLOW_RING_BUFFER_BYTE_SIZE 0x0030 #define CPU_TX_DS_EGRESS_DHD_TX_POST_FLOW_RING_BUFFER_LOG2_BYTE_SIZE 0x0006 #define US_BRIDGE_PORT_TO_LOOKUP_PORT_MAPPING_TABLE_ADDRESS 0xa8f0 #define US_BRIDGE_PORT_TO_LOOKUP_PORT_MAPPING_TABLE_BYTE_SIZE 0x0010 #define US_BRIDGE_PORT_TO_LOOKUP_PORT_MAPPING_TABLE_LOG2_BYTE_SIZE 0x0004 #define RDD_US_BRIDGE_PORT_TO_LOOKUP_PORT_MAPPING_TABLE_SIZE 16 #define RDD_US_BRIDGE_PORT_TO_LOOKUP_PORT_MAPPING_TABLE_LOG2_SIZE 4 #define US_DHD_FLOW_RING_DROP_COUNTER_ADDRESS 0xa900 #define US_DHD_FLOW_RING_DROP_COUNTER_BYTE_SIZE 0x0014 #define US_DHD_FLOW_RING_DROP_COUNTER_LOG2_BYTE_SIZE 0x0005 #define RDD_US_DHD_FLOW_RING_DROP_COUNTER_SIZE 5 #define RDD_US_DHD_FLOW_RING_DROP_COUNTER_LOG2_SIZE 3 #define US_BPM_EXTRA_DDR_BUFFERS_BASE_ADDRESS 0xa914 #define US_BPM_EXTRA_DDR_BUFFERS_BASE_BYTE_SIZE 0x0004 #define US_BPM_EXTRA_DDR_BUFFERS_BASE_LOG2_BYTE_SIZE 0x0002 #define US_FAST_MALLOC_RESULT_TABLE_ADDRESS 0xa918 #define US_FAST_MALLOC_RESULT_TABLE_BYTE_SIZE 0x0008 #define US_FAST_MALLOC_RESULT_TABLE_LOG2_BYTE_SIZE 0x0003 #define RDD_US_FAST_MALLOC_RESULT_TABLE_SIZE 2 #define RDD_US_FAST_MALLOC_RESULT_TABLE_LOG2_SIZE 1 #define US_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_ADDRESS 0xa920 #define US_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_BYTE_SIZE 0x0010 #define US_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_LOG2_BYTE_SIZE 0x0004 #define RDD_US_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_SIZE 8 #define RDD_US_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_LOG2_SIZE 3 #define WAN_TX_SCRATCH_ADDRESS 0xa930 #define WAN_TX_SCRATCH_BYTE_SIZE 0x0010 #define WAN_TX_SCRATCH_LOG2_BYTE_SIZE 0x0004 #define RDD_WAN_TX_SCRATCH_SIZE 16 #define RDD_WAN_TX_SCRATCH_LOG2_SIZE 4 #define US_SYSTEM_CONFIGURATION_ADDRESS 0xa940 #define US_SYSTEM_CONFIGURATION_BYTE_SIZE 0x0024 #define US_SYSTEM_CONFIGURATION_LOG2_BYTE_SIZE 0x0006 #define US_BPM_DDR_OPTIMIZED_BUFFERS_BASE_ADDRESS 0xa964 #define US_BPM_DDR_OPTIMIZED_BUFFERS_BASE_BYTE_SIZE 0x0004 #define US_BPM_DDR_OPTIMIZED_BUFFERS_BASE_LOG2_BYTE_SIZE 0x0002 #define CPU_REASON_AND_SRC_BRIDGE_PORT_TO_METER_TABLE_ADDRESS 0xa968 #define CPU_REASON_AND_SRC_BRIDGE_PORT_TO_METER_TABLE_BYTE_SIZE 0x0012 #define CPU_REASON_AND_SRC_BRIDGE_PORT_TO_METER_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_CPU_REASON_AND_SRC_BRIDGE_PORT_TO_METER_TABLE_SIZE 3 #define RDD_CPU_REASON_AND_SRC_BRIDGE_PORT_TO_METER_TABLE_LOG2_SIZE 2 #define RDD_CPU_REASON_AND_SRC_BRIDGE_PORT_TO_METER_TABLE_SIZE2 6 #define RDD_CPU_REASON_AND_SRC_BRIDGE_PORT_TO_METER_TABLE_LOG2_SIZE2 3 #define US_MAIN_TIMER_CONTROL_DESCRIPTOR_ADDRESS 0xa97a #define US_MAIN_TIMER_CONTROL_DESCRIPTOR_BYTE_SIZE 0x0002 #define US_MAIN_TIMER_CONTROL_DESCRIPTOR_LOG2_BYTE_SIZE 0x0001 #define US_BPM_DDR_1_OPTIMIZED_BUFFERS_BASE_ADDRESS 0xa97c #define US_BPM_DDR_1_OPTIMIZED_BUFFERS_BASE_BYTE_SIZE 0x0004 #define US_BPM_DDR_1_OPTIMIZED_BUFFERS_BASE_LOG2_BYTE_SIZE 0x0002 #define ETHWAN_ABSOLUTE_TX_BBH_COUNTER_ADDRESS 0xa980 #define ETHWAN_ABSOLUTE_TX_BBH_COUNTER_BYTE_SIZE 0x0001 #define ETHWAN_ABSOLUTE_TX_BBH_COUNTER_LOG2_BYTE_SIZE 0x0001 #define PRIVATE_B_DUMMY_STORE_ADDRESS 0xa981 #define PRIVATE_B_DUMMY_STORE_BYTE_SIZE 0x0001 #define PRIVATE_B_DUMMY_STORE_LOG2_BYTE_SIZE 0x0001 #define US_PICO_TIMER_CONTROL_DESCRIPTOR_ADDRESS 0xa982 #define US_PICO_TIMER_CONTROL_DESCRIPTOR_BYTE_SIZE 0x0002 #define US_PICO_TIMER_CONTROL_DESCRIPTOR_LOG2_BYTE_SIZE 0x0001 #define US_BPM_DDR_BUFFERS_BASE_ADDRESS 0xa984 #define US_BPM_DDR_BUFFERS_BASE_BYTE_SIZE 0x0004 #define US_BPM_DDR_BUFFERS_BASE_LOG2_BYTE_SIZE 0x0002 #define ETHWAN_ABSOLUTE_TX_FIRMWARE_COUNTER_ADDRESS 0xa988 #define ETHWAN_ABSOLUTE_TX_FIRMWARE_COUNTER_BYTE_SIZE 0x0001 #define ETHWAN_ABSOLUTE_TX_FIRMWARE_COUNTER_LOG2_BYTE_SIZE 0x0001 #define US_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_PTR_ADDRESS 0xa989 #define US_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_PTR_BYTE_SIZE 0x0001 #define US_FAST_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_PTR_LOG2_BYTE_SIZE 0x0001 #define US_CPU_RX_PICO_INGRESS_QUEUE_PTR_ADDRESS 0xa98a #define US_CPU_RX_PICO_INGRESS_QUEUE_PTR_BYTE_SIZE 0x0002 #define US_CPU_RX_PICO_INGRESS_QUEUE_PTR_LOG2_BYTE_SIZE 0x0001 #define US_BPM_DDR_1_BUFFERS_BASE_ADDRESS 0xa98c #define US_BPM_DDR_1_BUFFERS_BASE_BYTE_SIZE 0x0004 #define US_BPM_DDR_1_BUFFERS_BASE_LOG2_BYTE_SIZE 0x0002 #define GPON_ABSOLUTE_TX_BBH_COUNTER_ADDRESS 0xa990 #define GPON_ABSOLUTE_TX_BBH_COUNTER_BYTE_SIZE 0x0028 #define GPON_ABSOLUTE_TX_BBH_COUNTER_LOG2_BYTE_SIZE 0x0006 #define RDD_GPON_ABSOLUTE_TX_BBH_COUNTER_SIZE 40 #define RDD_GPON_ABSOLUTE_TX_BBH_COUNTER_LOG2_SIZE 6 #define US_INGRESS_CLASSIFICATION_DEFAULT_FLOWS_TABLE_ADDRESS 0xa9b8 #define US_INGRESS_CLASSIFICATION_DEFAULT_FLOWS_TABLE_BYTE_SIZE 0x0020 #define US_INGRESS_CLASSIFICATION_DEFAULT_FLOWS_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_US_INGRESS_CLASSIFICATION_DEFAULT_FLOWS_TABLE_SIZE 32 #define RDD_US_INGRESS_CLASSIFICATION_DEFAULT_FLOWS_TABLE_LOG2_SIZE 5 #define US_PICO_MALLOC_RESULT_TABLE_ADDRESS 0xa9d8 #define US_PICO_MALLOC_RESULT_TABLE_BYTE_SIZE 0x0008 #define US_PICO_MALLOC_RESULT_TABLE_LOG2_BYTE_SIZE 0x0003 #define RDD_US_PICO_MALLOC_RESULT_TABLE_SIZE 2 #define RDD_US_PICO_MALLOC_RESULT_TABLE_LOG2_SIZE 1 #define US_INGRESS_CLASSIFICATION_KEY_BUFFER_ADDRESS 0xa9e0 #define US_INGRESS_CLASSIFICATION_KEY_BUFFER_BYTE_SIZE 0x0010 #define US_INGRESS_CLASSIFICATION_KEY_BUFFER_LOG2_BYTE_SIZE 0x0004 #define CPU_TX_DS_EGRESS_DHD_TX_POST_CONTEXT_ADDRESS 0xa9f0 #define CPU_TX_DS_EGRESS_DHD_TX_POST_CONTEXT_BYTE_SIZE 0x0010 #define CPU_TX_DS_EGRESS_DHD_TX_POST_CONTEXT_LOG2_BYTE_SIZE 0x0004 #define CPU_TX_DHD_LAYER2_HEADER_BUFFER_ADDRESS 0xaa00 #define CPU_TX_DHD_LAYER2_HEADER_BUFFER_BYTE_SIZE 0x000e #define CPU_TX_DHD_LAYER2_HEADER_BUFFER_LOG2_BYTE_SIZE 0x0004 #define RDD_CPU_TX_DHD_LAYER2_HEADER_BUFFER_SIZE 14 #define RDD_CPU_TX_DHD_LAYER2_HEADER_BUFFER_LOG2_SIZE 4 #define US_BPM_DDR_BUFFER_HEADROOM_SIZE_ADDRESS 0xaa0e #define US_BPM_DDR_BUFFER_HEADROOM_SIZE_BYTE_SIZE 0x0002 #define US_BPM_DDR_BUFFER_HEADROOM_SIZE_LOG2_BYTE_SIZE 0x0001 #define US_FREE_PACKET_DESCRIPTORS_POOL_DESCRIPTOR_ADDRESS 0xaa10 #define US_FREE_PACKET_DESCRIPTORS_POOL_DESCRIPTOR_BYTE_SIZE 0x0006 #define US_FREE_PACKET_DESCRIPTORS_POOL_DESCRIPTOR_LOG2_BYTE_SIZE 0x0003 #define US_BPM_DDR_BUFFER_HEADROOM_SIZE_2_BYTE_RESOLUTION_ADDRESS 0xaa16 #define US_BPM_DDR_BUFFER_HEADROOM_SIZE_2_BYTE_RESOLUTION_BYTE_SIZE 0x0002 #define US_BPM_DDR_BUFFER_HEADROOM_SIZE_2_BYTE_RESOLUTION_LOG2_BYTE_SIZE 0x0001 #define DATA_POINTER_DUMMY_TARGET_ADDRESS 0xaa18 #define DATA_POINTER_DUMMY_TARGET_BYTE_SIZE 0x0008 #define DATA_POINTER_DUMMY_TARGET_LOG2_BYTE_SIZE 0x0003 #define RDD_DATA_POINTER_DUMMY_TARGET_SIZE 2 #define RDD_DATA_POINTER_DUMMY_TARGET_LOG2_SIZE 1 #define US_CONNECTION_TABLE_CONFIG_ADDRESS 0xaa20 #define US_CONNECTION_TABLE_CONFIG_BYTE_SIZE 0x0004 #define US_CONNECTION_TABLE_CONFIG_LOG2_BYTE_SIZE 0x0002 #define US_CONTEXT_TABLE_CONFIG_ADDRESS 0xaa24 #define US_CONTEXT_TABLE_CONFIG_BYTE_SIZE 0x0004 #define US_CONTEXT_TABLE_CONFIG_LOG2_BYTE_SIZE 0x0002 #define US_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_ADDRESS 0xaa28 #define US_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_BYTE_SIZE 0x0004 #define US_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_LOG2_BYTE_SIZE 0x0002 #define RDD_US_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_SIZE 4 #define RDD_US_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_LOG2_SIZE 2 #define US_DEBUG_PERIPHERALS_STATUS_REGISTER_ADDRESS 0xaa2c #define US_DEBUG_PERIPHERALS_STATUS_REGISTER_BYTE_SIZE 0x0004 #define US_DEBUG_PERIPHERALS_STATUS_REGISTER_LOG2_BYTE_SIZE 0x0002 #define US_PARALLEL_PROCESSING_TASK_REORDER_FIFO_ADDRESS 0xaa30 #define US_PARALLEL_PROCESSING_TASK_REORDER_FIFO_BYTE_SIZE 0x0004 #define US_PARALLEL_PROCESSING_TASK_REORDER_FIFO_LOG2_BYTE_SIZE 0x0002 #define RDD_US_PARALLEL_PROCESSING_TASK_REORDER_FIFO_SIZE 4 #define RDD_US_PARALLEL_PROCESSING_TASK_REORDER_FIFO_LOG2_SIZE 2 #define IH_BUFFER_BBH_POINTER_ADDRESS 0xaa34 #define IH_BUFFER_BBH_POINTER_BYTE_SIZE 0x0004 #define IH_BUFFER_BBH_POINTER_LOG2_BYTE_SIZE 0x0002 #define US_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_TABLE_ADDRESS 0xaa38 #define US_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_TABLE_BYTE_SIZE 0x0008 #define US_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_TABLE_LOG2_BYTE_SIZE 0x0003 #define RDD_US_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_TABLE_SIZE 8 #define RDD_US_PARALLEL_PROCESSING_CONTEXT_INDEX_CACHE_TABLE_LOG2_SIZE 3 #define BROADCOM_SWITCH_PORT_TO_BRIDGE_PORT_MAPPING_TABLE_ADDRESS 0xaa40 #define BROADCOM_SWITCH_PORT_TO_BRIDGE_PORT_MAPPING_TABLE_BYTE_SIZE 0x0008 #define BROADCOM_SWITCH_PORT_TO_BRIDGE_PORT_MAPPING_TABLE_LOG2_BYTE_SIZE 0x0003 #define RDD_BROADCOM_SWITCH_PORT_TO_BRIDGE_PORT_MAPPING_TABLE_SIZE 8 #define RDD_BROADCOM_SWITCH_PORT_TO_BRIDGE_PORT_MAPPING_TABLE_LOG2_SIZE 3 #define US_CONTEXT_CONTINUATION_TABLE_CONFIG_ADDRESS 0xaa48 #define US_CONTEXT_CONTINUATION_TABLE_CONFIG_BYTE_SIZE 0x0004 #define US_CONTEXT_CONTINUATION_TABLE_CONFIG_LOG2_BYTE_SIZE 0x0002 #define US_CPU_RX_FAST_INGRESS_QUEUE_PTR_ADDRESS 0xaa4c #define US_CPU_RX_FAST_INGRESS_QUEUE_PTR_BYTE_SIZE 0x0002 #define US_CPU_RX_FAST_INGRESS_QUEUE_PTR_LOG2_BYTE_SIZE 0x0001 #define LOCAL_SWITCHING_MULTICAST_LAN_ENQUEUE_INGRESS_QUEUE_PTR_ADDRESS 0xaa4e #define LOCAL_SWITCHING_MULTICAST_LAN_ENQUEUE_INGRESS_QUEUE_PTR_BYTE_SIZE 0x0002 #define LOCAL_SWITCHING_MULTICAST_LAN_ENQUEUE_INGRESS_QUEUE_PTR_LOG2_BYTE_SIZE 0x0001 #define US_RATE_CONTROLLER_EXPONENT_TABLE_ADDRESS 0xaa50 #define US_RATE_CONTROLLER_EXPONENT_TABLE_BYTE_SIZE 0x0004 #define US_RATE_CONTROLLER_EXPONENT_TABLE_LOG2_BYTE_SIZE 0x0002 #define RDD_US_RATE_CONTROLLER_EXPONENT_TABLE_SIZE 4 #define RDD_US_RATE_CONTROLLER_EXPONENT_TABLE_LOG2_SIZE 2 #define LOCAL_SWITCHING_LAN_ENQUEUE_INGRESS_QUEUE_PTR_ADDRESS 0xaa54 #define LOCAL_SWITCHING_LAN_ENQUEUE_INGRESS_QUEUE_PTR_BYTE_SIZE 0x0002 #define LOCAL_SWITCHING_LAN_ENQUEUE_INGRESS_QUEUE_PTR_LOG2_BYTE_SIZE 0x0001 #define US_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_PTR_ADDRESS 0xaa56 #define US_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_PTR_BYTE_SIZE 0x0002 #define US_PARALLEL_PROCESSING_IH_BUFFER_VECTOR_PTR_LOG2_BYTE_SIZE 0x0001 #define US_ANY_SRC_PORT_FLOW_COUNTER_ADDRESS 0xaa58 #define US_ANY_SRC_PORT_FLOW_COUNTER_BYTE_SIZE 0x0002 #define US_ANY_SRC_PORT_FLOW_COUNTER_LOG2_BYTE_SIZE 0x0001 #define US_MEMLIB_SEMAPHORE_ADDRESS 0xaa5a #define US_MEMLIB_SEMAPHORE_BYTE_SIZE 0x0002 #define US_MEMLIB_SEMAPHORE_LOG2_BYTE_SIZE 0x0001 #define US_DHD_TX_POST_HOST_DATA_PTR_BUFFER_ADDRESS 0xaa5c #define US_DHD_TX_POST_HOST_DATA_PTR_BUFFER_BYTE_SIZE 0x0004 #define US_DHD_TX_POST_HOST_DATA_PTR_BUFFER_LOG2_BYTE_SIZE 0x0002 #define ETHWAN2_RX_INGRESS_QUEUE_PTR_ADDRESS 0xaa60 #define ETHWAN2_RX_INGRESS_QUEUE_PTR_BYTE_SIZE 0x0002 #define ETHWAN2_RX_INGRESS_QUEUE_PTR_LOG2_BYTE_SIZE 0x0001 #define US_RUNNER_CONGESTION_STATE_ADDRESS 0xaa62 #define US_RUNNER_CONGESTION_STATE_BYTE_SIZE 0x0002 #define US_RUNNER_CONGESTION_STATE_LOG2_BYTE_SIZE 0x0001 #define WAN_ENQUEUE_INGRESS_QUEUE_PTR_ADDRESS 0xaa64 #define WAN_ENQUEUE_INGRESS_QUEUE_PTR_BYTE_SIZE 0x0002 #define WAN_ENQUEUE_INGRESS_QUEUE_PTR_LOG2_BYTE_SIZE 0x0001 #define US_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_PTR_ADDRESS 0xaa66 #define US_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_PTR_BYTE_SIZE 0x0002 #define US_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_PTR_LOG2_BYTE_SIZE 0x0001 #define US_DHD_BPM_CONGESTION_UG3_DROP_COUNTER_ADDRESS 0xaa68 #define US_DHD_BPM_CONGESTION_UG3_DROP_COUNTER_BYTE_SIZE 0x0002 #define US_DHD_BPM_CONGESTION_UG3_DROP_COUNTER_LOG2_BYTE_SIZE 0x0001 #define US_DHD_BPM_CONGESTION_ALLOC_FAIL_DROP_COUNTER_ADDRESS 0xaa6a #define US_DHD_BPM_CONGESTION_ALLOC_FAIL_DROP_COUNTER_BYTE_SIZE 0x0002 #define US_DHD_BPM_CONGESTION_ALLOC_FAIL_DROP_COUNTER_LOG2_BYTE_SIZE 0x0001 #define US_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_PTR_ADDRESS 0xaa6c #define US_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_PTR_BYTE_SIZE 0x0001 #define US_PICO_FREE_SKB_INDEXES_FIFO_LOCAL_TABLE_PTR_LOG2_BYTE_SIZE 0x0001 #define US_FC_ACCEL_MODE_ADDRESS 0xaa6d #define US_FC_ACCEL_MODE_BYTE_SIZE 0x0001 #define US_FC_ACCEL_MODE_LOG2_BYTE_SIZE 0x0001 #define ETHWAN2_SWITCH_PORT_ADDRESS 0xaa6e #define ETHWAN2_SWITCH_PORT_BYTE_SIZE 0x0001 #define ETHWAN2_SWITCH_PORT_LOG2_BYTE_SIZE 0x0001 #define US_INGRESS_CLASSIFICATION_RULE_CFG_DESCRIPTOR_ADDRESS 0xaa6f #define US_INGRESS_CLASSIFICATION_RULE_CFG_DESCRIPTOR_BYTE_SIZE 0x0001 #define US_INGRESS_CLASSIFICATION_RULE_CFG_DESCRIPTOR_LOG2_BYTE_SIZE 0x0001 #define US_PACKET_BUFFER_SIZE_ASR_8_ADDRESS 0xaa70 #define US_PACKET_BUFFER_SIZE_ASR_8_BYTE_SIZE 0x0001 #define US_PACKET_BUFFER_SIZE_ASR_8_LOG2_BYTE_SIZE 0x0001 #define US_MAIN_DMA_SYNCRONIZATION_ADDRESS_ADDRESS 0xaa71 #define US_MAIN_DMA_SYNCRONIZATION_ADDRESS_BYTE_SIZE 0x0001 #define US_MAIN_DMA_SYNCRONIZATION_ADDRESS_LOG2_BYTE_SIZE 0x0001 #define US_PICO_DMA_SYNCRONIZATION_ADDRESS_ADDRESS 0xaa72 #define US_PICO_DMA_SYNCRONIZATION_ADDRESS_BYTE_SIZE 0x0001 #define US_PICO_DMA_SYNCRONIZATION_ADDRESS_LOG2_BYTE_SIZE 0x0001 #define US_RUNNER_FLOW_IH_RESPONSE_MUTEX_ADDRESS 0xaa73 #define US_RUNNER_FLOW_IH_RESPONSE_MUTEX_BYTE_SIZE 0x0001 #define US_RUNNER_FLOW_IH_RESPONSE_MUTEX_LOG2_BYTE_SIZE 0x0001 #define DSL_BUFFER_ALIGNMENT_ADDRESS 0xaa74 #define DSL_BUFFER_ALIGNMENT_BYTE_SIZE 0x0001 #define DSL_BUFFER_ALIGNMENT_LOG2_BYTE_SIZE 0x0001 #define US_PARALLEL_PROCESSING_SLAVE_VECTOR_ADDRESS 0xaa75 #define US_PARALLEL_PROCESSING_SLAVE_VECTOR_BYTE_SIZE 0x0001 #define US_PARALLEL_PROCESSING_SLAVE_VECTOR_LOG2_BYTE_SIZE 0x0001 #define US_PARALLEL_PROCESSING_CONTEXT_CACHE_MODE_ADDRESS 0xaa76 #define US_PARALLEL_PROCESSING_CONTEXT_CACHE_MODE_BYTE_SIZE 0x0001 #define US_PARALLEL_PROCESSING_CONTEXT_CACHE_MODE_LOG2_BYTE_SIZE 0x0001 #define US_FAST_MALLOC_RESULT_MUTEX_ADDRESS 0xaa77 #define US_FAST_MALLOC_RESULT_MUTEX_BYTE_SIZE 0x0001 #define US_FAST_MALLOC_RESULT_MUTEX_LOG2_BYTE_SIZE 0x0001 #define US_PICO_MALLOC_RESULT_MUTEX_ADDRESS 0xaa78 #define US_PICO_MALLOC_RESULT_MUTEX_BYTE_SIZE 0x0001 #define US_PICO_MALLOC_RESULT_MUTEX_LOG2_BYTE_SIZE 0x0001 #define DHD_RX_FPM_ALLOC_RESULT_MUTEX_ADDRESS 0xaa79 #define DHD_RX_FPM_ALLOC_RESULT_MUTEX_BYTE_SIZE 0x0001 #define DHD_RX_FPM_ALLOC_RESULT_MUTEX_LOG2_BYTE_SIZE 0x0001 #define US_RX_SBPM_TO_FPM_COPY_SEMAPHORE_ADDRESS 0xaa7a #define US_RX_SBPM_TO_FPM_COPY_SEMAPHORE_BYTE_SIZE 0x0001 #define US_RX_SBPM_TO_FPM_COPY_SEMAPHORE_LOG2_BYTE_SIZE 0x0001 #define US_FW_MAC_ADDRS_COUNT_ADDRESS 0xaa7b #define US_FW_MAC_ADDRS_COUNT_BYTE_SIZE 0x0001 #define US_FW_MAC_ADDRS_COUNT_LOG2_BYTE_SIZE 0x0001 #define US_DHD_DMA_SYNCHRONIZATION_ADDRESS 0xaa7c #define US_DHD_DMA_SYNCHRONIZATION_BYTE_SIZE 0x0001 #define US_DHD_DMA_SYNCHRONIZATION_LOG2_BYTE_SIZE 0x0001 #define US_CPU_TX_FAST_QUEUE_ADDRESS 0xac00 #define US_CPU_TX_FAST_QUEUE_BYTE_SIZE 0x0080 #define US_CPU_TX_FAST_QUEUE_LOG2_BYTE_SIZE 0x0007 #define RDD_US_CPU_TX_FAST_QUEUE_SIZE 16 #define RDD_US_CPU_TX_FAST_QUEUE_LOG2_SIZE 4 #define US_CPU_TX_PICO_QUEUE_ADDRESS 0xad00 #define US_CPU_TX_PICO_QUEUE_BYTE_SIZE 0x0080 #define US_CPU_TX_PICO_QUEUE_LOG2_BYTE_SIZE 0x0007 #define RDD_US_CPU_TX_PICO_QUEUE_SIZE 16 #define RDD_US_CPU_TX_PICO_QUEUE_LOG2_SIZE 4 #define US_RUNNER_FLOW_IH_RESPONSE_ADDRESS 0xb6f0 #define US_RUNNER_FLOW_IH_RESPONSE_BYTE_SIZE 0x0008 #define US_RUNNER_FLOW_IH_RESPONSE_LOG2_BYTE_SIZE 0x0003 #define ETH2_RX_DESCRIPTORS_ADDRESS 0xba00 #define ETH2_RX_DESCRIPTORS_BYTE_SIZE 0x0100 #define ETH2_RX_DESCRIPTORS_LOG2_BYTE_SIZE 0x0008 #define RDD_ETH2_RX_DESCRIPTORS_SIZE 32 #define RDD_ETH2_RX_DESCRIPTORS_LOG2_SIZE 5 #define ETH1_RX_DESCRIPTORS_ADDRESS 0xbc00 #define ETH1_RX_DESCRIPTORS_BYTE_SIZE 0x0100 #define ETH1_RX_DESCRIPTORS_LOG2_BYTE_SIZE 0x0008 #define RDD_ETH1_RX_DESCRIPTORS_SIZE 32 #define RDD_ETH1_RX_DESCRIPTORS_LOG2_SIZE 5 #define ETH0_RX_DESCRIPTORS_ADDRESS 0xbe00 #define ETH0_RX_DESCRIPTORS_BYTE_SIZE 0x0100 #define ETH0_RX_DESCRIPTORS_LOG2_BYTE_SIZE 0x0008 #define RDD_ETH0_RX_DESCRIPTORS_SIZE 32 #define RDD_ETH0_RX_DESCRIPTORS_LOG2_SIZE 5 #define BBH_TX_WAN_CHANNEL_INDEX_ADDRESS 0xbfe8 #define BBH_TX_WAN_CHANNEL_INDEX_BYTE_SIZE 0x0004 #define BBH_TX_WAN_CHANNEL_INDEX_LOG2_BYTE_SIZE 0x0002 /* COMMON_A */ #define CPU_RX_RUNNER_A_SCRATCHPAD_ADDRESS 0x0000 #define CPU_RX_RUNNER_A_SCRATCHPAD_BYTE_SIZE 0x1000 #define CPU_RX_RUNNER_A_SCRATCHPAD_LOG2_BYTE_SIZE 0x000c #define RDD_CPU_RX_RUNNER_A_SCRATCHPAD_SIZE 16 #define RDD_CPU_RX_RUNNER_A_SCRATCHPAD_LOG2_SIZE 4 #define SERVICE_QUEUES_DDR_CACHE_FIFO_ADDRESS 0x1000 #define SERVICE_QUEUES_DDR_CACHE_FIFO_BYTE_SIZE 0x1000 #define SERVICE_QUEUES_DDR_CACHE_FIFO_LOG2_BYTE_SIZE 0x000c #define RDD_SERVICE_QUEUES_DDR_CACHE_FIFO_SIZE 256 #define RDD_SERVICE_QUEUES_DDR_CACHE_FIFO_LOG2_SIZE 8 #define FC_MCAST_RUNNER_A_SCRATCHPAD_ADDRESS 0x2000 #define FC_MCAST_RUNNER_A_SCRATCHPAD_BYTE_SIZE 0x0800 #define FC_MCAST_RUNNER_A_SCRATCHPAD_LOG2_BYTE_SIZE 0x000b #define RDD_FC_MCAST_RUNNER_A_SCRATCHPAD_SIZE 8 #define RDD_FC_MCAST_RUNNER_A_SCRATCHPAD_LOG2_SIZE 3 #define DS_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_ADDRESS 0x2800 #define DS_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_BYTE_SIZE 0x0800 #define DS_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_LOG2_BYTE_SIZE 0x000b #define RDD_DS_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_SIZE 8 #define RDD_DS_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_LOG2_SIZE 3 #define WLAN_MCAST_RUNNER_A_SCRATCHPAD_ADDRESS 0x3000 #define WLAN_MCAST_RUNNER_A_SCRATCHPAD_BYTE_SIZE 0x0800 #define WLAN_MCAST_RUNNER_A_SCRATCHPAD_LOG2_BYTE_SIZE 0x000b #define RDD_WLAN_MCAST_RUNNER_A_SCRATCHPAD_SIZE 8 #define RDD_WLAN_MCAST_RUNNER_A_SCRATCHPAD_LOG2_SIZE 3 #define RUNNER_FWTRACE_MAINA_BASE_ADDRESS 0x3800 #define RUNNER_FWTRACE_MAINA_BASE_BYTE_SIZE 0x0400 #define RUNNER_FWTRACE_MAINA_BASE_LOG2_BYTE_SIZE 0x000a #define RDD_RUNNER_FWTRACE_MAINA_BASE_SIZE 128 #define RDD_RUNNER_FWTRACE_MAINA_BASE_LOG2_SIZE 7 #define WLAN_MCAST_DHD_STATION_TABLE_ADDRESS 0x3c00 #define WLAN_MCAST_DHD_STATION_TABLE_BYTE_SIZE 0x0280 #define WLAN_MCAST_DHD_STATION_TABLE_LOG2_BYTE_SIZE 0x000a #define RDD_WLAN_MCAST_DHD_STATION_TABLE_SIZE 64 #define RDD_WLAN_MCAST_DHD_STATION_TABLE_LOG2_SIZE 6 #define DS_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_ADDRESS 0x3e80 #define DS_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_BYTE_SIZE 0x0080 #define DS_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_DS_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_SIZE 2 #define RDD_DS_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_LOG2_SIZE 1 #define RDD_DS_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_SIZE2 64 #define RDD_DS_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_LOG2_SIZE2 6 #define DHD_RADIO_INSTANCE_COMMON_A_DATA_ADDRESS 0x3f00 #define DHD_RADIO_INSTANCE_COMMON_A_DATA_BYTE_SIZE 0x0030 #define DHD_RADIO_INSTANCE_COMMON_A_DATA_LOG2_BYTE_SIZE 0x0006 #define RDD_DHD_RADIO_INSTANCE_COMMON_A_DATA_SIZE 3 #define RDD_DHD_RADIO_INSTANCE_COMMON_A_DATA_LOG2_SIZE 2 #define DDR_ADDRESS_FOR_FREE_SKB_INDEXES_FIFO_TABLE_ADDRESS 0x3f30 #define DDR_ADDRESS_FOR_FREE_SKB_INDEXES_FIFO_TABLE_BYTE_SIZE 0x0004 #define DDR_ADDRESS_FOR_FREE_SKB_INDEXES_FIFO_TABLE_LOG2_BYTE_SIZE 0x0002 #define DDR_ADDRESS_FOR_FREE_SKB_INDEXES_FIFO_TABLE_LAST_ENTRY_ADDRESS 0x3f34 #define DDR_ADDRESS_FOR_FREE_SKB_INDEXES_FIFO_TABLE_LAST_ENTRY_BYTE_SIZE 0x0004 #define DDR_ADDRESS_FOR_FREE_SKB_INDEXES_FIFO_TABLE_LAST_ENTRY_LOG2_BYTE_SIZE 0x0002 #define FREE_SKB_INDEXES_DDR_FIFO_TAIL_ADDRESS 0x3f38 #define FREE_SKB_INDEXES_DDR_FIFO_TAIL_BYTE_SIZE 0x0008 #define FREE_SKB_INDEXES_DDR_FIFO_TAIL_LOG2_BYTE_SIZE 0x0003 #define RDD_FREE_SKB_INDEXES_DDR_FIFO_TAIL_SIZE 2 #define RDD_FREE_SKB_INDEXES_DDR_FIFO_TAIL_LOG2_SIZE 1 #define BPM_REPLY_RUNNER_A_ADDRESS 0x3f40 #define BPM_REPLY_RUNNER_A_BYTE_SIZE 0x0030 #define BPM_REPLY_RUNNER_A_LOG2_BYTE_SIZE 0x0006 #define RATE_SHAPERS_STATUS_DESCRIPTOR_ADDRESS 0x3f70 #define RATE_SHAPERS_STATUS_DESCRIPTOR_BYTE_SIZE 0x0080 #define RATE_SHAPERS_STATUS_DESCRIPTOR_LOG2_BYTE_SIZE 0x0007 #define RDD_RATE_SHAPERS_STATUS_DESCRIPTOR_SIZE 128 #define RDD_RATE_SHAPERS_STATUS_DESCRIPTOR_LOG2_SIZE 7 #define RUNNER_FWTRACE_MAINA_CURR_OFFSET_ADDRESS 0x3ff0 #define RUNNER_FWTRACE_MAINA_CURR_OFFSET_BYTE_SIZE 0x0010 #define RUNNER_FWTRACE_MAINA_CURR_OFFSET_LOG2_BYTE_SIZE 0x0004 #define RDD_RUNNER_FWTRACE_MAINA_CURR_OFFSET_SIZE 2 #define RDD_RUNNER_FWTRACE_MAINA_CURR_OFFSET_LOG2_SIZE 1 #define GPON_SKB_ENQUEUED_INDEXES_FIFO_ADDRESS 0x4000 #define GPON_SKB_ENQUEUED_INDEXES_FIFO_BYTE_SIZE 0x0600 #define GPON_SKB_ENQUEUED_INDEXES_FIFO_LOG2_BYTE_SIZE 0x000b #define RDD_GPON_SKB_ENQUEUED_INDEXES_FIFO_SIZE 32 #define RDD_GPON_SKB_ENQUEUED_INDEXES_FIFO_LOG2_SIZE 5 #define WLAN_MCAST_FWD_TABLE_ADDRESS 0x4600 #define WLAN_MCAST_FWD_TABLE_BYTE_SIZE 0x0200 #define WLAN_MCAST_FWD_TABLE_LOG2_BYTE_SIZE 0x0009 #define RDD_WLAN_MCAST_FWD_TABLE_SIZE 64 #define RDD_WLAN_MCAST_FWD_TABLE_LOG2_SIZE 6 #define RUNNER_FWTRACE_PICOA_BASE_ADDRESS 0x4800 #define RUNNER_FWTRACE_PICOA_BASE_BYTE_SIZE 0x0400 #define RUNNER_FWTRACE_PICOA_BASE_LOG2_BYTE_SIZE 0x000a #define RDD_RUNNER_FWTRACE_PICOA_BASE_SIZE 128 #define RDD_RUNNER_FWTRACE_PICOA_BASE_LOG2_SIZE 7 #define SERVICE_QUEUES_DESCRIPTOR_TABLE_ADDRESS 0x4c00 #define SERVICE_QUEUES_DESCRIPTOR_TABLE_BYTE_SIZE 0x0200 #define SERVICE_QUEUES_DESCRIPTOR_TABLE_LOG2_BYTE_SIZE 0x0009 #define RDD_SERVICE_QUEUES_DESCRIPTOR_TABLE_SIZE 32 #define RDD_SERVICE_QUEUES_DESCRIPTOR_TABLE_LOG2_SIZE 5 #define WLAN_MCAST_SSID_MAC_ADDRESS_TABLE_ADDRESS 0x4e00 #define WLAN_MCAST_SSID_MAC_ADDRESS_TABLE_BYTE_SIZE 0x0180 #define WLAN_MCAST_SSID_MAC_ADDRESS_TABLE_LOG2_BYTE_SIZE 0x0009 #define RDD_WLAN_MCAST_SSID_MAC_ADDRESS_TABLE_SIZE 48 #define RDD_WLAN_MCAST_SSID_MAC_ADDRESS_TABLE_LOG2_SIZE 6 #define INTERRUPT_COALESCING_CONFIG_TABLE_ADDRESS 0x4f80 #define INTERRUPT_COALESCING_CONFIG_TABLE_BYTE_SIZE 0x0040 #define INTERRUPT_COALESCING_CONFIG_TABLE_LOG2_BYTE_SIZE 0x0006 #define RDD_INTERRUPT_COALESCING_CONFIG_TABLE_SIZE 16 #define RDD_INTERRUPT_COALESCING_CONFIG_TABLE_LOG2_SIZE 4 #define GLOBAL_DSCP_TO_PBITS_DEI_TABLE_ADDRESS 0x4fc0 #define GLOBAL_DSCP_TO_PBITS_DEI_TABLE_BYTE_SIZE 0x0040 #define GLOBAL_DSCP_TO_PBITS_DEI_TABLE_LOG2_BYTE_SIZE 0x0006 #define RDD_GLOBAL_DSCP_TO_PBITS_DEI_TABLE_SIZE2 64 #define RDD_GLOBAL_DSCP_TO_PBITS_DEI_TABLE_LOG2_SIZE2 6 #define WLAN_MCAST_SSID_STATS_TABLE_ADDRESS 0x5000 #define WLAN_MCAST_SSID_STATS_TABLE_BYTE_SIZE 0x0180 #define WLAN_MCAST_SSID_STATS_TABLE_LOG2_BYTE_SIZE 0x0009 #define RDD_WLAN_MCAST_SSID_STATS_TABLE_SIZE 48 #define RDD_WLAN_MCAST_SSID_STATS_TABLE_LOG2_SIZE 6 #define TRACE_C_TABLE_ADDRESS 0x5180 #define TRACE_C_TABLE_BYTE_SIZE 0x0020 #define TRACE_C_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_TRACE_C_TABLE_SIZE 4 #define RDD_TRACE_C_TABLE_LOG2_SIZE 2 #define SERVICE_QUEUES_CFG_ADDRESS 0x51a0 #define SERVICE_QUEUES_CFG_BYTE_SIZE 0x0014 #define SERVICE_QUEUES_CFG_LOG2_BYTE_SIZE 0x0005 #define DDR_ADDRESS_FOR_SKB_DATA_POINTERS_TABLE_ADDRESS 0x51b4 #define DDR_ADDRESS_FOR_SKB_DATA_POINTERS_TABLE_BYTE_SIZE 0x0004 #define DDR_ADDRESS_FOR_SKB_DATA_POINTERS_TABLE_LOG2_BYTE_SIZE 0x0002 #define DS_RATE_CONTROLLER_EXPONENT_TABLE_ADDRESS 0x51b8 #define DS_RATE_CONTROLLER_EXPONENT_TABLE_BYTE_SIZE 0x0004 #define DS_RATE_CONTROLLER_EXPONENT_TABLE_LOG2_BYTE_SIZE 0x0002 #define RDD_DS_RATE_CONTROLLER_EXPONENT_TABLE_SIZE 4 #define RDD_DS_RATE_CONTROLLER_EXPONENT_TABLE_LOG2_SIZE 2 #define INTERRUPT_COALESCING_TIMER_PERIOD_ADDRESS 0x51bc #define INTERRUPT_COALESCING_TIMER_PERIOD_BYTE_SIZE 0x0002 #define INTERRUPT_COALESCING_TIMER_PERIOD_LOG2_BYTE_SIZE 0x0001 #define INTERRUPT_COALESCING_TIMER_ARMED_ADDRESS 0x51be #define INTERRUPT_COALESCING_TIMER_ARMED_BYTE_SIZE 0x0002 #define INTERRUPT_COALESCING_TIMER_ARMED_LOG2_BYTE_SIZE 0x0001 #define DS_DHD_FLOW_RING_CACHE_LKP_TABLE_ADDRESS 0x51c0 #define DS_DHD_FLOW_RING_CACHE_LKP_TABLE_BYTE_SIZE 0x0020 #define DS_DHD_FLOW_RING_CACHE_LKP_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_DS_DHD_FLOW_RING_CACHE_LKP_TABLE_SIZE 16 #define RDD_DS_DHD_FLOW_RING_CACHE_LKP_TABLE_LOG2_SIZE 4 #define PM_COUNTERS_BUFFER_ADDRESS 0x51e0 #define PM_COUNTERS_BUFFER_BYTE_SIZE 0x0020 #define PM_COUNTERS_BUFFER_LOG2_BYTE_SIZE 0x0005 #define DS_CONNECTION_BUFFER_TABLE_ADDRESS 0x5200 #define DS_CONNECTION_BUFFER_TABLE_BYTE_SIZE 0x0140 #define DS_CONNECTION_BUFFER_TABLE_LOG2_BYTE_SIZE 0x0009 #define RDD_DS_CONNECTION_BUFFER_TABLE_SIZE 5 #define RDD_DS_CONNECTION_BUFFER_TABLE_LOG2_SIZE 3 #define RDD_DS_CONNECTION_BUFFER_TABLE_SIZE2 4 #define RDD_DS_CONNECTION_BUFFER_TABLE_LOG2_SIZE2 2 #define DS_L4_DST_PORT_TABLE_ADDRESS 0x5340 #define DS_L4_DST_PORT_TABLE_BYTE_SIZE 0x0200 #define DS_L4_DST_PORT_TABLE_LOG2_BYTE_SIZE 0x0009 #define RDD_DS_L4_DST_PORT_TABLE_SIZE 256 #define RDD_DS_L4_DST_PORT_TABLE_LOG2_SIZE 8 #define L4_DST_PORT_CONTEXT_TABLE_ADDRESS 0x5540 #define L4_DST_PORT_CONTEXT_TABLE_BYTE_SIZE 0x0200 #define L4_DST_PORT_CONTEXT_TABLE_LOG2_BYTE_SIZE 0x0009 #define RDD_L4_DST_PORT_CONTEXT_TABLE_SIZE 256 #define RDD_L4_DST_PORT_CONTEXT_TABLE_LOG2_SIZE 8 #define DHD_FLOW_RING_SHADOW_WR_PTR_TABLE_ADDRESS 0x5740 #define DHD_FLOW_RING_SHADOW_WR_PTR_TABLE_BYTE_SIZE 0x0020 #define DHD_FLOW_RING_SHADOW_WR_PTR_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_DHD_FLOW_RING_SHADOW_WR_PTR_TABLE_SIZE 16 #define RDD_DHD_FLOW_RING_SHADOW_WR_PTR_TABLE_LOG2_SIZE 4 #define DS_DHD_TX_POST_FLOW_RING_MGMT_DESCRIPTOR_BUFFER_ADDRESS 0x5760 #define DS_DHD_TX_POST_FLOW_RING_MGMT_DESCRIPTOR_BUFFER_BYTE_SIZE 0x0010 #define DS_DHD_TX_POST_FLOW_RING_MGMT_DESCRIPTOR_BUFFER_LOG2_BYTE_SIZE 0x0004 #define DHD_TX_POST_BUFFERS_THRESHOLD_ADDRESS 0x5770 #define DHD_TX_POST_BUFFERS_THRESHOLD_BYTE_SIZE 0x0004 #define DHD_TX_POST_BUFFERS_THRESHOLD_LOG2_BYTE_SIZE 0x0002 #define RDD_DHD_TX_POST_BUFFERS_THRESHOLD_SIZE 2 #define RDD_DHD_TX_POST_BUFFERS_THRESHOLD_LOG2_SIZE 1 #define COMMON_A_DUMMY_STORE_ADDRESS 0x5774 #define COMMON_A_DUMMY_STORE_BYTE_SIZE 0x0001 #define COMMON_A_DUMMY_STORE_LOG2_BYTE_SIZE 0x0001 #define FC_SERVICE_QUEUE_MODE_ADDRESS 0x5775 #define FC_SERVICE_QUEUE_MODE_BYTE_SIZE 0x0001 #define FC_SERVICE_QUEUE_MODE_LOG2_BYTE_SIZE 0x0001 #define DHD_TX_POST_BUFFERS_IN_USE_COUNTER_ADDRESS 0x5778 #define DHD_TX_POST_BUFFERS_IN_USE_COUNTER_BYTE_SIZE 0x0004 #define DHD_TX_POST_BUFFERS_IN_USE_COUNTER_LOG2_BYTE_SIZE 0x0002 #define RDD_DHD_TX_POST_BUFFERS_IN_USE_COUNTER_SIZE 2 #define RDD_DHD_TX_POST_BUFFERS_IN_USE_COUNTER_LOG2_SIZE 1 #define PM_COUNTERS_ADDRESS 0x5800 #define PM_COUNTERS_BYTE_SIZE 0x1840 #define PM_COUNTERS_LOG2_BYTE_SIZE 0x000d #define SERVICE_QUEUES_DDR_QUEUE_ADDRESS_TABLE_ADDRESS 0x7100 #define SERVICE_QUEUES_DDR_QUEUE_ADDRESS_TABLE_BYTE_SIZE 0x0100 #define SERVICE_QUEUES_DDR_QUEUE_ADDRESS_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_SERVICE_QUEUES_DDR_QUEUE_ADDRESS_TABLE_SIZE 32 #define RDD_SERVICE_QUEUES_DDR_QUEUE_ADDRESS_TABLE_LOG2_SIZE 5 #define ETHWAN2_RX_INGRESS_QUEUE_ADDRESS 0x7200 #define ETHWAN2_RX_INGRESS_QUEUE_BYTE_SIZE 0x0100 #define ETHWAN2_RX_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0008 #define RDD_ETHWAN2_RX_INGRESS_QUEUE_SIZE 32 #define RDD_ETHWAN2_RX_INGRESS_QUEUE_LOG2_SIZE 5 #define DS_RING_PACKET_DESCRIPTORS_CACHE_ADDRESS 0x7300 #define DS_RING_PACKET_DESCRIPTORS_CACHE_BYTE_SIZE 0x00e0 #define DS_RING_PACKET_DESCRIPTORS_CACHE_LOG2_BYTE_SIZE 0x0008 #define RDD_DS_RING_PACKET_DESCRIPTORS_CACHE_SIZE 14 #define RDD_DS_RING_PACKET_DESCRIPTORS_CACHE_LOG2_SIZE 4 #define RING_DESCRIPTORS_TABLE_ADDRESS 0x7500 #define RING_DESCRIPTORS_TABLE_BYTE_SIZE 0x00c0 #define RING_DESCRIPTORS_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_RING_DESCRIPTORS_TABLE_SIZE 12 #define RDD_RING_DESCRIPTORS_TABLE_LOG2_SIZE 4 #define MAIN_A_DEBUG_TRACE_ADDRESS 0x7a00 #define MAIN_A_DEBUG_TRACE_BYTE_SIZE 0x0200 #define MAIN_A_DEBUG_TRACE_LOG2_BYTE_SIZE 0x0009 #define RDD_MAIN_A_DEBUG_TRACE_SIZE 512 #define RDD_MAIN_A_DEBUG_TRACE_LOG2_SIZE 9 #define PICO_A_DEBUG_TRACE_ADDRESS 0x7c00 #define PICO_A_DEBUG_TRACE_BYTE_SIZE 0x0200 #define PICO_A_DEBUG_TRACE_LOG2_BYTE_SIZE 0x0009 #define RDD_PICO_A_DEBUG_TRACE_SIZE 512 #define RDD_PICO_A_DEBUG_TRACE_LOG2_SIZE 9 /* COMMON_B */ #define WAN_TX_QUEUES_TABLE_ADDRESS 0x8000 #define WAN_TX_QUEUES_TABLE_BYTE_SIZE 0x1000 #define WAN_TX_QUEUES_TABLE_LOG2_BYTE_SIZE 0x000c #define RDD_WAN_TX_QUEUES_TABLE_SIZE 256 #define RDD_WAN_TX_QUEUES_TABLE_LOG2_SIZE 8 #define US_CONNECTION_BUFFER_TABLE_ADDRESS 0x9000 #define US_CONNECTION_BUFFER_TABLE_BYTE_SIZE 0x0140 #define US_CONNECTION_BUFFER_TABLE_LOG2_BYTE_SIZE 0x0009 #define RDD_US_CONNECTION_BUFFER_TABLE_SIZE 5 #define RDD_US_CONNECTION_BUFFER_TABLE_LOG2_SIZE 3 #define RDD_US_CONNECTION_BUFFER_TABLE_SIZE2 4 #define RDD_US_CONNECTION_BUFFER_TABLE_LOG2_SIZE2 2 #define IPV6_HOST_ADDRESS_CRC_TABLE_ADDRESS 0x9140 #define IPV6_HOST_ADDRESS_CRC_TABLE_BYTE_SIZE 0x0040 #define IPV6_HOST_ADDRESS_CRC_TABLE_LOG2_BYTE_SIZE 0x0006 #define RDD_IPV6_HOST_ADDRESS_CRC_TABLE_SIZE 16 #define RDD_IPV6_HOST_ADDRESS_CRC_TABLE_LOG2_SIZE 4 #define EPON_DDR_QUEUE_ADDRESS_TABLE_ADDRESS 0x9180 #define EPON_DDR_QUEUE_ADDRESS_TABLE_BYTE_SIZE 0x0080 #define EPON_DDR_QUEUE_ADDRESS_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_EPON_DDR_QUEUE_ADDRESS_TABLE_SIZE 16 #define RDD_EPON_DDR_QUEUE_ADDRESS_TABLE_LOG2_SIZE 4 #define LOCAL_SWITCHING_LAN_ENQUEUE_INGRESS_QUEUE_ADDRESS 0x9200 #define LOCAL_SWITCHING_LAN_ENQUEUE_INGRESS_QUEUE_BYTE_SIZE 0x0100 #define LOCAL_SWITCHING_LAN_ENQUEUE_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0008 #define RDD_LOCAL_SWITCHING_LAN_ENQUEUE_INGRESS_QUEUE_SIZE 32 #define RDD_LOCAL_SWITCHING_LAN_ENQUEUE_INGRESS_QUEUE_LOG2_SIZE 5 #define DS_INGRESS_CLASSIFICATION_LOOKUP_CAM_TABLE_ADDRESS 0x9300 #define DS_INGRESS_CLASSIFICATION_LOOKUP_CAM_TABLE_BYTE_SIZE 0x0100 #define DS_INGRESS_CLASSIFICATION_LOOKUP_CAM_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_DS_INGRESS_CLASSIFICATION_LOOKUP_CAM_TABLE_SIZE 32 #define RDD_DS_INGRESS_CLASSIFICATION_LOOKUP_CAM_TABLE_LOG2_SIZE 5 #define RUNNER_FWTRACE_MAINB_BASE_ADDRESS 0x9400 #define RUNNER_FWTRACE_MAINB_BASE_BYTE_SIZE 0x0400 #define RUNNER_FWTRACE_MAINB_BASE_LOG2_BYTE_SIZE 0x000a #define RDD_RUNNER_FWTRACE_MAINB_BASE_SIZE 128 #define RDD_RUNNER_FWTRACE_MAINB_BASE_LOG2_SIZE 7 #define RUNNER_FWTRACE_PICOB_BASE_ADDRESS 0x9800 #define RUNNER_FWTRACE_PICOB_BASE_BYTE_SIZE 0x0400 #define RUNNER_FWTRACE_PICOB_BASE_LOG2_BYTE_SIZE 0x000a #define RDD_RUNNER_FWTRACE_PICOB_BASE_SIZE 128 #define RDD_RUNNER_FWTRACE_PICOB_BASE_LOG2_SIZE 7 #define US_INGRESS_CLASSIFICATION_LOOKUP_CAM_TABLE_ADDRESS 0x9c00 #define US_INGRESS_CLASSIFICATION_LOOKUP_CAM_TABLE_BYTE_SIZE 0x0100 #define US_INGRESS_CLASSIFICATION_LOOKUP_CAM_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_US_INGRESS_CLASSIFICATION_LOOKUP_CAM_TABLE_SIZE 32 #define RDD_US_INGRESS_CLASSIFICATION_LOOKUP_CAM_TABLE_LOG2_SIZE 5 #define US_L4_DST_PORT_TABLE_ADDRESS 0x9d00 #define US_L4_DST_PORT_TABLE_BYTE_SIZE 0x0200 #define US_L4_DST_PORT_TABLE_LOG2_BYTE_SIZE 0x0009 #define RDD_US_L4_DST_PORT_TABLE_SIZE 256 #define RDD_US_L4_DST_PORT_TABLE_LOG2_SIZE 8 #define WAN_TX_RUNNER_B_SCRATCHPAD_ADDRESS 0x9f00 #define WAN_TX_RUNNER_B_SCRATCHPAD_BYTE_SIZE 0x0100 #define WAN_TX_RUNNER_B_SCRATCHPAD_LOG2_BYTE_SIZE 0x0008 #define DS_INGRESS_CLASSIFICATION_LOOKUP_TABLE_ADDRESS 0xa000 #define DS_INGRESS_CLASSIFICATION_LOOKUP_TABLE_BYTE_SIZE 0x0800 #define DS_INGRESS_CLASSIFICATION_LOOKUP_TABLE_LOG2_BYTE_SIZE 0x000b #define RDD_DS_INGRESS_CLASSIFICATION_LOOKUP_TABLE_SIZE 256 #define RDD_DS_INGRESS_CLASSIFICATION_LOOKUP_TABLE_LOG2_SIZE 8 #define US_INGRESS_CLASSIFICATION_LOOKUP_TABLE_ADDRESS 0xa800 #define US_INGRESS_CLASSIFICATION_LOOKUP_TABLE_BYTE_SIZE 0x0800 #define US_INGRESS_CLASSIFICATION_LOOKUP_TABLE_LOG2_BYTE_SIZE 0x000b #define RDD_US_INGRESS_CLASSIFICATION_LOOKUP_TABLE_SIZE 256 #define RDD_US_INGRESS_CLASSIFICATION_LOOKUP_TABLE_LOG2_SIZE 8 #define CPU_RX_RUNNER_B_SCRATCHPAD_ADDRESS 0xb000 #define CPU_RX_RUNNER_B_SCRATCHPAD_BYTE_SIZE 0x1000 #define CPU_RX_RUNNER_B_SCRATCHPAD_LOG2_BYTE_SIZE 0x000c #define RDD_CPU_RX_RUNNER_B_SCRATCHPAD_SIZE 16 #define RDD_CPU_RX_RUNNER_B_SCRATCHPAD_LOG2_SIZE 4 #define EPON_DDR_CACHE_FIFO_ADDRESS 0xc000 #define EPON_DDR_CACHE_FIFO_BYTE_SIZE 0x0600 #define EPON_DDR_CACHE_FIFO_LOG2_BYTE_SIZE 0x000b #define RDD_EPON_DDR_CACHE_FIFO_SIZE 192 #define RDD_EPON_DDR_CACHE_FIFO_LOG2_SIZE 8 #define DHD_FLOW_RING_CACHE_CTX_TABLE_ADDRESS 0xc600 #define DHD_FLOW_RING_CACHE_CTX_TABLE_BYTE_SIZE 0x0100 #define DHD_FLOW_RING_CACHE_CTX_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_DHD_FLOW_RING_CACHE_CTX_TABLE_SIZE 16 #define RDD_DHD_FLOW_RING_CACHE_CTX_TABLE_LOG2_SIZE 4 #define FC_FLOW_IP_ADDRESSES_TABLE_ADDRESS 0xc700 #define FC_FLOW_IP_ADDRESSES_TABLE_BYTE_SIZE 0x00c0 #define FC_FLOW_IP_ADDRESSES_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_FC_FLOW_IP_ADDRESSES_TABLE_SIZE 4 #define RDD_FC_FLOW_IP_ADDRESSES_TABLE_LOG2_SIZE 2 #define RUNNER_FWTRACE_MAINB_CURR_OFFSET_ADDRESS 0xc7c0 #define RUNNER_FWTRACE_MAINB_CURR_OFFSET_BYTE_SIZE 0x0010 #define RUNNER_FWTRACE_MAINB_CURR_OFFSET_LOG2_BYTE_SIZE 0x0004 #define RDD_RUNNER_FWTRACE_MAINB_CURR_OFFSET_SIZE 2 #define RDD_RUNNER_FWTRACE_MAINB_CURR_OFFSET_LOG2_SIZE 1 #define BPM_REPLY_RUNNER_B_ADDRESS 0xc7d0 #define BPM_REPLY_RUNNER_B_BYTE_SIZE 0x0030 #define BPM_REPLY_RUNNER_B_LOG2_BYTE_SIZE 0x0006 #define US_RATE_CONTROLLERS_TABLE_ADDRESS 0xc800 #define US_RATE_CONTROLLERS_TABLE_BYTE_SIZE 0x1800 #define US_RATE_CONTROLLERS_TABLE_LOG2_BYTE_SIZE 0x000d #define RDD_US_RATE_CONTROLLERS_TABLE_SIZE 128 #define RDD_US_RATE_CONTROLLERS_TABLE_LOG2_SIZE 7 #define RUNNER_B_SCRATCHPAD_ADDRESS 0xe000 #define RUNNER_B_SCRATCHPAD_BYTE_SIZE 0x0800 #define RUNNER_B_SCRATCHPAD_LOG2_BYTE_SIZE 0x000b #define RDD_RUNNER_B_SCRATCHPAD_SIZE 8 #define RDD_RUNNER_B_SCRATCHPAD_LOG2_SIZE 3 #define US_RING_PACKET_DESCRIPTORS_CACHE_ADDRESS 0xe800 #define US_RING_PACKET_DESCRIPTORS_CACHE_BYTE_SIZE 0x00e0 #define US_RING_PACKET_DESCRIPTORS_CACHE_LOG2_BYTE_SIZE 0x0008 #define RDD_US_RING_PACKET_DESCRIPTORS_CACHE_SIZE 14 #define RDD_US_RING_PACKET_DESCRIPTORS_CACHE_LOG2_SIZE 4 #define IPV4_HOST_ADDRESS_TABLE_ADDRESS 0xe8e0 #define IPV4_HOST_ADDRESS_TABLE_BYTE_SIZE 0x0020 #define IPV4_HOST_ADDRESS_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_IPV4_HOST_ADDRESS_TABLE_SIZE 8 #define RDD_IPV4_HOST_ADDRESS_TABLE_LOG2_SIZE 3 #define DHD_RADIO_INSTANCE_COMMON_B_DATA_ADDRESS 0xe900 #define DHD_RADIO_INSTANCE_COMMON_B_DATA_BYTE_SIZE 0x00c0 #define DHD_RADIO_INSTANCE_COMMON_B_DATA_LOG2_BYTE_SIZE 0x0008 #define RDD_DHD_RADIO_INSTANCE_COMMON_B_DATA_SIZE 3 #define RDD_DHD_RADIO_INSTANCE_COMMON_B_DATA_LOG2_SIZE 2 #define DUMMY_RATE_CONTROLLER_DESCRIPTOR_ADDRESS 0xe9c0 #define DUMMY_RATE_CONTROLLER_DESCRIPTOR_BYTE_SIZE 0x0040 #define DUMMY_RATE_CONTROLLER_DESCRIPTOR_LOG2_BYTE_SIZE 0x0006 #define MAIN_B_DEBUG_TRACE_ADDRESS 0xea00 #define MAIN_B_DEBUG_TRACE_BYTE_SIZE 0x0200 #define MAIN_B_DEBUG_TRACE_LOG2_BYTE_SIZE 0x0009 #define RDD_MAIN_B_DEBUG_TRACE_SIZE 512 #define RDD_MAIN_B_DEBUG_TRACE_LOG2_SIZE 9 #define PICO_B_DEBUG_TRACE_ADDRESS 0xec00 #define PICO_B_DEBUG_TRACE_BYTE_SIZE 0x0200 #define PICO_B_DEBUG_TRACE_LOG2_BYTE_SIZE 0x0009 #define RDD_PICO_B_DEBUG_TRACE_SIZE 512 #define RDD_PICO_B_DEBUG_TRACE_LOG2_SIZE 9 #define EPON_DDR_QUEUE_DESCRIPTORS_TABLE_ADDRESS 0xee00 #define EPON_DDR_QUEUE_DESCRIPTORS_TABLE_BYTE_SIZE 0x0100 #define EPON_DDR_QUEUE_DESCRIPTORS_TABLE_LOG2_BYTE_SIZE 0x0008 #define RDD_EPON_DDR_QUEUE_DESCRIPTORS_TABLE_SIZE 16 #define RDD_EPON_DDR_QUEUE_DESCRIPTORS_TABLE_LOG2_SIZE 4 #define GPON_SKB_ENQUEUED_INDEXES_FREE_PTR_ADDRESS 0xef00 #define GPON_SKB_ENQUEUED_INDEXES_FREE_PTR_BYTE_SIZE 0x0050 #define GPON_SKB_ENQUEUED_INDEXES_FREE_PTR_LOG2_BYTE_SIZE 0x0007 #define RDD_GPON_SKB_ENQUEUED_INDEXES_FREE_PTR_SIZE 40 #define RDD_GPON_SKB_ENQUEUED_INDEXES_FREE_PTR_LOG2_SIZE 6 #define DUMMY_WAN_TX_QUEUE_DESCRIPTOR_ADDRESS 0xef50 #define DUMMY_WAN_TX_QUEUE_DESCRIPTOR_BYTE_SIZE 0x0010 #define DUMMY_WAN_TX_QUEUE_DESCRIPTOR_LOG2_BYTE_SIZE 0x0004 #define US_DHD_TX_POST_FLOW_RING_MGMT_DESCRIPTOR_BUFFER_ADDRESS 0xef60 #define US_DHD_TX_POST_FLOW_RING_MGMT_DESCRIPTOR_BUFFER_BYTE_SIZE 0x0010 #define US_DHD_TX_POST_FLOW_RING_MGMT_DESCRIPTOR_BUFFER_LOG2_BYTE_SIZE 0x0004 #define BRIDGE_PORT_TO_BROADCOM_SWITCH_PORT_MAPPING_TABLE_ADDRESS 0xef70 #define BRIDGE_PORT_TO_BROADCOM_SWITCH_PORT_MAPPING_TABLE_BYTE_SIZE 0x0008 #define BRIDGE_PORT_TO_BROADCOM_SWITCH_PORT_MAPPING_TABLE_LOG2_BYTE_SIZE 0x0003 #define RDD_BRIDGE_PORT_TO_BROADCOM_SWITCH_PORT_MAPPING_TABLE_SIZE 8 #define RDD_BRIDGE_PORT_TO_BROADCOM_SWITCH_PORT_MAPPING_TABLE_LOG2_SIZE 3 #define CPU_TX_DESCRIPTOR_QUEUE_TAIL_TABLE_ADDRESS 0xef78 #define CPU_TX_DESCRIPTOR_QUEUE_TAIL_TABLE_BYTE_SIZE 0x0004 #define CPU_TX_DESCRIPTOR_QUEUE_TAIL_TABLE_LOG2_BYTE_SIZE 0x0002 #define RDD_CPU_TX_DESCRIPTOR_QUEUE_TAIL_TABLE_SIZE 4 #define RDD_CPU_TX_DESCRIPTOR_QUEUE_TAIL_TABLE_LOG2_SIZE 2 #define BRIDGE_PORT_TO_BROADCOM_SWITCH_PORT_MAPPING_TABLE_PTR_ADDRESS 0xef7c #define BRIDGE_PORT_TO_BROADCOM_SWITCH_PORT_MAPPING_TABLE_PTR_BYTE_SIZE 0x0002 #define BRIDGE_PORT_TO_BROADCOM_SWITCH_PORT_MAPPING_TABLE_PTR_LOG2_BYTE_SIZE 0x0001 #define COMMON_B_DUMMY_STORE_ADDRESS 0xef7e #define COMMON_B_DUMMY_STORE_BYTE_SIZE 0x0001 #define COMMON_B_DUMMY_STORE_LOG2_BYTE_SIZE 0x0001 #define DHD_FLOW_RING_CACHE_CTX_NEXT_INDEX_ADDRESS 0xef7f #define DHD_FLOW_RING_CACHE_CTX_NEXT_INDEX_BYTE_SIZE 0x0001 #define DHD_FLOW_RING_CACHE_CTX_NEXT_INDEX_LOG2_BYTE_SIZE 0x0001 #define GPON_SKB_ENQUEUED_INDEXES_PUT_PTR_ADDRESS 0xef80 #define GPON_SKB_ENQUEUED_INDEXES_PUT_PTR_BYTE_SIZE 0x0050 #define GPON_SKB_ENQUEUED_INDEXES_PUT_PTR_LOG2_BYTE_SIZE 0x0007 #define RDD_GPON_SKB_ENQUEUED_INDEXES_PUT_PTR_SIZE 40 #define RDD_GPON_SKB_ENQUEUED_INDEXES_PUT_PTR_LOG2_SIZE 6 #define US_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_ADDRESS 0xf000 #define US_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_BYTE_SIZE 0x0800 #define US_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_LOG2_BYTE_SIZE 0x000b #define RDD_US_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_SIZE 8 #define RDD_US_RX_SBPM_TO_FPM_COPY_SCRATCHPAD_LOG2_SIZE 3 #define US_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_ADDRESS 0xf800 #define US_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_BYTE_SIZE 0x0080 #define US_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_US_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_SIZE 2 #define RDD_US_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_LOG2_SIZE 1 #define RDD_US_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_SIZE2 64 #define RDD_US_CPU_REASON_TO_CPU_RX_QUEUE_TABLE_LOG2_SIZE2 6 #define PACKET_SRAM_TO_DDR_COPY_BUFFER_1_ADDRESS 0xf880 #define PACKET_SRAM_TO_DDR_COPY_BUFFER_1_BYTE_SIZE 0x0080 #define PACKET_SRAM_TO_DDR_COPY_BUFFER_1_LOG2_BYTE_SIZE 0x0007 #define PACKET_SRAM_TO_DDR_COPY_BUFFER_2_ADDRESS 0xf900 #define PACKET_SRAM_TO_DDR_COPY_BUFFER_2_BYTE_SIZE 0x0080 #define PACKET_SRAM_TO_DDR_COPY_BUFFER_2_LOG2_BYTE_SIZE 0x0007 #define LAN0_INGRESS_FIFO_ADDRESS 0xf980 #define LAN0_INGRESS_FIFO_BYTE_SIZE 0x0040 #define LAN0_INGRESS_FIFO_LOG2_BYTE_SIZE 0x0006 #define LAN5_INGRESS_FIFO_ADDRESS 0xf9c0 #define LAN5_INGRESS_FIFO_BYTE_SIZE 0x0040 #define LAN5_INGRESS_FIFO_LOG2_BYTE_SIZE 0x0006 #define LAN1_INGRESS_FIFO_ADDRESS 0xfa00 #define LAN1_INGRESS_FIFO_BYTE_SIZE 0x0040 #define LAN1_INGRESS_FIFO_LOG2_BYTE_SIZE 0x0006 #define LAN6_INGRESS_FIFO_ADDRESS 0xfa40 #define LAN6_INGRESS_FIFO_BYTE_SIZE 0x0040 #define LAN6_INGRESS_FIFO_LOG2_BYTE_SIZE 0x0006 #define LAN2_INGRESS_FIFO_ADDRESS 0xfa80 #define LAN2_INGRESS_FIFO_BYTE_SIZE 0x0040 #define LAN2_INGRESS_FIFO_LOG2_BYTE_SIZE 0x0006 #define LAN7_INGRESS_FIFO_ADDRESS 0xfac0 #define LAN7_INGRESS_FIFO_BYTE_SIZE 0x0040 #define LAN7_INGRESS_FIFO_LOG2_BYTE_SIZE 0x0006 #define LAN3_INGRESS_FIFO_ADDRESS 0xfb00 #define LAN3_INGRESS_FIFO_BYTE_SIZE 0x0040 #define LAN3_INGRESS_FIFO_LOG2_BYTE_SIZE 0x0006 #define US_DHD_FLOW_RING_CACHE_LKP_TABLE_ADDRESS 0xfb40 #define US_DHD_FLOW_RING_CACHE_LKP_TABLE_BYTE_SIZE 0x0020 #define US_DHD_FLOW_RING_CACHE_LKP_TABLE_LOG2_BYTE_SIZE 0x0005 #define RDD_US_DHD_FLOW_RING_CACHE_LKP_TABLE_SIZE 16 #define RDD_US_DHD_FLOW_RING_CACHE_LKP_TABLE_LOG2_SIZE 4 #define LAN4_INGRESS_FIFO_ADDRESS 0xfb80 #define LAN4_INGRESS_FIFO_BYTE_SIZE 0x0040 #define LAN4_INGRESS_FIFO_LOG2_BYTE_SIZE 0x0006 #define WAN_ENQUEUE_INGRESS_QUEUE_ADDRESS 0xfc00 #define WAN_ENQUEUE_INGRESS_QUEUE_BYTE_SIZE 0x0040 #define WAN_ENQUEUE_INGRESS_QUEUE_LOG2_BYTE_SIZE 0x0006 #define RDD_WAN_ENQUEUE_INGRESS_QUEUE_SIZE 64 #define RDD_WAN_ENQUEUE_INGRESS_QUEUE_LOG2_SIZE 6 /* DDR */ #define BPM_PACKET_BUFFERS_ADDRESS 0x0000 #define BPM_PACKET_BUFFERS_BYTE_SIZE 0xf00000 #define BPM_PACKET_BUFFERS_LOG2_BYTE_SIZE 0x0018 #define RDD_BPM_PACKET_BUFFERS_SIZE 7680 #define RDD_BPM_PACKET_BUFFERS_LOG2_SIZE 13 #define CONTEXT_TABLE_ADDRESS 0x0000 #define CONTEXT_TABLE_BYTE_SIZE 0x0084 #define CONTEXT_TABLE_LOG2_BYTE_SIZE 0x0008 #define NAT_CACHE_TABLE_ADDRESS 0x0000 #define NAT_CACHE_TABLE_BYTE_SIZE 0x100000 #define NAT_CACHE_TABLE_LOG2_BYTE_SIZE 0x0014 #define RDD_NAT_CACHE_TABLE_SIZE 65536 #define RDD_NAT_CACHE_TABLE_LOG2_SIZE 16 #define NAT_CACHE_EXTENSION_TABLE_ADDRESS 0x0000 #define NAT_CACHE_EXTENSION_TABLE_BYTE_SIZE 0x0070 #define NAT_CACHE_EXTENSION_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_NAT_CACHE_EXTENSION_TABLE_SIZE 7 #define RDD_NAT_CACHE_EXTENSION_TABLE_LOG2_SIZE 3 #define NATC_CONTEXT_TABLE_ADDRESS 0x0000 #define NATC_CONTEXT_TABLE_BYTE_SIZE 0x400000 #define NATC_CONTEXT_TABLE_LOG2_BYTE_SIZE 0x0016 #define RDD_NATC_CONTEXT_TABLE_SIZE 65536 #define RDD_NATC_CONTEXT_TABLE_LOG2_SIZE 16 #define CONTEXT_CONTINUATION_TABLE_ADDRESS 0x0000 #define CONTEXT_CONTINUATION_TABLE_BYTE_SIZE 0x4c0000 #define CONTEXT_CONTINUATION_TABLE_LOG2_BYTE_SIZE 0x0017 #define RDD_CONTEXT_CONTINUATION_TABLE_SIZE 65536 #define RDD_CONTEXT_CONTINUATION_TABLE_LOG2_SIZE 16 #define DHD_TX_POST_FLOW_RING_MGMT_DESCRIPTOR_TABLE_ADDRESS 0x5d1500 #define DHD_TX_POST_FLOW_RING_MGMT_DESCRIPTOR_TABLE_BYTE_SIZE 0x0080 #define DHD_TX_POST_FLOW_RING_MGMT_DESCRIPTOR_TABLE_LOG2_BYTE_SIZE 0x0007 #define RDD_DHD_TX_POST_FLOW_RING_MGMT_DESCRIPTOR_TABLE_SIZE 8 #define RDD_DHD_TX_POST_FLOW_RING_MGMT_DESCRIPTOR_TABLE_LOG2_SIZE 3 #define DHD_RX_POST_DDR_BUFFER_ADDRESS 0x5c1100 #define DHD_RX_POST_DDR_BUFFER_BYTE_SIZE 0x8000 #define DHD_RX_POST_DDR_BUFFER_LOG2_BYTE_SIZE 0x000f #define RDD_DHD_RX_POST_DDR_BUFFER_SIZE 1024 #define RDD_DHD_RX_POST_DDR_BUFFER_LOG2_SIZE 10 #define DHD_RX_COMPLETE_DDR_BUFFER_ADDRESS 0x5c9100 #define DHD_RX_COMPLETE_DDR_BUFFER_BYTE_SIZE 0x8000 #define DHD_RX_COMPLETE_DDR_BUFFER_LOG2_BYTE_SIZE 0x000f #define RDD_DHD_RX_COMPLETE_DDR_BUFFER_SIZE 1024 #define RDD_DHD_RX_COMPLETE_DDR_BUFFER_LOG2_SIZE 10 #define DHD_TX_POST_DDR_BUFFER_ADDRESS 0x5d1580 #define DHD_TX_POST_DDR_BUFFER_BYTE_SIZE 0x1800 #define DHD_TX_POST_DDR_BUFFER_LOG2_BYTE_SIZE 0x000d #define RDD_DHD_TX_POST_DDR_BUFFER_SIZE 8 #define RDD_DHD_TX_POST_DDR_BUFFER_LOG2_SIZE 3 #define RDD_DHD_TX_POST_DDR_BUFFER_SIZE2 16 #define RDD_DHD_TX_POST_DDR_BUFFER_LOG2_SIZE2 4 #define DHD_TX_COMPLETE_DDR_BUFFER_ADDRESS 0x5d2d80 #define DHD_TX_COMPLETE_DDR_BUFFER_BYTE_SIZE 0x0100 #define DHD_TX_COMPLETE_DDR_BUFFER_LOG2_BYTE_SIZE 0x0008 #define RDD_DHD_TX_COMPLETE_DDR_BUFFER_SIZE 16 #define RDD_DHD_TX_COMPLETE_DDR_BUFFER_LOG2_SIZE 4 #define R2D_WR_ARR_DDR_BUFFER_ADDRESS 0x5d1100 #define R2D_WR_ARR_DDR_BUFFER_BYTE_SIZE 0x0100 #define R2D_WR_ARR_DDR_BUFFER_LOG2_BYTE_SIZE 0x0008 #define RDD_R2D_WR_ARR_DDR_BUFFER_SIZE 128 #define RDD_R2D_WR_ARR_DDR_BUFFER_LOG2_SIZE 7 #define D2R_RD_ARR_DDR_BUFFER_ADDRESS 0x5d1200 #define D2R_RD_ARR_DDR_BUFFER_BYTE_SIZE 0x0100 #define D2R_RD_ARR_DDR_BUFFER_LOG2_BYTE_SIZE 0x0008 #define RDD_D2R_RD_ARR_DDR_BUFFER_SIZE 128 #define RDD_D2R_RD_ARR_DDR_BUFFER_LOG2_SIZE 7 #define R2D_RD_ARR_DDR_BUFFER_ADDRESS 0x5d1300 #define R2D_RD_ARR_DDR_BUFFER_BYTE_SIZE 0x0100 #define R2D_RD_ARR_DDR_BUFFER_LOG2_BYTE_SIZE 0x0008 #define RDD_R2D_RD_ARR_DDR_BUFFER_SIZE 128 #define RDD_R2D_RD_ARR_DDR_BUFFER_LOG2_SIZE 7 #define D2R_WR_ARR_DDR_BUFFER_ADDRESS 0x5d1400 #define D2R_WR_ARR_DDR_BUFFER_BYTE_SIZE 0x0100 #define D2R_WR_ARR_DDR_BUFFER_LOG2_BYTE_SIZE 0x0008 #define RDD_D2R_WR_ARR_DDR_BUFFER_SIZE 128 #define RDD_D2R_WR_ARR_DDR_BUFFER_LOG2_SIZE 7 #define WLAN_MCAST_DHD_LIST_TABLE_ADDRESS 0x5c0000 #define WLAN_MCAST_DHD_LIST_TABLE_BYTE_SIZE 0x1000 #define WLAN_MCAST_DHD_LIST_TABLE_LOG2_BYTE_SIZE 0x000c #define RDD_WLAN_MCAST_DHD_LIST_TABLE_SIZE 64 #define RDD_WLAN_MCAST_DHD_LIST_TABLE_LOG2_SIZE 6 #define WLAN_MCAST_DHD_LIST_FORMAT_TABLE_ADDRESS 0x5c1000 #define WLAN_MCAST_DHD_LIST_FORMAT_TABLE_BYTE_SIZE 0x0001 #define WLAN_MCAST_DHD_LIST_FORMAT_TABLE_LOG2_BYTE_SIZE 0x0001 /* PSRAM */ #endif #endif /* _RDD_RUNNER_DEFS_AUTO_H */