/*
 *  linux/include/asm-arm/arch-davinci/io.h
 *
 *  Copyright (C) 2006 Texas Instruments.
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 *
 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *  You should have received a copy of the  GNU General Public License along
 *  with this program; if not, write  to the Free Software Foundation, Inc.,
 *  675 Mass Ave, Cambridge, MA 02139, USA.
 *
 */

#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H

#define IO_SPACE_LIMIT 0xffffffff

/*
 * ----------------------------------------------------------------------------
 * I/O mapping
 * ----------------------------------------------------------------------------
 */
/*--- #define IO_PHYS	     	0x01c00000 ---*/
/*--- #define IO_VIRT	     	0xe1000000 ---*/
/*--- #define IO_SIZE	     	0x00400000 ---*/
/*--- #define io_p2v(pa)   	(((pa) & (IO_SIZE-1)) + IO_VIRT) ---*/
/*--- #define io_v2p(va)   	(((va) & (IO_SIZE-1)) + IO_PHYS) ---*/
/*--- #define IO_ADDRESS(x)	io_p2v(x) ---*/

/*
 * ----------------------------------------------------------------------------
 * I/O mapping
 * ----------------------------------------------------------------------------
 */
#define IO_PHYS	        0x01c00000
#define IO_VIRT	        0xe1000000
#define IO_SIZE	     	0x00400000
#define io_p2v(pa)      (((pa) & (IO_SIZE-1)) + IO_VIRT)
#define io_v2p(va)      (((va) & (IO_SIZE-1)) + IO_PHYS)
#define IO_ADDRESS(x)   io_p2v(x)

#define IRAM_PHYS       0x00000000 /* ARM Internal RAM (Data) */
#define IRAM_VIRT       0xe1400000
#define IRAM_SIZE       SZ_1M
#define iram_p2v(pa)    (((pa) & (IRAM_SIZE-1)) + IRAM_VIRT + IRAM_PHYS)
#define iram_v2p(va)    (((va) & (IRAM_SIZE-1)) + IRAM_PHYS)
#define IRAM_ADDRESS(x) iram_p2v(x)

#define IO_PHYS_EMIF    0x02000000
#define IO_VIRT_EMIF    0xe2000000
#define EMIF_SIZE       SZ_32M
#define emif_p2v(pa)    (((pa) & (EMIF_SIZE-1)) + IO_VIRT_EMIF)
#define emif_v2p(va)    (((va) & (EMIF_SIZE-1)) + IO_PHYS_EMIF)
#define EMIF_ADDRESS(x) emif_p2v(x)

#define IO_PHYS_NAND    0x04000000
#define IO_VIRT_NAND    0xe4000000
#define NAND_SIZE       SZ_1M
#define nand_p2v(pa)    (((pa) & (NAND_SIZE-1)) + IO_VIRT_NAND)
#define nand_v2p(va)    (((va) & (EMIF_NAND-1)) + IO_PHYS_NAND)
#define NAND_ADDRESS(x) nand_p2v(x)


/*
 * We don't actually have real ISA nor PCI buses, but there is so many
 * drivers out there that might just work if we fake them...
 */
#define PCIO_BASE               0
#define __io(a)			((void __iomem *)(PCIO_BASE + (a)))
#define __mem_pci(a)		(a)
#define __mem_isa(a)		(a)

#ifndef __ASSEMBLER__

/*
 * Functions to access the DaVinci IO region
 *
 * NOTE: - Use davinci_read/write[bwl] for physical register addresses
 *	 - Use __raw_read/write[bwl]() for virtual register addresses
 *	 - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses
 *	 - DO NOT use hardcoded virtual addresses to allow changing the
 *	   IO address space again if needed
 */
#define davinci_readb(a)	(*(volatile unsigned char  *)IO_ADDRESS(a))
#define davinci_readw(a)	(*(volatile unsigned short *)IO_ADDRESS(a))
#define davinci_readl(a)	(*(volatile unsigned int   *)IO_ADDRESS(a))

#define davinci_writeb(v,a)	(*(volatile unsigned char  *)IO_ADDRESS(a) = (v))
#define davinci_writew(v,a)	(*(volatile unsigned short *)IO_ADDRESS(a) = (v))
#define davinci_writel(v,a)	(*(volatile unsigned int   *)IO_ADDRESS(a) = (v))

/* 16 bit uses LDRH/STRH, base +/- offset_8 */
typedef struct { volatile unsigned short offset[256]; } __regbase16;
#define __REGV16(vaddr)		((__regbase16 *)((vaddr)&~0xff)) \
					->offset[((vaddr)&0xff)>>1]
#define __REG16(paddr)          __REGV16(io_p2v(paddr))

/* 8/32 bit uses LDR/STR, base +/- offset_12 */
typedef struct { volatile unsigned char offset[4096]; } __regbase8;
#define __REGV8(vaddr)		((__regbase8  *)((vaddr)&~4095)) \
					->offset[((vaddr)&4095)>>0]
#define __REG8(paddr)		__REGV8(io_p2v(paddr))

typedef struct { volatile unsigned int offset[4096]; } __regbase32;
#define __REGV32(vaddr)		((__regbase32 *)((vaddr)&~4095)) \
					->offset[((vaddr)&4095)>>2]
/* FIXME: Just for compilation sake changed from __REG32 to __REG */
#define __REG(paddr)		__REGV32(io_p2v(paddr))

extern void davinci_map_common_io(void);
extern void davinci_init_common_hw(void);
#else

#define __REG(x)	(*((volatile unsigned long *)io_p2v(x)))

#endif

#endif /* __ASM_ARCH_IO_H */