--- zzzz-none-000/linux-2.6.19.2/arch/mips/mm/c-sb1.c	2007-01-10 19:10:37.000000000 +0000
+++ davinci-8020-5505/linux-2.6.19.2/arch/mips/mm/c-sb1.c	2007-01-11 07:38:19.000000000 +0000
@@ -19,7 +19,6 @@
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  */
 #include <linux/init.h>
-#include <linux/hardirq.h>
 
 #include <asm/asm.h>
 #include <asm/bootinfo.h>
@@ -50,15 +49,6 @@
 static unsigned int icache_range_cutoff;
 static unsigned int dcache_range_cutoff;
 
-static inline void sb1_on_each_cpu(void (*func) (void *info), void *info,
-				   int retry, int wait)
-{
-	preempt_disable();
-	smp_call_function(func, info, retry, wait);
-	func(info);
-	preempt_enable();
-}
-
 /*
  * The dcache is fully coherent to the system, with one
  * big caveat:  the instruction stream.  In other words,
@@ -236,32 +226,13 @@
 	args.vma = vma;
 	args.addr = addr;
 	args.pfn = pfn;
-	sb1_on_each_cpu(sb1_flush_cache_page_ipi, (void *) &args, 1, 1);
+	on_each_cpu(sb1_flush_cache_page_ipi, (void *) &args, 1, 1);
 }
 #else
 void sb1_flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn)
 	__attribute__((alias("local_sb1_flush_cache_page")));
 #endif
 
-#ifdef CONFIG_SMP
-static void sb1_flush_cache_data_page_ipi(void *info)
-{
-	unsigned long start = (unsigned long)info;
-
-	__sb1_writeback_inv_dcache_range(start, start + PAGE_SIZE);
-}
-
-static void sb1_flush_cache_data_page(unsigned long addr)
-{
-	if (in_atomic())
-		__sb1_writeback_inv_dcache_range(addr, addr + PAGE_SIZE);
-	else
-		on_each_cpu(sb1_flush_cache_data_page_ipi, (void *) addr, 1, 1);
-}
-#else
-void sb1_flush_cache_data_page(unsigned long)
-	__attribute__((alias("local_sb1_flush_cache_data_page")));
-#endif
 
 /*
  * Invalidate all caches on this CPU
@@ -278,7 +249,7 @@
 
 static void sb1___flush_cache_all(void)
 {
-	sb1_on_each_cpu(sb1___flush_cache_all_ipi, 0, 1, 1);
+	on_each_cpu(sb1___flush_cache_all_ipi, 0, 1, 1);
 }
 #else
 void sb1___flush_cache_all(void)
@@ -328,7 +299,7 @@
 
 	args.start = start;
 	args.end = end;
-	sb1_on_each_cpu(sb1_flush_icache_range_ipi, &args, 1, 1);
+	on_each_cpu(sb1_flush_icache_range_ipi, &args, 1, 1);
 }
 #else
 void sb1_flush_icache_range(unsigned long start, unsigned long end)
@@ -355,7 +326,7 @@
 
 static void sb1_flush_cache_sigtramp(unsigned long addr)
 {
-	sb1_on_each_cpu(sb1_flush_cache_sigtramp_ipi, (void *) addr, 1, 1);
+	on_each_cpu(sb1_flush_cache_sigtramp_ipi, (void *) addr, 1, 1);
 }
 #else
 void sb1_flush_cache_sigtramp(unsigned long addr)
@@ -473,6 +444,7 @@
 void sb1_cache_init(void)
 {
 	extern char except_vec2_sb1;
+	extern char handle_vec2_sb1;
 
 	/* Special cache error handler for SB1 */
 	set_uncached_handler (0x100, &except_vec2_sb1, 0x80);
@@ -501,7 +473,7 @@
 
 	flush_cache_sigtramp = sb1_flush_cache_sigtramp;
 	local_flush_data_cache_page = (void *) sb1_nop;
-	flush_data_cache_page = sb1_flush_cache_data_page;
+	flush_data_cache_page = (void *) sb1_nop;
 
 	/* Full flush */
 	__flush_cache_all = sb1___flush_cache_all;
@@ -525,5 +497,5 @@
 	:
 	: "memory");
 
-	local_sb1___flush_cache_all();
+	flush_cache_all();
 }