--- zzzz-none-000/linux-2.6.19.2/drivers/mtd/maps/Kconfig	2007-01-10 19:10:37.000000000 +0000
+++ davinci-8020-5505/linux-2.6.19.2/drivers/mtd/maps/Kconfig	2007-05-02 13:26:05.000000000 +0000
@@ -60,6 +60,79 @@
 	  Ignore this option if you use run-time physmap configuration
 	  (i.e., run-time calling physmap_configure()).
 
+
+config MTD_PAGEDMAP
+	tristate "CFI Flash device in physical paged memory map"
+	depends on (MTD_CFI || MTD_JEDECPROBE || MTD_ROM) && MTD_COMPLEX_MAPPINGS
+	help
+	  This provides a 'mapping' driver which allows the NOR Flash and
+	  ROM driver code to communicate with chips which are paged
+	  physically into the CPU's memory. You will need to configure
+	  the physical address and size of the flash chips on your
+	  particular board as well as the bus width, either statically
+	  with config options or at run-time.
+
+config MTD_PAGED_BIT_A20
+	depends on MTD_PAGEDMAP
+    hex "GPIO of addressline A20"
+
+config MTD_PAGED_BIT_A21
+	depends on MTD_PAGEDMAP
+    hex "GPIO of addressline A21"
+
+config MTD_PAGED_BIT_A22
+	depends on MTD_PAGEDMAP
+    hex "GPIO of addressline A22"
+
+config MTD_PAGED_BIT_A23
+	depends on MTD_PAGEDMAP
+    hex "GPIO of addressline A23"
+
+config MTD_PAGEDMAP_START
+	hex "Physical start address of mapped window"
+	depends on MTD_PAGEDMAP
+	default "0x8000000"
+	help
+	  This is the physical memory location at which the flash chips
+	  are mapped on your particular target board. Refer to the
+	  memory map which should hopefully be in the documentation for
+	  your board.
+	  Ignore this option if you use run-time physmap configuration
+	  (i.e., run-time calling physmap_configure()).
+
+config MTD_PAGEDMAP_LEN
+	hex "Physical length of page window"
+	depends on MTD_PAGEDMAP
+	default "0"
+	help
+	  This is the total length of the page window
+
+config MTD_PAGEDMAP_SIZE
+	hex "size of the paged flash"
+	depends on MTD_PAGEDMAP
+	default "0"
+	help
+	  This is the total length of the flash chips on
+	  your particular board. If there is space, or aliases, in the
+	  physical memory map between the chips, this could be larger
+	  than the total amount of flash present. Refer to the memory
+	  map which should hopefully be in the documentation for your
+	  board.
+	  Ignore this option if you use run-time physmap configuration
+	  (i.e., run-time calling physmap_configure()).
+
+config MTD_PAGEDMAP_BANKWIDTH
+	int "Bank width in octets for paged flash"
+	depends on MTD_PAGEDMAP
+	default "2"
+	help
+	  This is the total width of the data bus of the flash devices
+	  in octets. For example, if you have a data bus width of 32
+	  bits, you would set the bus width octect value to 4. This is
+	  used internally by the CFI drivers.
+	  Ignore this option if you use run-time physmap configuration
+	  (i.e., run-time calling physmap_configure()).
+
 config MTD_SUN_UFLASH
 	tristate "Sun Microsystems userflash support"
 	depends on SPARC && MTD_CFI