--- zzzz-none-000/linux-2.6.19.2/drivers/mtd/nand/nand_base.c 2007-01-10 19:10:37.000000000 +0000 +++ davinci-8020-5505/linux-2.6.19.2/drivers/mtd/nand/nand_base.c 2007-08-06 07:41:25.000000000 +0000 @@ -91,7 +91,9 @@ * For devices which display every fart in the system on a seperate LED. Is * compiled away when LED support is disabled. */ +#if defined(CONFIG_NEW_LEDS) DEFINE_LED_TRIGGER(nand_led_trigger); +#endif /** * nand_release_device - [GENERIC] release chip @@ -315,16 +317,14 @@ page = (int)ofs; if (chip->options & NAND_BUSWIDTH_16) { - chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE, - page & chip->pagemask); + chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE, page & chip->pagemask); bad = cpu_to_le16(chip->read_word(mtd)); if (chip->badblockpos & 0x1) bad >>= 8; if ((bad & 0xFF) != 0xff) res = 1; } else { - chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, - page & chip->pagemask); + chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page & chip->pagemask); if (chip->read_byte(mtd) != 0xff) res = 1; } @@ -420,14 +420,18 @@ struct nand_chip *chip = mtd->priv; unsigned long timeo = jiffies + 2; +#if defined(CONFIG_NEW_LEDS) led_trigger_event(nand_led_trigger, LED_FULL); +#endif /* wait until command is processed or timeout occures */ do { if (chip->dev_ready(mtd)) break; touch_softlockup_watchdog(); } while (time_before(jiffies, timeo)); +#if defined(CONFIG_NEW_LEDS) led_trigger_event(nand_led_trigger, LED_OFF); +#endif } EXPORT_SYMBOL_GPL(nand_wait_ready); @@ -498,20 +502,28 @@ switch (command) { case NAND_CMD_PAGEPROG: + DEBUG(MTD_DEBUG_LEVEL3, "NAND_CMD_PAGEPROG\n"); + return; case NAND_CMD_ERASE1: + DEBUG(MTD_DEBUG_LEVEL3, "NAND_CMD_ERASE1\n"); + return; case NAND_CMD_ERASE2: + DEBUG(MTD_DEBUG_LEVEL3, "NAND_CMD_ERASE2\n"); + return; case NAND_CMD_SEQIN: + DEBUG(MTD_DEBUG_LEVEL3, "NAND_CMD_SEQIN\n"); + return; case NAND_CMD_STATUS: + DEBUG(MTD_DEBUG_LEVEL3, "NAND_CMD_STATUS\n"); return; case NAND_CMD_RESET: + DEBUG(MTD_DEBUG_LEVEL3, "NAND_CMD_RESET\n"); if (chip->dev_ready) break; udelay(chip->chip_delay); - chip->cmd_ctrl(mtd, NAND_CMD_STATUS, - NAND_CTRL_CLE | NAND_CTRL_CHANGE); - chip->cmd_ctrl(mtd, - NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + chip->cmd_ctrl(mtd, NAND_CMD_STATUS, NAND_CTRL_CLE | NAND_CTRL_CHANGE); + chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ; return; @@ -713,7 +725,9 @@ else timeo += (HZ * 20) / 1000; +#if defined(CONFIG_NEW_LEDS) led_trigger_event(nand_led_trigger, LED_FULL); +#endif /* Apply this short delay always to ensure that we do wait tWB in * any case on any machine. */ @@ -734,7 +748,9 @@ } cond_resched(); } +#if defined(CONFIG_NEW_LEDS) led_trigger_event(nand_led_trigger, LED_OFF); +#endif status = (int)chip->read_byte(mtd); return status; @@ -1479,7 +1495,6 @@ * @buf: the data to write * @page: page number to write * @cached: cached programming - * @raw: use _raw version of write_page */ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, const uint8_t *buf, int page, int cached, int raw) @@ -1587,9 +1602,8 @@ * * NAND write with ECC */ -static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, - struct mtd_oob_ops *ops) -{ +static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops) { + int chipnr, realpage, page, blockmask; struct nand_chip *chip = mtd->priv; uint32_t writelen = ops->len; @@ -1602,8 +1616,7 @@ /* reject writes, which are not page aligned */ if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { - printk(KERN_NOTICE "nand_write: " - "Attempt to write not page aligned data\n"); + printk(KERN_NOTICE "nand_write: Attempt to write not page aligned data\n"); return -EINVAL; } @@ -1634,8 +1647,7 @@ if (unlikely(oob)) oob = nand_fill_oob(chip, oob, ops); - ret = chip->write_page(mtd, chip, buf, page, cached, - (ops->mode == MTD_OOB_RAW)); + ret = chip->write_page(mtd, chip, buf, page, cached, (ops->mode == MTD_OOB_RAW)); if (ret) break; @@ -1813,6 +1825,7 @@ { struct nand_chip *chip = mtd->priv; /* Send commands to erase a block */ + printk("[singe_erase_cmd] page 0x%x\n", page); chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); } @@ -1829,6 +1842,7 @@ { struct nand_chip *chip = mtd->priv; /* Send commands to erase a block */ + printk("[multi_erase_cmd] page 0x%x\n", page); chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); @@ -1857,9 +1871,8 @@ * * Erase one ore more blocks */ -int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, - int allowbbt) -{ +int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, int allowbbt) { + int page, len, status, pages_per_block, ret, chipnr; struct nand_chip *chip = mtd->priv; int rewrite_bbt[NAND_MAX_CHIPS]={0}; @@ -1876,15 +1889,13 @@ /* Length must align on block boundary */ if (instr->len & ((1 << chip->phys_erase_shift) - 1)) { - DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " - "Length not block aligned\n"); + DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n"); return -EINVAL; } /* Do not allow erase past end of device */ if ((instr->len + instr->addr) > mtd->size) { - DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " - "Erase past end of device\n"); + DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n"); return -EINVAL; } @@ -1905,8 +1916,7 @@ /* Check, if it is write protected */ if (nand_check_wp(mtd)) { - DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " - "Device is write protected!!!\n"); + DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n"); instr->state = MTD_ERASE_FAILED; goto erase_exit; } @@ -1929,10 +1939,8 @@ /* * heck if we have a bad block, we do not erase bad blocks ! */ - if (nand_block_checkbad(mtd, ((loff_t) page) << - chip->page_shift, 0, allowbbt)) { - printk(KERN_WARNING "nand_erase: attempt to erase a " - "bad block at page 0x%08x\n", page); + if (nand_block_checkbad(mtd, ((loff_t) page) << chip->page_shift, 0, allowbbt)) { + printk(KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page); instr->state = MTD_ERASE_FAILED; goto erase_exit; } @@ -1959,8 +1967,7 @@ /* See if block erase succeeded */ if (status & NAND_STATUS_FAIL) { - DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " - "Failed erase, page 0x%08x\n", page); + DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Failed erase, page 0x%08x\n", page); instr->state = MTD_ERASE_FAILED; instr->fail_addr = (page << chip->page_shift); goto erase_exit; @@ -2169,13 +2176,33 @@ *maf_id = chip->read_byte(mtd); dev_id = chip->read_byte(mtd); +#if 0 + if (*maf_id == NAND_MFR_SPANSION) { + char device_code, block_size, page_size, last; + device_code = chip->read_byte(mtd); + block_size = chip->read_byte(mtd); + page_size = chip->read_byte(mtd); + last = chip->read_byte(mtd); + printk("[nand_get_flash_type] id %d device_code 0x%x blocksize 0x%x page_size 0x%x last 0x%x\n", *maf_id, device_code, block_size, page_size, last); + } +#endif + /* Lookup the flash id */ - for (i = 0; nand_flash_ids[i].name != NULL; i++) { - if (dev_id == nand_flash_ids[i].id) { - type = &nand_flash_ids[i]; - break; - } - } + if (*maf_id == NAND_MFR_SPANSION) { + for (i = 0; nand_flash_spansion_ids[i].name != NULL; i++) { + if (dev_id == nand_flash_spansion_ids[i].id) { + type = &nand_flash_spansion_ids[i]; + break; + } + } + } else { + for (i = 0; nand_flash_ids[i].name != NULL; i++) { + if (dev_id == nand_flash_ids[i].id) { + type = &nand_flash_ids[i]; + break; + } + } + } if (!type) return ERR_PTR(-ENODEV); @@ -2225,12 +2252,10 @@ * chip correct ! */ if (busw != (chip->options & NAND_BUSWIDTH_16)) { - printk(KERN_INFO "NAND device: Manufacturer ID:" - " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, - dev_id, nand_manuf_ids[maf_idx].name, mtd->name); + printk(KERN_INFO "NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s)\n", + *maf_id, dev_id, nand_manuf_ids[maf_idx].name, mtd->name); printk(KERN_WARNING "NAND bus width %d instead %d bit\n", - (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, - busw ? 16 : 8); + (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, busw ? 16 : 8); return ERR_PTR(-EINVAL); } @@ -2239,8 +2264,7 @@ /* Convert chipsize to number of pages per chip -1. */ chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; - chip->bbt_erase_shift = chip->phys_erase_shift = - ffs(mtd->erasesize) - 1; + chip->bbt_erase_shift = chip->phys_erase_shift = ffs(mtd->erasesize) - 1; chip->chip_shift = ffs(chip->chipsize) - 1; /* Set the bad block position */ @@ -2272,11 +2296,13 @@ if (mtd->writesize > 512 && chip->cmdfunc == nand_command) chip->cmdfunc = nand_command_lp; - printk(KERN_INFO "NAND device: Manufacturer ID:" - " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, dev_id, - nand_manuf_ids[maf_idx].name, type->name); + printk(KERN_INFO "NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s)\n", + *maf_id, dev_id, nand_manuf_ids[maf_idx].name, type->name); + + /*--- dump parameter ---*/ + printk(KERN_INFO "NAND device: size write 0x%x oob 0x%x erase 0x%x\n", mtd->writesize, mtd->oobsize, mtd->erasesize); - return type; + return type; } /** @@ -2574,13 +2600,17 @@ static int __init nand_base_init(void) { +#if defined(CONFIG_NEW_LEDS) led_trigger_register_simple("nand-disk", &nand_led_trigger); +#endif return 0; } static void __exit nand_base_exit(void) { +#if defined(CONFIG_NEW_LEDS) led_trigger_unregister_simple(nand_led_trigger); +#endif } module_init(nand_base_init);