/dts-v1/;
#include "prx321-sfu.dtsi"

/ {
	model = "PRX321-SFU-QSPI-ETH";
	compatible = "intel,prx321-sfu-qspi-eth", "intel,prx321-sfu", "intel,prx300";

	chosen {
		stdout-path = "serial0";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x20000000 0x40000000>; /* 1024 MB */
	};
};

&ponmbox1 {
	status = "okay";
	resets = <&rcu0 0x10 28>;
	reset-names = "ponip";
	/delete-property/ pinctrl-names;
	/delete-property/ pinctrl-0;
};

&lan0 {
	intel,lct-en = <0>;
	intel,extra-subif = <0>;
};

&lan1 {
	intel,lct-en = <0>;
	intel,extra-subif = <0>;
};

&wan {
	status = "okay";
};

&wan_xpcs_phy {
	status = "okay";
};

&wan_xpcs {
	status = "okay";
	xpcs-mode = <0>; /* 0 - 10G_KR_MODE, 1 - 10G_XAUI_MODE, 2 - 1G_XAUI_MODE, 3 - 2P5G_GMII_MODE */
	/* xpcs RX EQ Settings */
	xpcs-afe_en = <0x0>, <0x0>, <0x0>, <0x0>;
	xpcs-dfe_en = <0x0>, <0x0>, <0x0>, <0x0>;
	xpcs-cont_adapt_en = <0x0>, <0x0>, <0x0>, <0x0>;
	xpcs-rx_attn_lvl = <0x7>, <0x7>, <0x7>, <0x7>;
	xpcs-rx_ctle_boost = <0x0>, <0x0>, <0x0>, <0x0>;
	xpcs-rx_ctle_pole = <0x6>, <0x6>, <0x6>, <0x6>;
	xpcs-rx_vga2_gain = <0x5>, <0x5>, <0x5>, <0x5>;
	xpcs-rx_vga1_gain = <0x5>, <0x5>, <0x5>, <0x5>;
	/* xpcs TX EQ Settings */
	xpcs-tx_eq_pre = <0x10>, <0x10>, <0x4>, <0x4>;
	xpcs-tx_eq_post =  <0x0>, <0x0>, <0x4>, <0x4>;
	xpcs-tx_eq_main = <0x24>, <0x24>, <0x10>, <0x10>;
	xpcs-tx_iboost_lvl = <0xF>, <0xF>,<0xF>, <0xF>;
	xpcs-tx_vboost_lvl = <0x5>, <0x5>, <0x5>, <0x5>;
	xpcs-tx_vboost_en = <0x1>, <0x1>, <0x1>, <0x1>;
};

/* For voice enable the SPI driver needed for access to the on silicon VCODEC but prevent switching the pinmux to this SPI bus. On this design these pins are used for the QSPI bus. */
&ssc0 {
	status = "okay";
	/delete-property/ pinctrl-names;
	/delete-property/ pinctrl-0;
};

&qspi0 {
	status = "okay";
	ltq-spinand@0 {
		status = "okay";
	};
};