// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2019 Intel Corporation.
 */

#ifndef _SSX4_SSX_H
#define _SSX4_SSX_H

/*! Base Address of SSX4_SHARED_LINK */
#define SSX4_SHARED_LINK_MODULE_BASE 0x16000000u

/*! Permission Offset (relative) */
#define REG4_TREG4_PM_TREG4_PM_READ_PERMISSION_0 0x80050
#define REG4_TREG4_PM_TREG4_PM_WRITE_PERMISSION_0 0x80058
#define REG4_TREG4_PM_TREG4_PM_READ_PERMISSION_1 0x80070
#define REG4_TREG4_PM_TREG4_PM_WRITE_PERMISSION_1 0x80078
#define REG4_TCGU_PM_TCGU_PM_READ_PERMISSION_0 0x80450
#define REG4_TCGU_PM_TCGU_PM_WRITE_PERMISSION_0 0x80458
#define REG4_TRCU_PM_TRCU_PM_READ_PERMISSION_0 0x80850
#define REG4_TRCU_PM_TRCU_PM_WRITE_PERMISSION_0 0x80858
#define REG4_TPMU_PM_TPMU_PM_READ_PERMISSION_0 0x80C50
#define REG4_TPMU_PM_TPMU_PM_WRITE_PERMISSION_0 0x80C58
#define REG4_TPCM_PM_TPCM_PM_READ_PERMISSION_0 0x81050
#define REG4_TPCM_PM_TPCM_PM_WRITE_PERMISSION_0 0x81058
#define REG4_TGPIO_PM_TGPIO_PM_READ_PERMISSION_0 0x81450
#define REG4_TGPIO_PM_TGPIO_PM_WRITE_PERMISSION_0 0x81458
#define REG4_TLEDC_PM_TLEDC_PM_READ_PERMISSION_0 0x81850
#define REG4_TLEDC_PM_TLEDC_PM_WRITE_PERMISSION_0 0x81858
#define REG4_TI2C_PM_TI2C0_PM_READ_PERMISSION_0 0x81C50
#define REG4_TI2C_PM_TI2C0_PM_WRITE_PERMISSION_0 0x81C58
#define REG4_TASC0_PM_TASC0_PM_READ_PERMISSION_0 0x82050
#define REG4_TASC0_PM_TASC0_PM_WRITE_PERMISSION_0 0x82058
#define REG4_TASC1_PM_TASC1_PM_READ_PERMISSION_0 0x82450
#define REG4_TASC1_PM_TASC1_PM_WRITE_PERMISSION_0 0x82458
#define REG4_TGPT0_PM_TGPT0_PM_READ_PERMISSION_0 0x82850
#define REG4_TGPT0_PM_TGPT0_PM_WRITE_PERMISSION_0 0x82858
#define REG4_TSSC0_PM_TSSC0_PM_READ_PERMISSION_0 0x82C50
#define REG4_TSSC0_PM_TSSC0_PM_WRITE_PERMISSION_0 0x82C58
#define REG4_TSSC1_PM_TSSC1_PM_READ_PERMISSION_0 0x83050
#define REG4_TSSC1_PM_TSSC1_PM_WRITE_PERMISSION_0 0x83058
#define REG4_TDMA0_PM_TDM0_PM_READ_PERMISSION_0 0x83450
#define REG4_TDMA0_PM_TDM0_PM_WRITE_PERMISSION_0 0x83458
#define REG4_TGPT1_PM_TGPT1_PM_READ_PERMISSION_0 0x83C50
#define REG4_TGPT1_PM_TGPT1_PM_WRITE_PERMISSION_0 0x83C58
#define REG4_TGPT2_PM_TGPT2_PM_READ_PERMISSION_0 0x84050
#define REG4_TGPT2_PM_TGPT2_PM_WRITE_PERMISSION_0 0x84058
#define REG4_TI2C0_PM_TI2C1_PM_READ_PERMISSION_0 0x85050
#define REG4_TI2C0_PM_TI2C1_PM_WRITE_PERMISSION_0 0x85058
#define REG4_TI2C1_PM_TI2C2_PM_READ_PERMISSION_0 0x85450
#define REG4_TI2C1_PM_TI2C2_PM_WRITE_PERMISSION_0 0x85458

#endif