//----------------------------------------------------------------------------- // LSD Generator //----------------------------------------------------------------------------- // Perl Package : LSD::generator::targetC (v1.1) // LSD Source : D:/Users/shij/Perforce/l1033.grx500.win.v_shij.priv.dfv.grx500.dfv/ipg_lsd/lsd_sys/source/xml/reg_files/CBM_Desc64b.xml // Register File Name : CBM_DESC64B // Register File Title : Central Buffer Manager 64-Bit Descriptor Register Description // Register Width : 64 // Note : Doxygen compliant comments //----------------------------------------------------------------------------- #ifndef _CBM_DESC64B_H #define _CBM_DESC64B_H //! \defgroup CBM_DESC64B Register File CBM_DESC64B - Central Buffer Manager 64-Bit Descriptor Register Description //! @{ //! Base Address of CBM_DESC64B #define CBM_DESC64B_MODULE_BASE 0x1E500000u //! \defgroup SDESC0_0_IGP_5 Register SDESC0_0_IGP_5 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_0_IGP_5 0x0 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_0_IGP_5 0x1E500000u //! Register Reset Value #define SDESC0_0_IGP_5_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_5_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_5_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_0_IGP_5 Register SDESC1_0_IGP_5 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_0_IGP_5 0x8 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_0_IGP_5 0x1E500008u //! Register Reset Value #define SDESC1_0_IGP_5_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_5_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_5_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_1_IGP_5 Register SDESC0_1_IGP_5 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_1_IGP_5 0x10 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_1_IGP_5 0x1E500010u //! Register Reset Value #define SDESC0_1_IGP_5_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_5_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_5_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_1_IGP_5 Register SDESC1_1_IGP_5 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_1_IGP_5 0x18 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_1_IGP_5 0x1E500018u //! Register Reset Value #define SDESC1_1_IGP_5_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_5_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_5_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_0_IGP_5 Register JDESC0_0_IGP_5 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_0_IGP_5 0x800 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_0_IGP_5 0x1E500800u //! Register Reset Value #define JDESC0_0_IGP_5_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_5_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_5_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_0_IGP_5 Register JDESC1_0_IGP_5 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_0_IGP_5 0x808 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_0_IGP_5 0x1E500808u //! Register Reset Value #define JDESC1_0_IGP_5_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_5_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_5_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_1_IGP_5 Register JDESC0_1_IGP_5 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_1_IGP_5 0x810 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_1_IGP_5 0x1E500810u //! Register Reset Value #define JDESC0_1_IGP_5_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_5_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_5_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_1_IGP_5 Register JDESC1_1_IGP_5 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_1_IGP_5 0x818 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_1_IGP_5 0x1E500818u //! Register Reset Value #define JDESC1_1_IGP_5_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_5_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_5_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_0_IGP_6 Register SDESC0_0_IGP_6 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_0_IGP_6 0x1000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_0_IGP_6 0x1E501000u //! Register Reset Value #define SDESC0_0_IGP_6_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_6_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_6_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_0_IGP_6 Register SDESC1_0_IGP_6 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_0_IGP_6 0x1008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_0_IGP_6 0x1E501008u //! Register Reset Value #define SDESC1_0_IGP_6_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_6_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_6_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_1_IGP_6 Register SDESC0_1_IGP_6 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_1_IGP_6 0x1010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_1_IGP_6 0x1E501010u //! Register Reset Value #define SDESC0_1_IGP_6_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_6_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_6_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_1_IGP_6 Register SDESC1_1_IGP_6 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_1_IGP_6 0x1018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_1_IGP_6 0x1E501018u //! Register Reset Value #define SDESC1_1_IGP_6_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_6_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_6_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_0_IGP_6 Register JDESC0_0_IGP_6 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_0_IGP_6 0x1800 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_0_IGP_6 0x1E501800u //! Register Reset Value #define JDESC0_0_IGP_6_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_6_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_6_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_0_IGP_6 Register JDESC1_0_IGP_6 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_0_IGP_6 0x1808 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_0_IGP_6 0x1E501808u //! Register Reset Value #define JDESC1_0_IGP_6_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_6_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_6_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_1_IGP_6 Register JDESC0_1_IGP_6 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_1_IGP_6 0x1810 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_1_IGP_6 0x1E501810u //! Register Reset Value #define JDESC0_1_IGP_6_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_6_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_6_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_1_IGP_6 Register JDESC1_1_IGP_6 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_1_IGP_6 0x1818 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_1_IGP_6 0x1E501818u //! Register Reset Value #define JDESC1_1_IGP_6_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_6_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_6_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_0_IGP_7 Register SDESC0_0_IGP_7 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_0_IGP_7 0x2000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_0_IGP_7 0x1E502000u //! Register Reset Value #define SDESC0_0_IGP_7_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_7_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_7_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_0_IGP_7 Register SDESC1_0_IGP_7 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_0_IGP_7 0x2008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_0_IGP_7 0x1E502008u //! Register Reset Value #define SDESC1_0_IGP_7_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_7_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_7_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_1_IGP_7 Register SDESC0_1_IGP_7 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_1_IGP_7 0x2010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_1_IGP_7 0x1E502010u //! Register Reset Value #define SDESC0_1_IGP_7_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_7_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_7_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_1_IGP_7 Register SDESC1_1_IGP_7 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_1_IGP_7 0x2018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_1_IGP_7 0x1E502018u //! Register Reset Value #define SDESC1_1_IGP_7_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_7_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_7_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_0_IGP_7 Register JDESC0_0_IGP_7 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_0_IGP_7 0x2800 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_0_IGP_7 0x1E502800u //! Register Reset Value #define JDESC0_0_IGP_7_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_7_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_7_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_0_IGP_7 Register JDESC1_0_IGP_7 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_0_IGP_7 0x2808 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_0_IGP_7 0x1E502808u //! Register Reset Value #define JDESC1_0_IGP_7_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_7_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_7_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_1_IGP_7 Register JDESC0_1_IGP_7 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_1_IGP_7 0x2810 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_1_IGP_7 0x1E502810u //! Register Reset Value #define JDESC0_1_IGP_7_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_7_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_7_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_1_IGP_7 Register JDESC1_1_IGP_7 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_1_IGP_7 0x2818 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_1_IGP_7 0x1E502818u //! Register Reset Value #define JDESC1_1_IGP_7_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_7_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_7_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_0_IGP_8 Register SDESC0_0_IGP_8 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_0_IGP_8 0x3000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_0_IGP_8 0x1E503000u //! Register Reset Value #define SDESC0_0_IGP_8_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_8_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_8_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_0_IGP_8 Register SDESC1_0_IGP_8 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_0_IGP_8 0x3008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_0_IGP_8 0x1E503008u //! Register Reset Value #define SDESC1_0_IGP_8_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_8_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_8_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_1_IGP_8 Register SDESC0_1_IGP_8 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_1_IGP_8 0x3010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_1_IGP_8 0x1E503010u //! Register Reset Value #define SDESC0_1_IGP_8_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_8_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_8_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_1_IGP_8 Register SDESC1_1_IGP_8 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_1_IGP_8 0x3018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_1_IGP_8 0x1E503018u //! Register Reset Value #define SDESC1_1_IGP_8_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_8_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_8_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_0_IGP_8 Register JDESC0_0_IGP_8 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_0_IGP_8 0x3800 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_0_IGP_8 0x1E503800u //! Register Reset Value #define JDESC0_0_IGP_8_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_8_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_8_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_0_IGP_8 Register JDESC1_0_IGP_8 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_0_IGP_8 0x3808 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_0_IGP_8 0x1E503808u //! Register Reset Value #define JDESC1_0_IGP_8_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_8_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_8_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_1_IGP_8 Register JDESC0_1_IGP_8 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_1_IGP_8 0x3810 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_1_IGP_8 0x1E503810u //! Register Reset Value #define JDESC0_1_IGP_8_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_8_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_8_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_1_IGP_8 Register JDESC1_1_IGP_8 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_1_IGP_8 0x3818 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_1_IGP_8 0x1E503818u //! Register Reset Value #define JDESC1_1_IGP_8_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_8_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_8_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_0_IGP_9 Register SDESC0_0_IGP_9 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_0_IGP_9 0x4000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_0_IGP_9 0x1E504000u //! Register Reset Value #define SDESC0_0_IGP_9_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_9_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_9_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_0_IGP_9 Register SDESC1_0_IGP_9 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_0_IGP_9 0x4008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_0_IGP_9 0x1E504008u //! Register Reset Value #define SDESC1_0_IGP_9_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_9_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_9_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_1_IGP_9 Register SDESC0_1_IGP_9 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_1_IGP_9 0x4010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_1_IGP_9 0x1E504010u //! Register Reset Value #define SDESC0_1_IGP_9_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_9_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_9_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_1_IGP_9 Register SDESC1_1_IGP_9 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_1_IGP_9 0x4018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_1_IGP_9 0x1E504018u //! Register Reset Value #define SDESC1_1_IGP_9_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_9_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_9_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_0_IGP_9 Register JDESC0_0_IGP_9 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_0_IGP_9 0x4800 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_0_IGP_9 0x1E504800u //! Register Reset Value #define JDESC0_0_IGP_9_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_9_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_9_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_0_IGP_9 Register JDESC1_0_IGP_9 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_0_IGP_9 0x4808 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_0_IGP_9 0x1E504808u //! Register Reset Value #define JDESC1_0_IGP_9_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_9_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_9_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_1_IGP_9 Register JDESC0_1_IGP_9 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_1_IGP_9 0x4810 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_1_IGP_9 0x1E504810u //! Register Reset Value #define JDESC0_1_IGP_9_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_9_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_9_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_1_IGP_9 Register JDESC1_1_IGP_9 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_1_IGP_9 0x4818 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_1_IGP_9 0x1E504818u //! Register Reset Value #define JDESC1_1_IGP_9_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_9_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_9_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_0_IGP_10 Register SDESC0_0_IGP_10 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_0_IGP_10 0x5000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_0_IGP_10 0x1E505000u //! Register Reset Value #define SDESC0_0_IGP_10_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_10_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_10_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_0_IGP_10 Register SDESC1_0_IGP_10 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_0_IGP_10 0x5008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_0_IGP_10 0x1E505008u //! Register Reset Value #define SDESC1_0_IGP_10_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_10_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_10_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_1_IGP_10 Register SDESC0_1_IGP_10 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_1_IGP_10 0x5010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_1_IGP_10 0x1E505010u //! Register Reset Value #define SDESC0_1_IGP_10_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_10_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_10_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_1_IGP_10 Register SDESC1_1_IGP_10 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_1_IGP_10 0x5018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_1_IGP_10 0x1E505018u //! Register Reset Value #define SDESC1_1_IGP_10_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_10_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_10_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_0_IGP_10 Register JDESC0_0_IGP_10 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_0_IGP_10 0x5800 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_0_IGP_10 0x1E505800u //! Register Reset Value #define JDESC0_0_IGP_10_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_10_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_10_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_0_IGP_10 Register JDESC1_0_IGP_10 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_0_IGP_10 0x5808 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_0_IGP_10 0x1E505808u //! Register Reset Value #define JDESC1_0_IGP_10_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_10_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_10_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_1_IGP_10 Register JDESC0_1_IGP_10 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_1_IGP_10 0x5810 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_1_IGP_10 0x1E505810u //! Register Reset Value #define JDESC0_1_IGP_10_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_10_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_10_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_1_IGP_10 Register JDESC1_1_IGP_10 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_1_IGP_10 0x5818 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_1_IGP_10 0x1E505818u //! Register Reset Value #define JDESC1_1_IGP_10_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_10_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_10_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_0_IGP_11 Register SDESC0_0_IGP_11 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_0_IGP_11 0x6000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_0_IGP_11 0x1E506000u //! Register Reset Value #define SDESC0_0_IGP_11_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_11_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_11_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_0_IGP_11 Register SDESC1_0_IGP_11 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_0_IGP_11 0x6008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_0_IGP_11 0x1E506008u //! Register Reset Value #define SDESC1_0_IGP_11_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_11_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_11_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_1_IGP_11 Register SDESC0_1_IGP_11 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_1_IGP_11 0x6010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_1_IGP_11 0x1E506010u //! Register Reset Value #define SDESC0_1_IGP_11_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_11_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_11_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_1_IGP_11 Register SDESC1_1_IGP_11 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_1_IGP_11 0x6018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_1_IGP_11 0x1E506018u //! Register Reset Value #define SDESC1_1_IGP_11_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_11_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_11_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_0_IGP_11 Register JDESC0_0_IGP_11 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_0_IGP_11 0x6800 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_0_IGP_11 0x1E506800u //! Register Reset Value #define JDESC0_0_IGP_11_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_11_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_11_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_0_IGP_11 Register JDESC1_0_IGP_11 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_0_IGP_11 0x6808 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_0_IGP_11 0x1E506808u //! Register Reset Value #define JDESC1_0_IGP_11_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_11_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_11_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_1_IGP_11 Register JDESC0_1_IGP_11 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_1_IGP_11 0x6810 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_1_IGP_11 0x1E506810u //! Register Reset Value #define JDESC0_1_IGP_11_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_11_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_11_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_1_IGP_11 Register JDESC1_1_IGP_11 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_1_IGP_11 0x6818 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_1_IGP_11 0x1E506818u //! Register Reset Value #define JDESC1_1_IGP_11_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_11_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_11_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_0_IGP_12 Register SDESC0_0_IGP_12 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_0_IGP_12 0x7000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_0_IGP_12 0x1E507000u //! Register Reset Value #define SDESC0_0_IGP_12_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_12_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_12_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_0_IGP_12 Register SDESC1_0_IGP_12 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_0_IGP_12 0x7008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_0_IGP_12 0x1E507008u //! Register Reset Value #define SDESC1_0_IGP_12_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_12_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_12_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_1_IGP_12 Register SDESC0_1_IGP_12 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_1_IGP_12 0x7010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_1_IGP_12 0x1E507010u //! Register Reset Value #define SDESC0_1_IGP_12_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_12_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_12_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_1_IGP_12 Register SDESC1_1_IGP_12 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_1_IGP_12 0x7018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_1_IGP_12 0x1E507018u //! Register Reset Value #define SDESC1_1_IGP_12_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_12_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_12_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_0_IGP_12 Register JDESC0_0_IGP_12 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_0_IGP_12 0x7800 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_0_IGP_12 0x1E507800u //! Register Reset Value #define JDESC0_0_IGP_12_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_12_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_12_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_0_IGP_12 Register JDESC1_0_IGP_12 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_0_IGP_12 0x7808 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_0_IGP_12 0x1E507808u //! Register Reset Value #define JDESC1_0_IGP_12_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_12_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_12_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_1_IGP_12 Register JDESC0_1_IGP_12 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_1_IGP_12 0x7810 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_1_IGP_12 0x1E507810u //! Register Reset Value #define JDESC0_1_IGP_12_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_12_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_12_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_1_IGP_12 Register JDESC1_1_IGP_12 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_1_IGP_12 0x7818 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_1_IGP_12 0x1E507818u //! Register Reset Value #define JDESC1_1_IGP_12_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_12_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_12_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_0_IGP_13 Register SDESC0_0_IGP_13 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_0_IGP_13 0x8000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_0_IGP_13 0x1E508000u //! Register Reset Value #define SDESC0_0_IGP_13_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_13_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_13_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_0_IGP_13 Register SDESC1_0_IGP_13 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_0_IGP_13 0x8008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_0_IGP_13 0x1E508008u //! Register Reset Value #define SDESC1_0_IGP_13_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_13_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_13_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_1_IGP_13 Register SDESC0_1_IGP_13 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_1_IGP_13 0x8010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_1_IGP_13 0x1E508010u //! Register Reset Value #define SDESC0_1_IGP_13_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_13_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_13_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_1_IGP_13 Register SDESC1_1_IGP_13 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_1_IGP_13 0x8018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_1_IGP_13 0x1E508018u //! Register Reset Value #define SDESC1_1_IGP_13_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_13_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_13_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_0_IGP_13 Register JDESC0_0_IGP_13 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_0_IGP_13 0x8800 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_0_IGP_13 0x1E508800u //! Register Reset Value #define JDESC0_0_IGP_13_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_13_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_13_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_0_IGP_13 Register JDESC1_0_IGP_13 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_0_IGP_13 0x8808 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_0_IGP_13 0x1E508808u //! Register Reset Value #define JDESC1_0_IGP_13_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_13_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_13_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_1_IGP_13 Register JDESC0_1_IGP_13 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_1_IGP_13 0x8810 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_1_IGP_13 0x1E508810u //! Register Reset Value #define JDESC0_1_IGP_13_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_13_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_13_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_1_IGP_13 Register JDESC1_1_IGP_13 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_1_IGP_13 0x8818 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_1_IGP_13 0x1E508818u //! Register Reset Value #define JDESC1_1_IGP_13_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_13_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_13_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_0_IGP_14 Register SDESC0_0_IGP_14 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_0_IGP_14 0x9000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_0_IGP_14 0x1E509000u //! Register Reset Value #define SDESC0_0_IGP_14_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_14_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_0_IGP_14_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_0_IGP_14 Register SDESC1_0_IGP_14 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_0_IGP_14 0x9008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_0_IGP_14 0x1E509008u //! Register Reset Value #define SDESC1_0_IGP_14_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_14_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_0_IGP_14_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC0_1_IGP_14 Register SDESC0_1_IGP_14 - Ingress Port 64 Bit Standard Descriptor DDW0 //! @{ //! Register Offset (relative) #define SDESC0_1_IGP_14 0x9010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC0_1_IGP_14 0x1E509010u //! Register Reset Value #define SDESC0_1_IGP_14_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_14_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define SDESC0_1_IGP_14_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup SDESC1_1_IGP_14 Register SDESC1_1_IGP_14 - Ingress Port 64 Bit Standard Descriptor DDW1 //! @{ //! Register Offset (relative) #define SDESC1_1_IGP_14 0x9018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_SDESC1_1_IGP_14 0x1E509018u //! Register Reset Value #define SDESC1_1_IGP_14_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_14_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define SDESC1_1_IGP_14_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_0_IGP_14 Register JDESC0_0_IGP_14 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_0_IGP_14 0x9800 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_0_IGP_14 0x1E509800u //! Register Reset Value #define JDESC0_0_IGP_14_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_14_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_0_IGP_14_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_0_IGP_14 Register JDESC1_0_IGP_14 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_0_IGP_14 0x9808 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_0_IGP_14 0x1E509808u //! Register Reset Value #define JDESC1_0_IGP_14_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_14_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_0_IGP_14_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC0_1_IGP_14 Register JDESC0_1_IGP_14 - Ingress Port 64 Bit Jumbo Descriptor DDW0 //! @{ //! Register Offset (relative) #define JDESC0_1_IGP_14 0x9810 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC0_1_IGP_14 0x1E509810u //! Register Reset Value #define JDESC0_1_IGP_14_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_14_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define JDESC0_1_IGP_14_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup JDESC1_1_IGP_14 Register JDESC1_1_IGP_14 - Ingress Port 64 Bit Jumbo Descriptor DDW1 //! @{ //! Register Offset (relative) #define JDESC1_1_IGP_14 0x9818 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_JDESC1_1_IGP_14 0x1E509818u //! Register Reset Value #define JDESC1_1_IGP_14_RST 0x8000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_14_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define JDESC1_1_IGP_14_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_5 Register DESC0_0_EGP_5 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_5 0x40000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_5 0x1E540000u //! Register Reset Value #define DESC0_0_EGP_5_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_5_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_5_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_5 Register DESC1_0_EGP_5 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_5 0x40008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_5 0x1E540008u //! Register Reset Value #define DESC1_0_EGP_5_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_5_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_5_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_5 Register DESC0_1_EGP_5 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_5 0x40010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_5 0x1E540010u //! Register Reset Value #define DESC0_1_EGP_5_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_5_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_5_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_5 Register DESC1_1_EGP_5 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_5 0x40018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_5 0x1E540018u //! Register Reset Value #define DESC1_1_EGP_5_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_5_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_5_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_6 Register DESC0_0_EGP_6 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_6 0x41000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_6 0x1E541000u //! Register Reset Value #define DESC0_0_EGP_6_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_6_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_6_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_6 Register DESC1_0_EGP_6 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_6 0x41008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_6 0x1E541008u //! Register Reset Value #define DESC1_0_EGP_6_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_6_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_6_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_6 Register DESC0_1_EGP_6 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_6 0x41010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_6 0x1E541010u //! Register Reset Value #define DESC0_1_EGP_6_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_6_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_6_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_6 Register DESC1_1_EGP_6 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_6 0x41018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_6 0x1E541018u //! Register Reset Value #define DESC1_1_EGP_6_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_6_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_6_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_7 Register DESC0_0_EGP_7 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_7 0x42000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_7 0x1E542000u //! Register Reset Value #define DESC0_0_EGP_7_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_7_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_7_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_7 Register DESC1_0_EGP_7 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_7 0x42008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_7 0x1E542008u //! Register Reset Value #define DESC1_0_EGP_7_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_7_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_7_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_7 Register DESC0_1_EGP_7 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_7 0x42010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_7 0x1E542010u //! Register Reset Value #define DESC0_1_EGP_7_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_7_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_7_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_7 Register DESC1_1_EGP_7 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_7 0x42018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_7 0x1E542018u //! Register Reset Value #define DESC1_1_EGP_7_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_7_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_7_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_8 Register DESC0_0_EGP_8 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_8 0x43000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_8 0x1E543000u //! Register Reset Value #define DESC0_0_EGP_8_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_8_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_8_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_8 Register DESC1_0_EGP_8 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_8 0x43008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_8 0x1E543008u //! Register Reset Value #define DESC1_0_EGP_8_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_8_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_8_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_8 Register DESC0_1_EGP_8 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_8 0x43010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_8 0x1E543010u //! Register Reset Value #define DESC0_1_EGP_8_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_8_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_8_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_8 Register DESC1_1_EGP_8 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_8 0x43018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_8 0x1E543018u //! Register Reset Value #define DESC1_1_EGP_8_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_8_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_8_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_9 Register DESC0_0_EGP_9 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_9 0x44000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_9 0x1E544000u //! Register Reset Value #define DESC0_0_EGP_9_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_9_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_9_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_9 Register DESC1_0_EGP_9 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_9 0x44008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_9 0x1E544008u //! Register Reset Value #define DESC1_0_EGP_9_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_9_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_9_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_9 Register DESC0_1_EGP_9 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_9 0x44010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_9 0x1E544010u //! Register Reset Value #define DESC0_1_EGP_9_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_9_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_9_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_9 Register DESC1_1_EGP_9 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_9 0x44018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_9 0x1E544018u //! Register Reset Value #define DESC1_1_EGP_9_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_9_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_9_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_10 Register DESC0_0_EGP_10 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_10 0x45000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_10 0x1E545000u //! Register Reset Value #define DESC0_0_EGP_10_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_10_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_10_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_10 Register DESC1_0_EGP_10 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_10 0x45008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_10 0x1E545008u //! Register Reset Value #define DESC1_0_EGP_10_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_10_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_10_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_10 Register DESC0_1_EGP_10 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_10 0x45010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_10 0x1E545010u //! Register Reset Value #define DESC0_1_EGP_10_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_10_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_10_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_10 Register DESC1_1_EGP_10 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_10 0x45018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_10 0x1E545018u //! Register Reset Value #define DESC1_1_EGP_10_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_10_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_10_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_11 Register DESC0_0_EGP_11 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_11 0x46000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_11 0x1E546000u //! Register Reset Value #define DESC0_0_EGP_11_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_11_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_11_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_11 Register DESC1_0_EGP_11 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_11 0x46008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_11 0x1E546008u //! Register Reset Value #define DESC1_0_EGP_11_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_11_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_11_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_11 Register DESC0_1_EGP_11 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_11 0x46010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_11 0x1E546010u //! Register Reset Value #define DESC0_1_EGP_11_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_11_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_11_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_11 Register DESC1_1_EGP_11 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_11 0x46018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_11 0x1E546018u //! Register Reset Value #define DESC1_1_EGP_11_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_11_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_11_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_12 Register DESC0_0_EGP_12 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_12 0x47000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_12 0x1E547000u //! Register Reset Value #define DESC0_0_EGP_12_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_12_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_12_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_12 Register DESC1_0_EGP_12 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_12 0x47008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_12 0x1E547008u //! Register Reset Value #define DESC1_0_EGP_12_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_12_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_12_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_12 Register DESC0_1_EGP_12 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_12 0x47010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_12 0x1E547010u //! Register Reset Value #define DESC0_1_EGP_12_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_12_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_12_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_12 Register DESC1_1_EGP_12 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_12 0x47018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_12 0x1E547018u //! Register Reset Value #define DESC1_1_EGP_12_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_12_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_12_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_13 Register DESC0_0_EGP_13 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_13 0x48000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_13 0x1E548000u //! Register Reset Value #define DESC0_0_EGP_13_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_13_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_13_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_13 Register DESC1_0_EGP_13 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_13 0x48008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_13 0x1E548008u //! Register Reset Value #define DESC1_0_EGP_13_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_13_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_13_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_13 Register DESC0_1_EGP_13 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_13 0x48010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_13 0x1E548010u //! Register Reset Value #define DESC0_1_EGP_13_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_13_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_13_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_13 Register DESC1_1_EGP_13 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_13 0x48018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_13 0x1E548018u //! Register Reset Value #define DESC1_1_EGP_13_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_13_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_13_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_14 Register DESC0_0_EGP_14 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_14 0x49000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_14 0x1E549000u //! Register Reset Value #define DESC0_0_EGP_14_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_14_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_14_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_14 Register DESC1_0_EGP_14 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_14 0x49008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_14 0x1E549008u //! Register Reset Value #define DESC1_0_EGP_14_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_14_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_14_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_14 Register DESC0_1_EGP_14 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_14 0x49010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_14 0x1E549010u //! Register Reset Value #define DESC0_1_EGP_14_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_14_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_14_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_14 Register DESC1_1_EGP_14 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_14 0x49018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_14 0x1E549018u //! Register Reset Value #define DESC1_1_EGP_14_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_14_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_14_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_15 Register DESC0_0_EGP_15 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_15 0x4A000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_15 0x1E54A000u //! Register Reset Value #define DESC0_0_EGP_15_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_15_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_15_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_15 Register DESC1_0_EGP_15 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_15 0x4A008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_15 0x1E54A008u //! Register Reset Value #define DESC1_0_EGP_15_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_15_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_15_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_15 Register DESC0_1_EGP_15 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_15 0x4A010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_15 0x1E54A010u //! Register Reset Value #define DESC0_1_EGP_15_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_15_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_15_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_15 Register DESC1_1_EGP_15 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_15 0x4A018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_15 0x1E54A018u //! Register Reset Value #define DESC1_1_EGP_15_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_15_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_15_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_16 Register DESC0_0_EGP_16 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_16 0x4B000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_16 0x1E54B000u //! Register Reset Value #define DESC0_0_EGP_16_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_16_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_16_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_16 Register DESC1_0_EGP_16 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_16 0x4B008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_16 0x1E54B008u //! Register Reset Value #define DESC1_0_EGP_16_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_16_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_16_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_16 Register DESC0_1_EGP_16 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_16 0x4B010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_16 0x1E54B010u //! Register Reset Value #define DESC0_1_EGP_16_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_16_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_16_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_16 Register DESC1_1_EGP_16 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_16 0x4B018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_16 0x1E54B018u //! Register Reset Value #define DESC1_1_EGP_16_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_16_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_16_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_17 Register DESC0_0_EGP_17 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_17 0x4C000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_17 0x1E54C000u //! Register Reset Value #define DESC0_0_EGP_17_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_17_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_17_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_17 Register DESC1_0_EGP_17 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_17 0x4C008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_17 0x1E54C008u //! Register Reset Value #define DESC1_0_EGP_17_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_17_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_17_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_17 Register DESC0_1_EGP_17 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_17 0x4C010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_17 0x1E54C010u //! Register Reset Value #define DESC0_1_EGP_17_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_17_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_17_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_17 Register DESC1_1_EGP_17 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_17 0x4C018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_17 0x1E54C018u //! Register Reset Value #define DESC1_1_EGP_17_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_17_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_17_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_18 Register DESC0_0_EGP_18 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_18 0x4D000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_18 0x1E54D000u //! Register Reset Value #define DESC0_0_EGP_18_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_18_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_18_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_18 Register DESC1_0_EGP_18 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_18 0x4D008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_18 0x1E54D008u //! Register Reset Value #define DESC1_0_EGP_18_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_18_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_18_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_18 Register DESC0_1_EGP_18 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_18 0x4D010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_18 0x1E54D010u //! Register Reset Value #define DESC0_1_EGP_18_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_18_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_18_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_18 Register DESC1_1_EGP_18 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_18 0x4D018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_18 0x1E54D018u //! Register Reset Value #define DESC1_1_EGP_18_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_18_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_18_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_19 Register DESC0_0_EGP_19 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_19 0x4E000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_19 0x1E54E000u //! Register Reset Value #define DESC0_0_EGP_19_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_19_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_19_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_19 Register DESC1_0_EGP_19 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_19 0x4E008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_19 0x1E54E008u //! Register Reset Value #define DESC1_0_EGP_19_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_19_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_19_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_19 Register DESC0_1_EGP_19 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_19 0x4E010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_19 0x1E54E010u //! Register Reset Value #define DESC0_1_EGP_19_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_19_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_19_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_19 Register DESC1_1_EGP_19 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_19 0x4E018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_19 0x1E54E018u //! Register Reset Value #define DESC1_1_EGP_19_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_19_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_19_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_20 Register DESC0_0_EGP_20 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_20 0x4F000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_20 0x1E54F000u //! Register Reset Value #define DESC0_0_EGP_20_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_20_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_20_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_20 Register DESC1_0_EGP_20 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_20 0x4F008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_20 0x1E54F008u //! Register Reset Value #define DESC1_0_EGP_20_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_20_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_20_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_20 Register DESC0_1_EGP_20 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_20 0x4F010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_20 0x1E54F010u //! Register Reset Value #define DESC0_1_EGP_20_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_20_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_20_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_20 Register DESC1_1_EGP_20 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_20 0x4F018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_20 0x1E54F018u //! Register Reset Value #define DESC1_1_EGP_20_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_20_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_20_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_21 Register DESC0_0_EGP_21 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_21 0x50000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_21 0x1E550000u //! Register Reset Value #define DESC0_0_EGP_21_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_21_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_21_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_21 Register DESC1_0_EGP_21 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_21 0x50008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_21 0x1E550008u //! Register Reset Value #define DESC1_0_EGP_21_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_21_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_21_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_21 Register DESC0_1_EGP_21 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_21 0x50010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_21 0x1E550010u //! Register Reset Value #define DESC0_1_EGP_21_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_21_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_21_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_21 Register DESC1_1_EGP_21 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_21 0x50018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_21 0x1E550018u //! Register Reset Value #define DESC1_1_EGP_21_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_21_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_21_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_0_EGP_22 Register DESC0_0_EGP_22 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_0_EGP_22 0x51000 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_0_EGP_22 0x1E551000u //! Register Reset Value #define DESC0_0_EGP_22_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_22_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_0_EGP_22_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_0_EGP_22 Register DESC1_0_EGP_22 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_0_EGP_22 0x51008 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_0_EGP_22 0x1E551008u //! Register Reset Value #define DESC1_0_EGP_22_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_22_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_0_EGP_22_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC0_1_EGP_22 Register DESC0_1_EGP_22 - Egress Port 64 Bit Descriptor DDW0 //! @{ //! Register Offset (relative) #define DESC0_1_EGP_22 0x51010 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC0_1_EGP_22 0x1E551010u //! Register Reset Value #define DESC0_1_EGP_22_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_22_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 0 #define DESC0_1_EGP_22_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! \defgroup DESC1_1_EGP_22 Register DESC1_1_EGP_22 - Egress Port 64 Bit Descriptor DDW1 //! @{ //! Register Offset (relative) #define DESC1_1_EGP_22 0x51018 //! Register Offset (absolute) for 1st Instance CBM_DESC64B #define CBM_DESC64B_DESC1_1_EGP_22 0x1E551018u //! Register Reset Value #define DESC1_1_EGP_22_RST 0x0000000000000000u //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_22_DESC_POS 0 //! Field DESC - Descriptor Double Double Word 1 #define DESC1_1_EGP_22_DESC_MASK 0xFFFFFFFFFFFFFFFFu //! @} //! @} #endif