//----------------------------------------------------------------------------- // LSD Generator //----------------------------------------------------------------------------- // Perl Package : LSD::generator::targetC (v1.1) // LSD Source : C:/Users/huchunfe/Perforce/huchunfe_huchunfe-MOBL1_dev.FalcONT/ipg_lsd/lsd_sys/source/xml/reg_files/CQEM_DQM_TxPush.xml // Register File Name : TXPUSH_DQM // Register File Title : TX Push DQM Command Receive Registers // Register Width : 128 // Note : Doxygen compliant comments //----------------------------------------------------------------------------- #ifndef _TXPUSH_DQM_H #define _TXPUSH_DQM_H //! \defgroup TXPUSH_DQM Register File TXPUSH_DQM - TX Push DQM Command Receive Registers //! @{ //! Base Address of CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_MODULE_BASE 0x18A40000u //! \defgroup TXPUSH_CMD_RX_EGP_0 Register TXPUSH_CMD_RX_EGP_0 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_0 0x0 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_0 0x18A40000u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_0_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_0_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_0_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_1 Register TXPUSH_CMD_RX_EGP_1 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_1 0x100 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_1 0x18A40100u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_1_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_1_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_1_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_2 Register TXPUSH_CMD_RX_EGP_2 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_2 0x200 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_2 0x18A40200u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_2_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_2_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_2_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_3 Register TXPUSH_CMD_RX_EGP_3 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_3 0x300 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_3 0x18A40300u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_3_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_3_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_3_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_4 Register TXPUSH_CMD_RX_EGP_4 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_4 0x400 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_4 0x18A40400u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_4_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_4_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_4_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_5 Register TXPUSH_CMD_RX_EGP_5 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_5 0x500 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_5 0x18A40500u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_5_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_5_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_5_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_6 Register TXPUSH_CMD_RX_EGP_6 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_6 0x600 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_6 0x18A40600u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_6_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_6_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_6_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_7 Register TXPUSH_CMD_RX_EGP_7 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_7 0x700 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_7 0x18A40700u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_7_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_7_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_7_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_8 Register TXPUSH_CMD_RX_EGP_8 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_8 0x800 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_8 0x18A40800u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_8_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_8_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_8_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_9 Register TXPUSH_CMD_RX_EGP_9 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_9 0x900 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_9 0x18A40900u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_9_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_9_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_9_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_10 Register TXPUSH_CMD_RX_EGP_10 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_10 0xA00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_10 0x18A40A00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_10_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_10_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_10_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_11 Register TXPUSH_CMD_RX_EGP_11 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_11 0xB00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_11 0x18A40B00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_11_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_11_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_11_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_12 Register TXPUSH_CMD_RX_EGP_12 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_12 0xC00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_12 0x18A40C00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_12_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_12_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_12_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_13 Register TXPUSH_CMD_RX_EGP_13 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_13 0xD00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_13 0x18A40D00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_13_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_13_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_13_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_14 Register TXPUSH_CMD_RX_EGP_14 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_14 0xE00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_14 0x18A40E00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_14_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_14_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_14_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_15 Register TXPUSH_CMD_RX_EGP_15 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_15 0xF00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_15 0x18A40F00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_15_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_15_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_15_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_16 Register TXPUSH_CMD_RX_EGP_16 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_16 0x1000 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_16 0x18A41000u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_16_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_16_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_16_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_17 Register TXPUSH_CMD_RX_EGP_17 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_17 0x1100 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_17 0x18A41100u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_17_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_17_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_17_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_18 Register TXPUSH_CMD_RX_EGP_18 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_18 0x1200 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_18 0x18A41200u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_18_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_18_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_18_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_19 Register TXPUSH_CMD_RX_EGP_19 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_19 0x1300 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_19 0x18A41300u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_19_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_19_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_19_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_20 Register TXPUSH_CMD_RX_EGP_20 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_20 0x1400 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_20 0x18A41400u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_20_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_20_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_20_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_21 Register TXPUSH_CMD_RX_EGP_21 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_21 0x1500 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_21 0x18A41500u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_21_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_21_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_21_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_22 Register TXPUSH_CMD_RX_EGP_22 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_22 0x1600 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_22 0x18A41600u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_22_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_22_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_22_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_23 Register TXPUSH_CMD_RX_EGP_23 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_23 0x1700 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_23 0x18A41700u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_23_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_23_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_23_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_24 Register TXPUSH_CMD_RX_EGP_24 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_24 0x1800 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_24 0x18A41800u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_24_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_24_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_24_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_25 Register TXPUSH_CMD_RX_EGP_25 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_25 0x1900 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_25 0x18A41900u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_25_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_25_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_25_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_26 Register TXPUSH_CMD_RX_EGP_26 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_26 0x1A00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_26 0x18A41A00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_26_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_26_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_26_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_27 Register TXPUSH_CMD_RX_EGP_27 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_27 0x1B00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_27 0x18A41B00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_27_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_27_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_27_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_28 Register TXPUSH_CMD_RX_EGP_28 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_28 0x1C00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_28 0x18A41C00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_28_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_28_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_28_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_29 Register TXPUSH_CMD_RX_EGP_29 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_29 0x1D00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_29 0x18A41D00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_29_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_29_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_29_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_30 Register TXPUSH_CMD_RX_EGP_30 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_30 0x1E00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_30 0x18A41E00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_30_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_30_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_30_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_31 Register TXPUSH_CMD_RX_EGP_31 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_31 0x1F00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_31 0x18A41F00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_31_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_31_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_31_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_32 Register TXPUSH_CMD_RX_EGP_32 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_32 0x2000 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_32 0x18A42000u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_32_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_32_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_32_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_33 Register TXPUSH_CMD_RX_EGP_33 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_33 0x2100 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_33 0x18A42100u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_33_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_33_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_33_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_34 Register TXPUSH_CMD_RX_EGP_34 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_34 0x2200 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_34 0x18A42200u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_34_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_34_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_34_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_35 Register TXPUSH_CMD_RX_EGP_35 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_35 0x2300 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_35 0x18A42300u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_35_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_35_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_35_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_36 Register TXPUSH_CMD_RX_EGP_36 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_36 0x2400 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_36 0x18A42400u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_36_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_36_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_36_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_37 Register TXPUSH_CMD_RX_EGP_37 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_37 0x2500 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_37 0x18A42500u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_37_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_37_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_37_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_38 Register TXPUSH_CMD_RX_EGP_38 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_38 0x2600 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_38 0x18A42600u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_38_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_38_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_38_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_39 Register TXPUSH_CMD_RX_EGP_39 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_39 0x2700 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_39 0x18A42700u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_39_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_39_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_39_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_40 Register TXPUSH_CMD_RX_EGP_40 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_40 0x2800 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_40 0x18A42800u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_40_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_40_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_40_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_41 Register TXPUSH_CMD_RX_EGP_41 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_41 0x2900 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_41 0x18A42900u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_41_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_41_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_41_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_42 Register TXPUSH_CMD_RX_EGP_42 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_42 0x2A00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_42 0x18A42A00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_42_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_42_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_42_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_43 Register TXPUSH_CMD_RX_EGP_43 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_43 0x2B00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_43 0x18A42B00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_43_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_43_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_43_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_44 Register TXPUSH_CMD_RX_EGP_44 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_44 0x2C00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_44 0x18A42C00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_44_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_44_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_44_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_45 Register TXPUSH_CMD_RX_EGP_45 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_45 0x2D00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_45 0x18A42D00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_45_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_45_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_45_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_46 Register TXPUSH_CMD_RX_EGP_46 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_46 0x2E00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_46 0x18A42E00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_46_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_46_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_46_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_47 Register TXPUSH_CMD_RX_EGP_47 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_47 0x2F00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_47 0x18A42F00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_47_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_47_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_47_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_48 Register TXPUSH_CMD_RX_EGP_48 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_48 0x3000 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_48 0x18A43000u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_48_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_48_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_48_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_49 Register TXPUSH_CMD_RX_EGP_49 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_49 0x3100 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_49 0x18A43100u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_49_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_49_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_49_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_50 Register TXPUSH_CMD_RX_EGP_50 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_50 0x3200 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_50 0x18A43200u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_50_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_50_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_50_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_51 Register TXPUSH_CMD_RX_EGP_51 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_51 0x3300 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_51 0x18A43300u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_51_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_51_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_51_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_52 Register TXPUSH_CMD_RX_EGP_52 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_52 0x3400 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_52 0x18A43400u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_52_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_52_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_52_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_53 Register TXPUSH_CMD_RX_EGP_53 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_53 0x3500 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_53 0x18A43500u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_53_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_53_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_53_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_54 Register TXPUSH_CMD_RX_EGP_54 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_54 0x3600 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_54 0x18A43600u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_54_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_54_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_54_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_55 Register TXPUSH_CMD_RX_EGP_55 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_55 0x3700 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_55 0x18A43700u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_55_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_55_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_55_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_56 Register TXPUSH_CMD_RX_EGP_56 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_56 0x3800 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_56 0x18A43800u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_56_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_56_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_56_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_57 Register TXPUSH_CMD_RX_EGP_57 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_57 0x3900 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_57 0x18A43900u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_57_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_57_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_57_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_58 Register TXPUSH_CMD_RX_EGP_58 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_58 0x3A00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_58 0x18A43A00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_58_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_58_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_58_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_59 Register TXPUSH_CMD_RX_EGP_59 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_59 0x3B00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_59 0x18A43B00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_59_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_59_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_59_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_60 Register TXPUSH_CMD_RX_EGP_60 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_60 0x3C00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_60 0x18A43C00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_60_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_60_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_60_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_61 Register TXPUSH_CMD_RX_EGP_61 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_61 0x3D00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_61 0x18A43D00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_61_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_61_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_61_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_62 Register TXPUSH_CMD_RX_EGP_62 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_62 0x3E00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_62 0x18A43E00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_62_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_62_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_62_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_63 Register TXPUSH_CMD_RX_EGP_63 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_63 0x3F00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_63 0x18A43F00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_63_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_63_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_63_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_64 Register TXPUSH_CMD_RX_EGP_64 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_64 0x4000 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_64 0x18A44000u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_64_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_64_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_64_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_65 Register TXPUSH_CMD_RX_EGP_65 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_65 0x4100 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_65 0x18A44100u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_65_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_65_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_65_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_66 Register TXPUSH_CMD_RX_EGP_66 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_66 0x4200 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_66 0x18A44200u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_66_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_66_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_66_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_67 Register TXPUSH_CMD_RX_EGP_67 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_67 0x4300 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_67 0x18A44300u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_67_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_67_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_67_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_68 Register TXPUSH_CMD_RX_EGP_68 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_68 0x4400 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_68 0x18A44400u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_68_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_68_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_68_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_69 Register TXPUSH_CMD_RX_EGP_69 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_69 0x4500 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_69 0x18A44500u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_69_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_69_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_69_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_70 Register TXPUSH_CMD_RX_EGP_70 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_70 0x4600 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_70 0x18A44600u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_70_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_70_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_70_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_71 Register TXPUSH_CMD_RX_EGP_71 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_71 0x4700 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_71 0x18A44700u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_71_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_71_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_71_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_72 Register TXPUSH_CMD_RX_EGP_72 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_72 0x4800 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_72 0x18A44800u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_72_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_72_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_72_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_73 Register TXPUSH_CMD_RX_EGP_73 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_73 0x4900 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_73 0x18A44900u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_73_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_73_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_73_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_74 Register TXPUSH_CMD_RX_EGP_74 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_74 0x4A00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_74 0x18A44A00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_74_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_74_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_74_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_75 Register TXPUSH_CMD_RX_EGP_75 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_75 0x4B00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_75 0x18A44B00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_75_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_75_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_75_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_76 Register TXPUSH_CMD_RX_EGP_76 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_76 0x4C00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_76 0x18A44C00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_76_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_76_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_76_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_77 Register TXPUSH_CMD_RX_EGP_77 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_77 0x4D00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_77 0x18A44D00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_77_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_77_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_77_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_78 Register TXPUSH_CMD_RX_EGP_78 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_78 0x4E00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_78 0x18A44E00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_78_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_78_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_78_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_79 Register TXPUSH_CMD_RX_EGP_79 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_79 0x4F00 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_79 0x18A44F00u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_79_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_79_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_79_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_80 Register TXPUSH_CMD_RX_EGP_80 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_80 0x5000 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_80 0x18A45000u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_80_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_80_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_80_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_81 Register TXPUSH_CMD_RX_EGP_81 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_81 0x5100 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_81 0x18A45100u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_81_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_81_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_81_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_82 Register TXPUSH_CMD_RX_EGP_82 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_82 0x5200 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_82 0x18A45200u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_82_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_82_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_82_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_83 Register TXPUSH_CMD_RX_EGP_83 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_83 0x5300 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_83 0x18A45300u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_83_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_83_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_83_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_84 Register TXPUSH_CMD_RX_EGP_84 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_84 0x5400 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_84 0x18A45400u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_84_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_84_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_84_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_85 Register TXPUSH_CMD_RX_EGP_85 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_85 0x5500 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_85 0x18A45500u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_85_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_85_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_85_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_86 Register TXPUSH_CMD_RX_EGP_86 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_86 0x5600 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_86 0x18A45600u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_86_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_86_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_86_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_87 Register TXPUSH_CMD_RX_EGP_87 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_87 0x5700 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_87 0x18A45700u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_87_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_87_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_87_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_88 Register TXPUSH_CMD_RX_EGP_88 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_88 0x5800 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_88 0x18A45800u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_88_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_88_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_88_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! \defgroup TXPUSH_CMD_RX_EGP_89 Register TXPUSH_CMD_RX_EGP_89 - TX Push Command Receive Register //! @{ //! Register Offset (relative) #define TXPUSH_CMD_RX_EGP_89 0x5900 //! Register Offset (absolute) for 1st Instance CQEM_DQM_TXPUSH #define CQEM_DQM_TXPUSH_TXPUSH_CMD_RX_EGP_89 0x18A45900u //! Register Reset Value #define TXPUSH_CMD_RX_EGP_89_RST 0x00000000000000000000000000000000u //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_89_DESC_POS 0 //! Field DESC - Descriptor #define TXPUSH_CMD_RX_EGP_89_DESC_MASK 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFu //! @} //! @} #endif