/*
 * Copyright (C) 2006  Ikanos Communications. All rights reserved.
 * The information and source code contained herein is the property
 * of Ikanos Communications.
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 */

/***
 * VX180/VX185 periodic timer interrupt setup using MIPS count/compare timer
 ***/

#include <linux/sched.h>
#include <linux/interrupt.h>

#ifndef CONFIG_FUSIV_VX185
#include <ikan6850.h>
#endif

#ifdef CONFIG_FUSIV_VX185
#include <vx185_int.h>
#include <vx185_clocks.h>
extern struct clock_values fusiv_718x_clks;
extern void startup_ipc_src(unsigned int irq_nr);
#endif

extern unsigned int mips_hpt_frequency;
extern int cp0_compare_irq;
#if defined (CONFIG_CPU_MIPSR2_IRQ_VI)
extern void mipscpu_int_hw5_dispatch(void);
#endif

/* 
 * Platform hook which returns the interrupt number of the count/compare
 * timer. This is called by the platform-independent implementation 
 * of the count/compare timer.
 */
unsigned int __cpuinit get_c0_compare_int(void) {

	/* Install vector interrupt handler for timer */
#if defined (CONFIG_CPU_MIPSR2_IRQ_VI)
	if (cpu_has_vint) {
		set_vi_handler (FUSIV_MIPS_INT_PIT, mipscpu_int_hw5_dispatch);
		printk("Installed VI handler for MIPS Timer...\n");
		return FUSIV_MIPS_INT_PIT;
	} else
#endif
		return MIPS_TIMER_INT;
}

/* 
 * We use the platform-independent 'clockevent' device implementation of MIPS 
 * CP0 Count/Compare timer for our periodic timer interrupt. The platform strap 
 * code needs to provide the following information to the generic layer :-
 * 1.) Frequency of the CP0 count/compare timer
 * 2.) MIPS interrupt line (0..5) which is used by the timer interrupt. This is
 *     used by the platform-independent code to verify the timer and its interrupt, 
 *     since interrupt processing by software is not enabled yet at this stage.
 * For the generic R4K CP0-timer clockevent device implementation, see:
 * linux/arch/mips/kernel/cevt-r4k.c & linux/kernel/time/tick-common.c
 */
void __init plat_time_init(void)
{
	/* The counter increments every two clock cycles,
	 * hence the frequency is half of core clock
	 */
#ifdef CONFIG_FUSIV_VX185
	mips_hpt_frequency = fusiv_718x_clks.cpu_clk_val / 2;   
#else
	mips_hpt_frequency = MIPS_CORE_CLK_FREQ/2;
#endif

	/* MIPS interrupt line 5 for periodic timer. Need to set this explicitly
	 * for the generic code, since timer interrupt line number is not 
	 * hardwired into CP0_INTCTL[31..29] on VX180.
	 */
#if defined (CONFIG_CPU_MIPSR2_IRQ_VI) 
	if (cpu_has_vint)
		cp0_compare_irq = FUSIV_MIPS_INT_PIT;
	else
#endif
		cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;

	/* Enable the VX180/VX185 IPC mapping of the timer to the MIPS interrupt
	 * line to allow verification of the timer interrupt
	 */
#ifdef CONFIG_FUSIV_VX185
	startup_ipc_src(MIPS_TIMER_INT);
#else
	enable_irq(MIPS_TIMER_INT);
#endif
}