--- zzzz-none-000/linux-2.6.28.10/drivers/mtd/chips/cfi_cmdset_0002.c 2009-05-02 18:54:43.000000000 +0000 +++ fusiv-7390-686/linux-2.6.28.10/drivers/mtd/chips/cfi_cmdset_0002.c 2012-03-09 09:16:56.000000000 +0000 @@ -39,7 +39,14 @@ #include #define AMD_BOOTLOC_BUG -#define FORCE_WORD_WRITE 0 + + +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR +/* Disabling Buffer write for VX185 A1 as part of workaround for AMC issue */ +#define FORCE_WORD_WRITE 1 //Disable Buffer-Write +#else +#define FORCE_WORD_WRITE 0 //Enable Buffer-Write +#endif #define MAX_WORD_RETRIES 3 @@ -82,6 +89,38 @@ }; +/*------------------------------------------------------------------------------------------*\ + * No scheduling in panic mode +\*------------------------------------------------------------------------------------------*/ + +#if defined(CONFIG_TFFS) +extern unsigned int tffs_panic_mode; +#endif + +static inline void cfi_add_wait_queue(wait_queue_head_t *q, wait_queue_t *wait) { +#if defined(CONFIG_TFFS) + if(!tffs_panic_mode) +#endif + add_wait_queue(q, wait); +} +static inline void cfi_remove_wait_queue(wait_queue_head_t *q, wait_queue_t *wait) { +#if defined(CONFIG_TFFS) + if(!tffs_panic_mode) +#endif + remove_wait_queue(q, wait); +} + +static inline void cfi_schedule(void) { +#if defined(CONFIG_TFFS) + if(tffs_panic_mode){ + cfi_udelay(10000); + return; + }else +#endif + schedule(); +} + + /* #define DEBUG_CFI_FEATURES */ @@ -359,6 +398,7 @@ extp = (struct cfi_pri_amdstd*)cfi_read_pri(map, adr, sizeof(*extp), "Amd/Fujitsu"); if (!extp) { + printk(KERN_ERR "[%s:%d] Cannot read chip feature table... Probe failure!\n", __func__, __LINE__); kfree(mtd); return NULL; } @@ -597,7 +637,7 @@ /* Erase suspend */ /* It's harmless to issue the Erase-Suspend and Erase-Resume * commands when the erase algorithm isn't in progress. */ - map_write(map, CMD(0xB0), chip->in_progress_block_addr); + map_cmd_write(map, CMD(0xB0), chip->in_progress_block_addr); chip->oldstate = FL_ERASING; chip->state = FL_ERASE_SUSPENDING; chip->erase_suspended = 1; @@ -611,7 +651,7 @@ * there was an error (so leave the erase * routine to recover from it) or we trying to * use the erase-in-progress sector. */ - map_write(map, CMD(0x30), chip->in_progress_block_addr); + map_cmd_write(map, CMD(0x30), chip->in_progress_block_addr); chip->state = FL_ERASING; chip->oldstate = FL_READY; printk(KERN_ERR "MTD %s(): chip not ready after erase suspend\n", __func__); @@ -643,10 +683,10 @@ default: sleep: set_current_state(TASK_UNINTERRUPTIBLE); - add_wait_queue(&chip->wq, &wait); + cfi_add_wait_queue(&chip->wq, &wait); spin_unlock(chip->mutex); - schedule(); - remove_wait_queue(&chip->wq, &wait); + cfi_schedule(); + cfi_remove_wait_queue(&chip->wq, &wait); spin_lock(chip->mutex); goto resettime; } @@ -660,7 +700,7 @@ switch(chip->oldstate) { case FL_ERASING: chip->state = chip->oldstate; - map_write(map, CMD(0x30), chip->in_progress_block_addr); + map_cmd_write(map, CMD(0x30), chip->in_progress_block_addr); chip->oldstate = FL_READY; chip->state = FL_ERASING; break; @@ -708,7 +748,7 @@ struct cfi_private *cfi = map->fldrv_priv; if (chip->state != FL_POINT && chip->state != FL_READY) { - map_write(map, CMD(0xf0), adr); + map_cmd_write(map, CMD(0xf0), adr); chip->state = FL_READY; } (void) map_read(map, adr); @@ -753,7 +793,7 @@ * we resume the whole thing at once). Yes, it * can happen! */ - map_write(map, CMD(0xb0), adr); + map_cmd_write(map, CMD(0xb0), adr); usec -= xip_elapsed_since(start); suspended = xip_currtime(); do { @@ -775,7 +815,7 @@ break; chip->state = FL_XIP_WHILE_ERASING; chip->erase_suspended = 1; - map_write(map, CMD(0xf0), adr); + map_cmd_write(map, CMD(0xf0), adr); (void) map_read(map, adr); xip_iprefetch(); local_irq_enable(); @@ -793,17 +833,17 @@ while (chip->state != FL_XIP_WHILE_ERASING) { DECLARE_WAITQUEUE(wait, current); set_current_state(TASK_UNINTERRUPTIBLE); - add_wait_queue(&chip->wq, &wait); + cfi_add_wait_queue(&chip->wq, &wait); spin_unlock(chip->mutex); - schedule(); - remove_wait_queue(&chip->wq, &wait); + cfi_schedule(); + cfi_remove_wait_queue(&chip->wq, &wait); spin_lock(chip->mutex); } /* Disallow XIP again */ local_irq_disable(); /* Resume the write or erase operation */ - map_write(map, CMD(0x30), adr); + map_cmd_write(map, CMD(0x30), adr); chip->state = oldstate; start = xip_currtime(); } else if (usec >= 1000000/HZ) { @@ -874,6 +914,30 @@ #endif +/*------------------------------------------------------------------------------------------*\ +\*------------------------------------------------------------------------------------------*/ +#if defined(CONFIG_MACH_FUSIV) +struct _nmi_vector_gap { + unsigned int in_use; + unsigned long long start; + unsigned long long gap_size; + unsigned long long end; +}; + +struct _nmi_vector_gap nmi_vector_gap; + +void set_nmi_vetor_gap(unsigned int start, unsigned int firmware_size, unsigned int gap_size) { + nmi_vector_gap.start = (unsigned long long)start & ((16ULL << 20) - 1ULL); /*--- funktioniert bis zur Flashgröße von 16 MByte ---*/ + nmi_vector_gap.gap_size = gap_size; + nmi_vector_gap.end = (unsigned long long)firmware_size; + nmi_vector_gap.in_use = 1; +} +#endif /*--- #if defined(CONFIG_MACH_FUSIV) ---*/ + +#if defined(CONFIG_TFFS) +extern unsigned int tffs_spi_mode; +#endif + static inline int do_read_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf) { unsigned long cmd_addr; @@ -885,23 +949,64 @@ /* Ensure cmd read/writes are aligned. */ cmd_addr = adr & ~(map_bankwidth(map)-1); - spin_lock(chip->mutex); +#if defined(CONFIG_TFFS) + if(!tffs_spi_mode) +#endif + spin_lock(chip->mutex); + ret = get_chip(map, chip, cmd_addr, FL_READY); if (ret) { - spin_unlock(chip->mutex); +#if defined(CONFIG_TFFS) + if(!tffs_spi_mode) +#endif + spin_unlock(chip->mutex); return ret; } if (chip->state != FL_POINT && chip->state != FL_READY) { - map_write(map, CMD(0xf0), cmd_addr); + map_cmd_write(map, CMD(0xf0), cmd_addr); chip->state = FL_READY; } +#if defined(CONFIG_MACH_FUSIV) + + /*--- wir sind jenseites/höher als der nmi vector gap aber unterhalb des JFFS ---*/ + if (nmi_vector_gap.in_use && (adr > nmi_vector_gap.start) && (adr < nmi_vector_gap.end)) { + /*--- printk(KERN_ERR "[%s] adr 0x%llx (groesser gap start, kleiner end: %llx)\n", __FUNCTION__, adr, nmi_vector_gap.end); ---*/ + map_copy_from(map, buf, adr + nmi_vector_gap.gap_size, len); + + /*--- wir sind unterhalb des nmi vector gaps, die länge kann aber hineinreichen ---*/ + } else if (nmi_vector_gap.in_use && (adr <= nmi_vector_gap.start)) { + + /*--- eine Aufteilung ist nötig ---*/ + if(adr + len > nmi_vector_gap.start) { + unsigned int len_part = nmi_vector_gap.start - adr; + /*--- printk(KERN_ERR "[%s] adr 0x%llx (kleiner gap start, aufteilung noetig, part 0x%x und 0x%x)\n", __FUNCTION__, adr, len_part, len - len_part); ---*/ + if(len_part) + map_copy_from(map, buf, adr, len_part); + map_copy_from(map, buf + len_part, adr + nmi_vector_gap.gap_size + len_part, len - len_part); + + /*--- eine Aufteilung ist nicht nötig ---*/ + } else { + /*--- printk(KERN_ERR "[%s] adr 0x%llx (kleiner gap start)\n", __FUNCTION__, adr); ---*/ + map_copy_from(map, buf, adr, len); + } + } else { + /*--- printk(KERN_ERR "[%s] adr 0x%llx (groesser end 0x%llx)\n", __FUNCTION__, adr, nmi_vector_gap.end); ---*/ + map_copy_from(map, buf, adr, len); + } + +#else map_copy_from(map, buf, adr, len); +#endif put_chip(map, chip, cmd_addr); - spin_unlock(chip->mutex); + +#if defined(CONFIG_TFFS) + if(!tffs_spi_mode) +#endif + spin_unlock(chip->mutex); return 0; } @@ -919,7 +1024,6 @@ chipnum = (from >> cfi->chipshift); ofs = from - (chipnum << cfi->chipshift); - *retlen = 0; while (len) { @@ -944,6 +1048,9 @@ ofs = 0; chipnum++; } +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif return ret; } @@ -962,12 +1069,12 @@ printk(KERN_DEBUG "Waiting for chip to read, status = %d\n", chip->state); #endif set_current_state(TASK_UNINTERRUPTIBLE); - add_wait_queue(&chip->wq, &wait); + cfi_add_wait_queue(&chip->wq, &wait); spin_unlock(chip->mutex); - schedule(); - remove_wait_queue(&chip->wq, &wait); + cfi_schedule(); + cfi_remove_wait_queue(&chip->wq, &wait); #if 0 if(signal_pending(current)) return -EINTR; @@ -1013,7 +1120,6 @@ chipnum=from>>3; ofs=from & 7; - *retlen = 0; while (len) { @@ -1090,8 +1196,17 @@ xip_disable(map, chip, adr); retry: cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0xA0, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif map_write(map, datum, adr); chip->state = FL_WRITING; @@ -1099,6 +1214,9 @@ adr, map_bankwidth(map), chip->word_write_time); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif /* See comment above for timeout value. */ timeo = jiffies + uWriteTimeout; for (;;) { @@ -1107,10 +1225,10 @@ DECLARE_WAITQUEUE(wait, current); set_current_state(TASK_UNINTERRUPTIBLE); - add_wait_queue(&chip->wq, &wait); + cfi_add_wait_queue(&chip->wq, &wait); spin_unlock(chip->mutex); - schedule(); - remove_wait_queue(&chip->wq, &wait); + cfi_schedule(); + cfi_remove_wait_queue(&chip->wq, &wait); timeo = jiffies + (HZ / 2); /* FIXME */ spin_lock(chip->mutex); continue; @@ -1132,6 +1250,9 @@ /* Did we succeed? */ if (!chip_good(map, adr, datum)) { /* reset on all failures. */ +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif map_write( map, CMD(0xF0), chip->start ); /* FIXME - should have reset delay before continuing */ @@ -1146,6 +1267,9 @@ put_chip(map, chip, adr); spin_unlock(chip->mutex); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif return ret; } @@ -1183,12 +1307,12 @@ printk(KERN_DEBUG "Waiting for chip to write, status = %d\n", cfi->chips[chipnum].state); #endif set_current_state(TASK_UNINTERRUPTIBLE); - add_wait_queue(&cfi->chips[chipnum].wq, &wait); + cfi_add_wait_queue(&cfi->chips[chipnum].wq, &wait); spin_unlock(cfi->chips[chipnum].mutex); - schedule(); - remove_wait_queue(&cfi->chips[chipnum].wq, &wait); + cfi_schedule(); + cfi_remove_wait_queue(&cfi->chips[chipnum].wq, &wait); #if 0 if(signal_pending(current)) return -EINTR; @@ -1261,12 +1385,12 @@ printk(KERN_DEBUG "Waiting for chip to write, status = %d\n", cfi->chips[chipnum].state); #endif set_current_state(TASK_UNINTERRUPTIBLE); - add_wait_queue(&cfi->chips[chipnum].wq, &wait); + cfi_add_wait_queue(&cfi->chips[chipnum].wq, &wait); spin_unlock(cfi->chips[chipnum].mutex); - schedule(); - remove_wait_queue(&cfi->chips[chipnum].wq, &wait); + cfi_schedule(); + cfi_remove_wait_queue(&cfi->chips[chipnum].wq, &wait); #if 0 if(signal_pending(current)) return -EINTR; @@ -1328,22 +1452,32 @@ xip_disable(map, chip, cmd_adr); cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif //cfi_send_gen_cmd(0xA0, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); /* Write Buffer Load */ map_write(map, CMD(0x25), cmd_adr); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif chip->state = FL_WRITING_TO_BUFFER; /* Write length of data to come */ words = len / map_bankwidth(map); - map_write(map, CMD(words - 1), cmd_adr); + map_cmd_write(map, CMD(words - 1), cmd_adr); /* Write data */ z = 0; while(z < words * map_bankwidth(map)) { datum = map_word_load(map, buf); map_write(map, datum, adr + z); + udelay(5); z += map_bankwidth(map); buf += map_bankwidth(map); @@ -1353,7 +1487,7 @@ adr += z; /* Write Buffer Program Confirm: GO GO GO */ - map_write(map, CMD(0x29), cmd_adr); + map_cmd_write(map, CMD(0x29), cmd_adr); chip->state = FL_WRITING; INVALIDATE_CACHE_UDELAY(map, chip, @@ -1368,10 +1502,10 @@ DECLARE_WAITQUEUE(wait, current); set_current_state(TASK_UNINTERRUPTIBLE); - add_wait_queue(&chip->wq, &wait); + cfi_add_wait_queue(&chip->wq, &wait); spin_unlock(chip->mutex); - schedule(); - remove_wait_queue(&chip->wq, &wait); + cfi_schedule(); + cfi_remove_wait_queue(&chip->wq, &wait); timeo = jiffies + (HZ / 2); /* FIXME */ spin_lock(chip->mutex); continue; @@ -1390,7 +1524,7 @@ } /* reset on all failures. */ - map_write( map, CMD(0xF0), chip->start ); + map_cmd_write( map, CMD(0xF0), chip->start ); xip_enable(map, chip, adr); /* FIXME - should have reset delay before continuing */ @@ -1403,6 +1537,10 @@ put_chip(map, chip, adr); spin_unlock(chip->mutex); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif + return ret; } @@ -1516,11 +1654,29 @@ xip_disable(map, chip, adr); cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0x10, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif chip->state = FL_ERASING; chip->erase_suspended = 0; @@ -1536,10 +1692,10 @@ if (chip->state != FL_ERASING) { /* Someone's suspended the erase. Sleep */ set_current_state(TASK_UNINTERRUPTIBLE); - add_wait_queue(&chip->wq, &wait); + cfi_add_wait_queue(&chip->wq, &wait); spin_unlock(chip->mutex); - schedule(); - remove_wait_queue(&chip->wq, &wait); + cfi_schedule(); + cfi_remove_wait_queue(&chip->wq, &wait); spin_lock(chip->mutex); continue; } @@ -1565,7 +1721,7 @@ /* Did we succeed? */ if (!chip_good(map, adr, map_word_ff(map))) { /* reset on all failures. */ - map_write( map, CMD(0xF0), chip->start ); + map_cmd_write( map, CMD(0xF0), chip->start ); /* FIXME - should have reset delay before continuing */ ret = -EIO; @@ -1575,6 +1731,9 @@ xip_enable(map, chip, adr); put_chip(map, chip, adr); spin_unlock(chip->mutex); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif return ret; } @@ -1604,11 +1763,29 @@ xip_disable(map, chip, adr); cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL); - map_write(map, CMD(0x30), adr); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif + map_cmd_write(map, CMD(0x30), adr); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif chip->state = FL_ERASING; chip->erase_suspended = 0; @@ -1624,10 +1801,10 @@ if (chip->state != FL_ERASING) { /* Someone's suspended the erase. Sleep */ set_current_state(TASK_UNINTERRUPTIBLE); - add_wait_queue(&chip->wq, &wait); + cfi_add_wait_queue(&chip->wq, &wait); spin_unlock(chip->mutex); - schedule(); - remove_wait_queue(&chip->wq, &wait); + cfi_schedule(); + cfi_remove_wait_queue(&chip->wq, &wait); spin_lock(chip->mutex); continue; } @@ -1656,7 +1833,7 @@ /* Did we succeed? */ if (!chip_good(map, adr, map_word_ff(map))) { /* reset on all failures. */ - map_write( map, CMD(0xF0), chip->start ); + map_cmd_write( map, CMD(0xF0), chip->start ); /* FIXME - should have reset delay before continuing */ ret = -EIO; @@ -1665,6 +1842,9 @@ chip->state = FL_READY; put_chip(map, chip, adr); spin_unlock(chip->mutex); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif return ret; } @@ -1683,6 +1863,9 @@ instr->state = MTD_ERASE_DONE; mtd_erase_callback(instr); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif return 0; } @@ -1706,6 +1889,9 @@ instr->state = MTD_ERASE_DONE; mtd_erase_callback(instr); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif return 0; } @@ -1727,15 +1913,33 @@ cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL); - map_write(map, CMD(0x40), chip->start + adr); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif + map_cmd_write(map, CMD(0x40), chip->start + adr); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif chip->state = FL_READY; put_chip(map, chip, adr + chip->start); @@ -1763,7 +1967,10 @@ cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL); - map_write(map, CMD(0x70), adr); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif + map_cmd_write(map, CMD(0x70), adr); chip->state = FL_READY; put_chip(map, chip, adr + chip->start); @@ -1818,13 +2025,13 @@ default: /* Not an idle state */ set_current_state(TASK_UNINTERRUPTIBLE); - add_wait_queue(&chip->wq, &wait); + cfi_add_wait_queue(&chip->wq, &wait); spin_unlock(chip->mutex); - schedule(); + cfi_schedule(); - remove_wait_queue(&chip->wq, &wait); + cfi_remove_wait_queue(&chip->wq, &wait); goto retry; } @@ -1915,7 +2122,10 @@ if (chip->state == FL_PM_SUSPENDED) { chip->state = FL_READY; - map_write(map, CMD(0xF0), chip->start); + map_cmd_write(map, CMD(0xF0), chip->start); +#ifdef CONFIG_FUSIV_VX185_A1_AMC_WAR + udelay(5); +#endif wake_up(&chip->wq); } else