* Qualcomm Technologies Inc. NSS HLOS Platform Driver.

This driver communicates with the NSS Firmware, and provides empty buffers for
packet-processing to the UBI32 processor.
It also keeps track of sync packets from NSS Firmware.
This driver has 2 sections listed below, one common to all the UBI32 cores and
other specific to each UBI32 core.

1. Driver access details specific to each UBI32/NSS core.

Required properties:
- compatible: "qcom,nss"
- interrupts: UBI32 to Apps interrupts for Sync/Data Packets and Empty Buffers.
- reg-names: Indicates various resources passed to driver by name.
		"nphys","vphys"
		Refers to TCM and CSM Base Addresses of UBI32 Memory map.
- reg: physical address and length of the register set for the device.
- qcom,id: Unique Identifier for the HLOS block.This field is unique identifier
	   for the core, which is also used as an index for global nss context.
- clocks: physical address for NSS source clock, TCM clock and fabric clock.
- resets: physical address for core clock reset, AHB and AXI reset.
- qcom,load-addr: physical address to load NSS firmware.
- qcom,num-queue: how many UBI32 to Apps queue enabled.
- qcom,turbo-frequency = turbo freq supported or not.
- qcom,low-frequency = lowest supported operating frequency.
- qcom,mid-frequency = nominal supported operating frequency.
- qcom,max-frequency = maximum supported operating frequency.

Optional properties:

Each of the following properity indicates that a specific feature is enabled on
this UBI32 core that allows data/stats commnicatin with the Apps CPU

- qcom,capwap-enabled
- qcom,crypto-enabled
- qcom,dtls-enabled
- qcom,gre-redir-enabled
- qcom,ipsec-enabled
- qcom,ipv4-enabled
- qcom,ipv4-reasm-enabled
- qcom,ipv6-enabled
- qcom,ipv6-reasm-enabled
- qcom,l2tpv2-enabled
- qcom,map-t-enabled
- qcom,oam-enabled
- qcom,qvpn-enabled
- qcom,pppoe-enabled
- qcom,pptp-enabled
- qcom,portid-enabled
- qcom,shaping-enabled
- qcom,tstamp-enabled
- qcom,turbo-frequency
- qcom,tun6rd-enabled
- qcom,tunipip6-enabled
- qcom,wlanredirect-enabled
- qcom,wlan-dataplane-offload-enabled

example:
nss0: nss@40000000 {
	compatible = "qcom,nss";
	pinctrl-0 = <&nss_spi_pins>;
	pinctrl-names = "default";
	interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
		GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
	reg = <0x36000000 0x1000 0x39000000 0x10000>;
	reg-names = "nphys", "vphys";
	clocks = <&gcc NSS_CORE_CLK>, <&gcc NSSTCM_CLK_SRC>, <&gcc NSSTCM_CLK>,
		 <&nss_fabric0_clk>, <&nss_fabric1_clk>;
	clock-names = "nss-core-clk", "nss-tcm-src", "nss-tcm-clk",
		      "nss-fab0-clk", "nss-fab1-clk";
	resets = <&gcc UBI32_CORE1_CLKRST_CLAMP_RESET>,
		<&gcc UBI32_CORE1_CLAMP_RESET>,
		<&gcc UBI32_CORE1_AHB_RESET>,
		<&gcc UBI32_CORE1_AXI_RESET>;
	reset-names = "clkrst-clamp", "clamp", "ahb", "axi";
	qcom,id = <0>;
	qcom,num-irq = <2>;
	qcom,num-queue = <2>;
	qcom,load-addr = <0x40000000>;
	qcom,turbo-frequency = <1>;
	qcom,low-frequency = <110000000>;
	qcom,mid-frequency = <550000000>;
	qcom,max-frequency = <733000000>;
	qcom,ipv4-enabled;
	qcom,ipv6-enabled;
	qcom,wlanredirect-enabled;
	qcom,tun6rd-enabled;
	qcom,tunipip6-enabled;
	qcom,shaping-enabled;
	qcom,wlan-dataplane-offload-enabled;
};

nss1: nss@40800000 {
	compatible = "qcom,nss";
	interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
			  GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
	reg = <0x36400000 0x1000 0x39010000 0x10000>;
	reg-names = "nphys", "vphys";
	resets = <&gcc UBI32_CORE2_CLKRST_CLAMP_RESET>,
		 <&gcc UBI32_CORE2_CLAMP_RESET>,
		 <&gcc UBI32_CORE2_AHB_RESET>,
		 <&gcc UBI32_CORE2_AXI_RESET>;
	reset-names = "clkrst-clamp", "clamp", "ahb", "axi";
	qcom,id = <1>;
	qcom,num-irq = <2>;
	qcom,num-queue = <2>;
	qcom,load-addr = <0x40800000>;
	qcom,turbo-frequency = <1>;
	qcom,low-frequency = <110000000>;
	qcom,mid-frequency = <550000000>;
	qcom,max-frequency = <733000000>;
	qcom,crypto-enabled;
	qcom,ipsec-enabled;
	qcom,qvpn-enabled;
};