// SPDX-License-Identifier: GPL-2.0+
#include "rte_gic.h"

#include <linux/kernel.h>
#include <linux/module.h>

#include <asm/avm_enh/avm_tz.h>
#include <asm/avm_enh/avm_gic.h>
#include <asm/avm_enh/avm_gic_fiq.h>

void __iomem *avm_gic_fiq_dist_base(void)
{
	return 0;
}

void __iomem *avm_gic_fiq_cpu_base(void)
{
	return 0;
}

uint32_t rte_gicc_read(uint32_t offset)
{
	register u32 r0 asm("r0") = AVM_SMC_GICC_READ;
	register u32 r1 asm("r1") = offset;

	asm volatile(
			__asmeq("%0", "r0")
			__asmeq("%1", "r1")
			".arch_extension sec\n"
			"smc	#0	@ switch to secure world\n"
			: "=r" (r0), "=r" (r1) : "r" (r0), "r" (r1) : "r2", "r3", "cc"
			);

	return r0;
}

uint32_t rte_gicd_read(uint32_t offset)
{
	register u32 r0 asm("r0") = AVM_SMC_GICD_READ;
	register u32 r1 asm("r1") = offset;

	asm volatile(
			__asmeq("%0", "r0")
			__asmeq("%1", "r1")
			".arch_extension sec\n"
			"smc	#0	@ switch to secure world\n"
			: "=r" (r0), "=r" (r1) : "r" (r0), "r" (r1) : "r2", "r3", "cc"
			);

	return r0;
}

void rte_gicc_write(uint32_t offset, uint32_t data)
{
	register u32 r0 asm("r0") = AVM_SMC_GICC_WRITE;
	register u32 r1 asm("r1") = offset;
	register u32 r2 asm("r2") = data;

	asm volatile(
			__asmeq("%0", "r0")
			__asmeq("%1", "r1")
			__asmeq("%2", "r2")
			".arch_extension sec\n"
			"smc	#0	@ switch to secure world\n"
			: "=r" (r0), "=r" (r1), "=r" (r2) : "r" (r0), "r" (r1), "r" (r2) : "r3", "cc"
			);
}

void rte_gicd_write(uint32_t offset, uint32_t data)
{
	register u32 r0 asm("r0") = AVM_SMC_GICD_WRITE;
	register u32 r1 asm("r1") = offset;
	register u32 r2 asm("r2") = data;

	asm volatile(
			__asmeq("%0", "r0")
			__asmeq("%1", "r1")
			__asmeq("%2", "r2")
			".arch_extension sec\n"
			"smc	#0	@ switch to secure world\n"
			: "=r" (r0), "=r" (r1), "=r" (r2) : "r" (r0), "r" (r1), "r" (r2) : "r3", "cc"
			);
}