/dts-v1/;
/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */
#include "qcom-ipq5018.dtsi"
#include "qcom-ipq5018-avm-common.dtsi"
#include "../../../../include/linux/avm_hw_config_def.h"
#include <dt-bindings/pwm/pwm.h>

/ {
	model = "AVM FRITZ!Repeater 3000 AX";

	#address-cells = <0x2>;
	#size-cells = <0x2>;

	interrupt-parent = <&intc>;

	/delete-property/ MP_256;
	MP_512;

	avm_netdev_map {
		compatible = "avm,port_netdev";

		lan1 {
			netdev = "eth0";
		};
	};

	avm-rt-framework {
		compatible = "avm,rt_framework";

		ipi-gic-sgi = <9>, <10>, <11>, <12>, <13>, <14>;
	};

	aliases {
		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
		serial0 = &blsp1_uart1;
		serial1 = &blsp1_uart2;
		ethernet0 = "/soc/dp1";
		ethernet1 = "/soc/dp2";
	};

	chosen {
		bootargs-append = " swiotlb=1";
		stdout-path = "serial0";
	};

	reserved-memory {
		q6_mem_regions: q6_mem_regions@4b000000 {
			no-map;
			reg = <0x0 0x4b000000 0x0 0x3900000>;
		};

		q6_code_data: q6_code_data@4b000000 {
			no-map;
			reg = <0x0 0x4b000000 0x0 0x1000000>;
		};

		q6_ipq5018_data: q6_ipq5018_data@4c000000 {
			no-map;
			reg = <0x0 0x4c000000 0x0 0xE00000>;
		};

		m3_dump: m3_dump@4CE00000 {
			no-map;
			reg = <0x0 0x4CE00000 0x0 0x100000>;
		};

		q6_etr_region:q6_etr_dump@4CF00000 {
			no-map;
			reg = <0x0 0x4CF00000 0x0 0x100000>;
		};

		q6_caldb_region: q6_caldb_region@4d000000 {
			no-map;
			reg = <0x0 0x4d000000 0x0 0x200000>;
		};

		q6_qcn6122_data1: q6_qcn6122_data1@4d200000 {
			no-map;
			reg = <0x0 0x4d200000 0x0 0x1000000>;
		};

		m3_dump_qcn6122_1: m3_dump_qcn6122_1@4e200000 {
			no-map;
			reg = <0x0 0x4e200000 0x0 0x100000>;
		};

		q6_qcn6122_etr_1: q6_qcn6122_etr_1@4e300000 {
			no-map;
			reg = <0x0 0x4e300000 0x0 0x100000>;
		};

		q6_qcn6122_caldb_1: q6_qcn6122_caldb_1@4e400000 {
			no-map;
			reg = <0x0 0x4e400000 0x0 0x500000>;
		};

		q6_qcn9000_region: qcn9000_pcie0@4e900000 {
			no-map;
			reg = <0x0 0x4E900000 0x0 0x01E00000>;
		};

		mhi_region1: dma_pool1@50700000 {
			compatible = "shared-dma-pool";
			no-map;
			reg = <0x0 0x50700000 0x0 0x01000000>;
		};
	};

	soc {
		serial@78af000 {
			status = "ok";
			pinctrl-0 = <&blsp0_uart_pins>;
			pinctrl-names = "default";
		};

		qpic_bam: dma@7984000{
			status = "ok";
		};

		nand: qpic-nand@79b0000 {
			pinctrl-0 = <&qspi_nand_pins>;
			pinctrl-names = "default";
			status = "ok";
		};

		mdio0: mdio@88000 {
			#address-cells = <1>;
			#size-cells = <0>;
			status = "ok";

			ethernet-phy@0 {
				reg = <7>;
			};
		};

		mdio1: mdio@90000 {
			status = "disabled";
		};

		ess-instance {
			#address-cells = <1>;
			#size-cells = <0>;
			num_devices = <0x1>;
			ess-switch@0x39c00000 {
				switch_mac_mode = <0xff>; /* mac mode for uniphy instance (PORT_WRAPPER_MAX) */
				cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
				qcom,port_phyinfo {
					port@0 {
						port_id = <1>;
						phy_address = <7>;
						mdiobus = <&mdio0>;
					};
				};
			};
		};

		nss-common {
			avm,mem-profile-medium;
		};

		dp1 {
			device_type = "network";
			compatible = "qcom,nss-dp";
			clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
			clock-names = "nss-snoc-gmac-axi-clk";
			qcom,id = <1>;
			reg = <0x39C00000 0x10000>;
			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
			qcom,mactype = <2>;
			qcom,link-poll = <1>;
			qcom,phy-mdio-addr = <7>;
			mdio-bus = <&mdio0>;
			local-mac-address = [000000000000];
			phy-mode = "sgmii";
			devname = "eth0";
			macname = "maca";
		};

		dp2 {
			status = "disabled";
			device_type = "network";
			compatible = "qcom,nss-dp";
			clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
			clock-names = "nss-snoc-gmac-axi-clk";
			qcom,id = <2>;
			reg = <0x39D00000 0x10000>;
			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
			qcom,mactype = <2>;
			qcom,link-poll = <1>;
			qcom,phy-mdio-addr = <4>;
			mdio-bus = <&mdio1>;
			local-mac-address = [000000000000];
			phy-mode = "sgmii";
			devname = "eth1";
			macname = "macb";
		};

		qcom,test@0 {
			status = "ok";
		};
	};
};

&sdhc_1 {
	status = "disabled";
};

&tlmm {
	blsp0_uart_pins: blsp0_uart_pins {
		blsp0_uart_rx {
			pins = "gpio21";
			function = "blsp0_uart0";
			drive-strength = <8>;
		};
		blsp0_uart_tx {
			pins = "gpio20";
			function = "blsp0_uart0";
			drive-strength = <8>;
		};
	};

	blsp1_uart_pins: blsp1_uart_pins {
		blsp1_uart_rx {
			pins = "gpio12";
			function = "blsp1_uart0";
			drive-strength = <8>;
		};
		blsp1_uart_tx {
			pins = "gpio11";
			function = "blsp1_uart0";
			drive-strength = <8>;
		};
	};

	qspi_nand_pins: qspi_nand_pins {
		qspi_clock {
				pins = "gpio9";
				function = "qspi_clk";
				drive-strength = <8>;
				bias-disable;
			};
		qspi_cs {
				pins = "gpio8";
				function = "qspi_cs";
				drive-strength = <8>;
				bias-disable;
			};
		qspi_data_0 {
				pins = "gpio7";
				function = "qspi0";
				drive-strength = <8>;
				bias-disable;
			};
		qspi_data_1 {
				pins = "gpio6";
				function = "qspi1";
				drive-strength = <8>;
				bias-disable;
			};
		qspi_data_2 {
				pins = "gpio5";
				function = "qspi2";
				drive-strength = <8>;
				bias-disable;
			};
		qspi_data_3 {
				pins = "gpio4";
				function = "qspi3";
				drive-strength = <8>;
				bias-disable;
			};
	};

	mdio1_pins: mdio_pinmux {
		mux_0 {
			pins = "gpio36";
			function = "mdc";
			drive-strength = <8>;
			bias-pull-up;
		};

		mux_1 {
			pins = "gpio37";
			function = "mdio";
			drive-strength = <8>;
			bias-pull-up;
		};
	};

	avm_button_pins: avm_button_pins {
		mux {
			pins = "gpio27";
			function = "gpio";
			drive-strength = <2>;
			bias-disable;
		};
	};

	blsp2_spi1_pins: blsp2_spi1_pins {
		mux {
			pins = "gpio23", "gpio24", "gpio25", "gpio26";
			function = "blsp2_spi1";
			drive-strength = <2>;
			bias-pull-up;
		};
	};
};

&pcie_x1phy {
	status = "disabled";
};

&pcie_x1 {
	status = "disabled";
	perst-gpio = <&tlmm 15 1>;
};

&pcie_x2phy {
	status = "ok";
};

&pcie_x2 {
	status = "ok";
	perst-gpio = <&tlmm 18 1>;
};

&eud {
	status = "ok";
};

&dwc_0 {
	/delete-property/ #phy-cells;
	/delete-property/ phys;
	/delete-property/ phy-names;
};

&hs_m31phy_0 {
	status = "ok";
};

&usb3 {
	status = "disabled";
};

&pcie_x1_rp {
    #address-cells = <5>;
    #size-cells = <0>;
	mhi_0: qcom,mhi@0 {
		reg = <0 0 0 0 0 >;
	};
};

&pcie_x2_rp {
	status = "ok";
    #address-cells = <5>;
    #size-cells = <0>;

	mhi_1: qcom,mhi@1 {
		reg = <0 0 0 0 0 >;
		qrtr_instance_id = <0x20>;
		memory-region = <&mhi_region1>;
	};
};

&qfprom {
	status = "ok";
};

&tsens {
	status = "ok";
};

&qgic_msi_0 {
	status = "ok";
};

&qgic_msi_1 {
	status = "ok";
};

&qcom_q6v5_wcss {
	qcom,nosecure;
	qcom,multipd_arch;
	memory-region = <&q6_mem_regions>;
	qcom,share_bootargs;
	qcom,bootargs_smem = <507>;
	boot-args = <0x2 0x4 0x2 0xf 0x0 0x0>;
	/* IPQ5018 */
	q6v5_wcss_userpd1 {
		m3_firmware = "IPQ5018/m3_fw.mdt";
		interrupts-extended = <&wcss_smp2p_in 8 0>,
			<&wcss_smp2p_in 9 0>,
			<&wcss_smp2p_in 12 0>,
			<&wcss_smp2p_in 11 0>;
		interrupt-names ="fatal",
			"ready",
			"spawn_ack",
			"stop-ack";
		qcom,smem-states = <&wcss_smp2p_out 8>,
			<&wcss_smp2p_out 9>,
			<&wcss_smp2p_out 10>;
		qcom,smem-state-names = "shutdown",
			"stop",
			"spawn";
		qca,asid = <1>;
		qca,auto-restart;
		qca,int_radio;
		memory-region = <&q6_ipq5018_data>, <&m3_dump>,
				<&q6_etr_region>;
	};

	/* QCN6122 5G Low*/
	q6v5_wcss_userpd2 {
		m3_firmware = "qcn6122/m3_fw.mdt";
		interrupts-extended = <&wcss_smp2p_in 16 0>,
			<&wcss_smp2p_in 17 0>,
			<&wcss_smp2p_in 20 0>,
			<&wcss_smp2p_in 19 0>;
		interrupt-names ="fatal",
			"ready",
			"spawn_ack",
			"stop-ack";
		qcom,smem-states = <&wcss_smp2p_out 16>,
			<&wcss_smp2p_out 17>,
			<&wcss_smp2p_out 18>;
		qcom,smem-state-names = "shutdown",
			"stop",
			"spawn";
		qca,asid = <2>;
		qca,auto-restart;
		memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>,
				<&q6_qcn6122_etr_1>;
	};
};

&wifi0 {
	/* IPQ5018 */
	qcom,multipd_arch;
	qcom,tgt-mem-mode = <1>;
	qcom,board_id = <0x23>;
	qcom,bdf-addr = <0x0 0x4c000000 0x4c000000 0x0 0x0>;
	qcom,caldb-addr = <0x0 0x4D000000 0 0 0>;
	qcom,caldb-size = <0x200000>;
	qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
	status = "ok";
};

&wlan_cma_5G_0 {
	status = "ok";
};

&wifi1 {
	/* QCN6122 5G Low */
	qcom,multipd_arch;
	qcom,tgt-mem-mode = <1>;
	qcom,board_id = <0x60>;
	/*
	 * once wifi driver changes are in place to
	 * qcn6122 compatible string, remove qcn9100 here
	 */
	compatible = "qcom,cnss-qcn9100", "qcom,cnss-qcn6122";
	memory-region = <&wlan_cma_5G_0>;
	qcom,bdf-addr = <0x0 0x4d200000 0x4cf00000 0x0 0x0>;
	qcom,caldb-addr = <0x0 0x4E400000 0 0 0>;
	qcom,caldb-size = <0x500000>;
	qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
	status = "ok";
};

&wlan_cma_5G_1 {
	status = "ok";
};

&wifi3 {
	/* QCN9000 5G High */
	compatible = "qcom,cnss-qcn9000";
	memory-region = <&wlan_cma_5G_1>;
	board_id = <0xa3>;
	status = "ok";
	qrtr_node_id = <0x20>;
	base-addr = <0x4E900000>;
	m3-dump-addr = <0x4FD00000>;
	etr-addr = <0x4FE00000>;
	caldb-addr = <0x4FF00000>;
	caldb-size = <0x800000>;
	hremote-size = <0x1400000>;
	tgt-mem-mode = <0x1>;
};