/dts-v1/; /* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include "qcom-ipq6018.dtsi" #include "qcom-ipq6018-rpm-regulator.dtsi" #include "qcom-ipq6018-cpr-regulator.dtsi" #include "qcom-ipq6018-cp-cpu.dtsi" #include "qcom-ipq6018-ion.dtsi" #include "qcom-ipq6018-audio-overlay.dtsi" / { #address-cells = <0x2>; #size-cells = <0x2>; model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1"; compatible = "qcom,ipq6018-emulation-c1", "qcom,ipq6018"; interrupt-parent = <&intc>; aliases { serial0 = &blsp1_uart1; serial1 = &blsp1_uart2; sdhc1 = &sdhc_1; sdhc2 = &sdhc_2; /* * Aliases as required by u-boot * to patch MAC addresses */ ethernet0 = "/soc/dp1"; ethernet1 = "/soc/dp2"; ethernet2 = "/soc/dp3"; ethernet3 = "/soc/dp4"; ethernet4 = "/soc/dp5"; }; chosen { linux,initrd-end = <0x46000000>; linux,initrd-start = <0x44000000>; bootargs = "root=/dev/ram0 rw init=/init"; stdout-path = "serial0"; }; memory { device_type = "memory"; reg = <0x0 0x40000000 0x0 0x20000000>; }; /* * +=========+==============+========================+ * | | | | * | Region | Start Offset | Size | * | | | | * +--------+--------------+-------------------------+ * | | | | * | | | | * | | | | * | | | | * | Linux | 0x41000000 | 117MB | * | | | | * | | | | * | | | | * +--------+--------------+-------------------------+ * | TZ App | 0x48500000 | 2MB | * +--------+--------------+-------------------------+ * | | | | * | LPASS | | | * | Q6 | 0x48700000 | 26MB | * | | | | * +--------+--------------+-------------------------+ * * From the available 145 MB for Linux in the first 256 MB, * we are reserving 26 MB for LPASS and 2 MB for TZAPP. * * Refer arch/arm64/boot/dts/qcom/qcom-ipq6018-memory.dtsi * for memory layout. */ reserved-memory { tzapp:tzapp@48500000 { /* TZAPPS */ no-map; reg = <0x0 0x48500000 0x0 0x00200000>; }; lpass@48700000 { no-map; reg = <0x0 0x48700000 0x0 0x01a00000>; }; }; soc { serial@78af000 { status = "ok"; }; blsp1_uart2: serial@78b0000 { status = "ok"; }; cryptobam: dma@704000 { qcom,controlled-remotely = <0>; qcom,config-pipe-trust-reg = <1>; }; qca,scm_restart_reason { status = "disabled"; }; qpic_lcd: qcom_mdss_qpic@7980000 { qcom,bam_timeout = <20000>; status = "ok"; }; qpic_lcd_panel: qcom_mdss_qpic_panel { status = "ok"; }; usb2: usb2@7000000 { status = "ok"; }; usb3: usb3@8A00000 { status = "ok"; }; i2c_0: i2c@78b6000 { status = "ok"; }; spi_0: spi@78b5000 { /* BLSP1 QUP0 */ status = "ok"; m25p80@0 { #address-cells = <1>; #size-cells = <1>; reg = <0>; compatible = "n25q128a11"; linux,modalias = "m25p80", "n25q128a11"; spi-max-frequency = <50000000>; use-default-sizes; }; }; spi_1: spi@78b6000 { /* BLSP1 QUP1 */ mt29f@1 { #address-cells = <1>; #size-cells = <1>; compatible = "spinand,mt29f"; reg = <1>; spi-max-frequency = <24000000>; use-dummybyte-in-readid; }; }; pwm { used-pwm-indices = <1>, <0>, <0>, <0>; status = "ok"; }; q6v5_wcss: q6v5_wcss@CD00000 { qca,emulation; img-addr = <0x4AB00000>; }; glink_adsp: qcom,glink-smem-native-xprt-adsp@4AA00000 { status = "ok"; }; ipc_router_adsp: qcom,ipc_router_adsp_xprt { status = "ok"; }; smp2p_adsp: smp2p-adsp { status = "ok"; }; q6v6_adsp: q6v6_adsp@AB00000 { status = "ok"; }; glink_adsp_ssr: qcom,glink-ssr-adsp { status = "ok"; }; q6v6_adsp: q6v6_adsp@AB00000 { qca,emulation; img-addr = <0x48700000>; }; qpic_bam: dma@7984000{ status = "ok"; }; nand: qpic-nand@79b0000 { status = "ok"; }; sdhc_1: sdhci@7804000 { qcom,bus-speed-mode = "DDR_1p8v"; qcom,emulation = <1>; status = "ok"; }; sdhc_2: sdhci_sd@7804000 { qcom,emulation = <1>; }; pcie0: pci@20000000 { is_emulation = <1>; }; dp1 { device_type = "network"; compatible = "qcom,nss-dp"; qcom,id = <1>; reg = <0x3a001000 0x200>; qcom,mactype = <0>; local-mac-address = [000000000000]; }; dp2 { device_type = "network"; compatible = "qcom,nss-dp"; qcom,id = <2>; reg = <0x3a001200 0x200>; qcom,mactype = <0>; local-mac-address = [000000000000]; }; dp3 { device_type = "network"; compatible = "qcom,nss-dp"; qcom,id = <3>; reg = <0x3a001400 0x200>; qcom,mactype = <0>; local-mac-address = [000000000000]; }; dp4 { device_type = "network"; compatible = "qcom,nss-dp"; qcom,id = <4>; reg = <0x3a001600 0x200>; qcom,mactype = <0>; local-mac-address = [000000000000]; }; dp5 { device_type = "network"; compatible = "qcom,nss-dp"; qcom,id = <5>; reg = <0x3a003000 0x3fff>; qcom,mactype = <1>; local-mac-address = [000000000000]; }; nss_crypto { status = "ok"; }; timer { clock-frequency = <240000>; }; smmu500: arm,smmu@1E00000 { status = "ok"; }; wifi0: wifi@c000000 { status = "disabled"; }; }; psci { status = "disabled"; }; cpus { CPU0: cpu@0 { compatible = "arm,cortex-a53"; enable-method = "qcom,arm-cortex-acc"; L2_0: l2-cache { compatible = "arm,arch-cache"; }; }; CPU1: cpu@1 { compatible = "arm,cortex-a53"; enable-method = "qcom,arm-cortex-acc"; }; CPU2: cpu@2 { compatible = "arm,cortex-a53"; enable-method = "qcom,arm-cortex-acc"; }; CPU3: cpu@3 { compatible = "arm,cortex-a53"; enable-method = "qcom,arm-cortex-acc"; }; }; firmware { qfprom { status = "disabled"; }; }; };