--- zzzz-none-000/linux-4.4.271/drivers/clocksource/qcom-timer.c	2021-06-03 06:22:09.000000000 +0000
+++ hawkeye-5590-750/linux-4.4.271/drivers/clocksource/qcom-timer.c	2023-04-19 10:22:28.000000000 +0000
@@ -27,6 +27,7 @@
 #include <linux/sched_clock.h>
 
 #include <asm/delay.h>
+#include <linux/delay.h>
 
 #define TIMER_MATCH_VAL			0x0000
 #define TIMER_COUNT_VAL			0x0004
@@ -89,7 +90,7 @@
 
 static void __iomem *source_base;
 
-static notrace cycle_t msm_read_timer_count(struct clocksource *cs)
+cycle_t msm_read_timer_count(struct clocksource *cs)
 {
 	return readl_relaxed(source_base + TIMER_COUNT_VAL);
 }
@@ -102,6 +103,24 @@
 	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+#if defined(CONFIG_AVM_ENHANCED)
+static struct delay_timer msm_delay_timer;
+/*--------------------------------------------------------------------------------*\
+ * hschillert: aktuell (ipq4019): ??? 25 MHz (40 ns - 25 counts/us)
+\*--------------------------------------------------------------------------------*/
+unsigned long msm_get_timer_count(void){
+    return msm_read_timer_count(source_base);
+}
+EXPORT_SYMBOL(msm_get_timer_count);
+/*--------------------------------------------------------------------------------*\
+\*--------------------------------------------------------------------------------*/
+unsigned long msm_get_timer_freq(void){
+	return msm_delay_timer.freq;
+}
+EXPORT_SYMBOL(msm_get_timer_freq);
+#endif/*--- #if defined(CONFIG_AVM_ENHANCED) ---*/
+
+
 static int msm_timer_irq;
 static int msm_timer_has_ppi;
 
@@ -216,8 +235,18 @@
 	if (res)
 		pr_err("clocksource_register failed\n");
 	sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz);
+
+#if defined(CONFIG_AVM_ENHANCED)
+	/*--------------------------------------------------------------------------------*\
+	 * an accurate timer necessary for Bogo-Mips calibration, that calculates loops_per_jiffies), 
+	 * (initial cpufreq not on maximum value)
+	 * (mdelay/udelay() based on loops_per_jiffies)
+	\*--------------------------------------------------------------------------------*/
 	msm_delay_timer.freq = dgt_hz;
+	msm_delay_timer.read_current_timer = msm_get_timer_count;
 	register_current_timer_delay(&msm_delay_timer);
+#endif/*--- #if defined(CONFIG_AVM_ENHANCED) ---*/
+
 }
 
 static void __init msm_dt_timer_init(struct device_node *np)
@@ -229,6 +258,8 @@
 	void __iomem *base;
 	void __iomem *cpu0_base;
 
+    printk(KERN_ERR "{%s}\n", __func__);
+
 	base = of_iomap(np, 0);
 	if (!base) {
 		pr_err("Failed to map event base\n");