--- zzzz-none-000/linux-4.4.271/drivers/net/phy/mdio-bitbang.c 2021-06-03 06:22:09.000000000 +0000 +++ hawkeye-5590-750/linux-4.4.271/drivers/net/phy/mdio-bitbang.c 2023-04-19 10:22:29.000000000 +0000 @@ -17,6 +17,7 @@ * kind, whether express or implied. */ +#include #include #include #include @@ -155,8 +156,10 @@ static int mdiobb_read(struct mii_bus *bus, int phy, int reg) { struct mdiobb_ctrl *ctrl = bus->priv; - int ret, i; + int ret; + unsigned long flags; + local_irq_save(flags); if (reg & MII_ADDR_C45) { reg = mdiobb_cmd_addr(ctrl, phy, reg); mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg); @@ -165,29 +168,21 @@ ctrl->ops->set_mdio_dir(ctrl, 0); - /* check the turnaround bit: the PHY should be driving it to zero, if this - * PHY is listed in phy_ignore_ta_mask as having broken TA, skip that - */ - if (mdiobb_get_bit(ctrl) != 0 && - !(bus->phy_ignore_ta_mask & (1 << phy))) { - /* PHY didn't drive TA low -- flush any bits it - * may be trying to send. - */ - for (i = 0; i < 32; i++) - mdiobb_get_bit(ctrl); - - return 0xffff; - } + mdiobb_get_bit(ctrl); ret = mdiobb_get_num(ctrl, 16); mdiobb_get_bit(ctrl); + local_irq_restore(flags); + return ret; } static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val) { struct mdiobb_ctrl *ctrl = bus->priv; + unsigned long flags; + local_irq_save(flags); if (reg & MII_ADDR_C45) { reg = mdiobb_cmd_addr(ctrl, phy, reg); mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg); @@ -202,6 +197,8 @@ ctrl->ops->set_mdio_dir(ctrl, 0); mdiobb_get_bit(ctrl); + local_irq_restore(flags); + return 0; }