--- zzzz-none-000/linux-4.4.271/arch/mips/include/asm/mipsregs.h 2021-06-03 06:22:09.000000000 +0000 +++ maple-fsgw-759/linux-4.4.271/arch/mips/include/asm/mipsregs.h 2023-12-20 10:37:02.000000000 +0000 @@ -269,6 +269,7 @@ #define ST0_KX 0x00000080 #define ST0_DE 0x00010000 #define ST0_CE 0x00020000 +#define ST0_NMI 0x00080000 /* * Setting c0_status.co enables Hit_Writeback and Hit_Writeback_Invalidate @@ -945,7 +946,7 @@ : "=r" (__res)); \ else \ __asm__ __volatile__( \ - ".set\tmips32\n\t" \ + ".set\t"MIPS_ISA_LEVEL"\n\t" \ "mfc0\t%0, " #source ", " #sel "\n\t" \ ".set\tmips0\n\t" \ : "=r" (__res)); \ @@ -964,7 +965,7 @@ : "=r" (__res)); \ else \ __asm__ __volatile__( \ - ".set\tmips64\n\t" \ + ".set\t"MIPS_ISA_LEVEL"\n\t" \ "dmfc0\t%0, " #source ", " #sel "\n\t" \ ".set\tmips0" \ : "=r" (__res)); \ @@ -979,7 +980,7 @@ : : "Jr" ((unsigned int)(value))); \ else \ __asm__ __volatile__( \ - ".set\tmips32\n\t" \ + ".set\t"MIPS_ISA_LEVEL"\n\t" \ "mtc0\t%z0, " #register ", " #sel "\n\t" \ ".set\tmips0" \ : : "Jr" ((unsigned int)(value))); \ @@ -997,7 +998,7 @@ : : "Jr" (value)); \ else \ __asm__ __volatile__( \ - ".set\tmips64\n\t" \ + ".set\t"MIPS_ISA_LEVEL"\n\t" \ "dmtc0\t%z0, " #register ", " #sel "\n\t" \ ".set\tmips0" \ : : "Jr" (value)); \ @@ -1046,7 +1047,7 @@ local_irq_save(__flags); \ if (sel == 0) \ __asm__ __volatile__( \ - ".set\tmips64\n\t" \ + ".set\t"MIPS_ISA_LEVEL"\n\t" \ "dmfc0\t%M0, " #source "\n\t" \ "dsll\t%L0, %M0, 32\n\t" \ "dsra\t%M0, %M0, 32\n\t" \ @@ -1055,7 +1056,7 @@ : "=r" (__val)); \ else \ __asm__ __volatile__( \ - ".set\tmips64\n\t" \ + ".set\t"MIPS_ISA_LEVEL"\n\t" \ "dmfc0\t%M0, " #source ", " #sel "\n\t" \ "dsll\t%L0, %M0, 32\n\t" \ "dsra\t%M0, %M0, 32\n\t" \ @@ -1074,7 +1075,7 @@ local_irq_save(__flags); \ if (sel == 0) \ __asm__ __volatile__( \ - ".set\tmips64\n\t" \ + ".set\t"MIPS_ISA_LEVEL"\n\t" \ "dsll\t%L0, %L0, 32\n\t" \ "dsrl\t%L0, %L0, 32\n\t" \ "dsll\t%M0, %M0, 32\n\t" \ @@ -1084,7 +1085,7 @@ : : "r" (val)); \ else \ __asm__ __volatile__( \ - ".set\tmips64\n\t" \ + ".set\t"MIPS_ISA_LEVEL"\n\t" \ "dsll\t%L0, %L0, 32\n\t" \ "dsrl\t%L0, %L0, 32\n\t" \ "dsll\t%M0, %M0, 32\n\t" \ @@ -1484,7 +1485,7 @@ " .set reorder \n" \ " # gas fails to assemble cfc1 for some archs, \n" \ " # like Octeon. \n" \ - " .set mips1 \n" \ + " .set "MIPS_ISA_LEVEL" \n" \ " "STR(gas_hardfloat)" \n" \ " cfc1 %0,"STR(source)" \n" \ " .set pop \n" \