* Qualcomm Technologies Inc. EIP197 DMA Driver.

The driver is responsible for interacting with EIP197 hardware. It converts
the requests from crypto driver to hardware understandable objects.
Its responsible for handling the interrupts generated by EIP197 hardware.

Required properties:
- compatible = "qcom,eip";
- reg-names = "eip_pbase";
- reg = <0x39800000 0x7ffff>;
- reg_offset = <0x80000>;
- ranges;
- clocks = <&nsscc NSS_CC_CRYPTO_CLK>,
	<&nsscc NSS_CC_NSSNOC_CRYPTO_CLK>,
	<&nsscc NSS_CC_CRYPTO_PPE_CLK>;
- clock-names = "crypto_clk", "crypto_nocclk",
		"crypto_ppeclk";
- clock-frequency = /bits/ 64 <600000000 600000000 300000000>;
- qcom,inline-enabled;
- status = "ok";
- interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
	<GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>;

example:
	eip: eip197@39800000 {
		compatible = "qcom,eip";
		reg-names = "eip_pbase";
		reg = <0x39800000 0x7ffff>;
		reg_offset = <0x80000>;
		ranges;
		clocks = <&nsscc NSS_CC_CRYPTO_CLK>,
		    <&nsscc NSS_CC_NSSNOC_CRYPTO_CLK>,
		    <&nsscc NSS_CC_CRYPTO_PPE_CLK>;
		clock-names = "crypto_clk", "crypto_nocclk",
		     "crypto_ppeclk";
		clock-frequency = /bits/ 64 <600000000 600000000 300000000>;
		qcom,inline-enabled;
		status = "ok";
		interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>;

		dma0 {
		     tx_cpu = /bits/ 8 <0>;
		     rx_cpu = /bits/ 8 <3>;
		     ring-name = "lookaside";
		     ring-id = /bits/ 8 <0>;
		};

		dma1 {
		     tx_cpu = /bits/ 8 <1>;
		     rx_cpu = /bits/ 8 <2>;
		     ring-name = "lookaside";
		     ring-id = /bits/ 8 <1>;
		};

		dma2 {
		     tx_cpu = /bits/ 8 <2>;
		     rx_cpu = /bits/ 8 <1>;
		     ring-name = "lookaside";
		     ring-id = /bits/ 8 <2>;
		};

		dma3 {
		     tx_cpu = /bits/ 8 <3>;
		     rx_cpu = /bits/ 8 <0>;
		     ring-name = "lookaside";
		     ring-id = /bits/ 8 <3>;
		};
	};