// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)

/dts-v1/;

#include "ipq9574-avm-common.dtsi"
#include "ipq9574-wkk-default-memory.dtsi"

/ {
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	model = "FRITZ!Box 7690";

	soc {
		pinctrl@1000000 {
			/* HW-specific pin configuration */
		};

		avm_mac_addr_maceth_0: dp1 {
			status = "ok";
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <1>;
			reg = <0x3a001000 0x200>;
			qcom,mactype = <0>;
			qcom,link-poll = <1>;
			devname = "eth0";
			mac-address = [000000000000];
			qcom,phy-mdio-addr = <0>;
			phy-mode = "sgmii";
		};

		avm_mac_addr_maceth_1: dp2 {
			status = "ok";
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <2>;
			reg = <0x3a001200 0x200>;
			qcom,mactype = <0>;
			qcom,link-poll = <1>;
			devname = "eth1";
			mac-address = [000000000000];
			qcom,phy-mdio-addr = <1>;
			phy-mode = "sgmii";
		};

		avm_mac_addr_maceth_2: dp3 {
			status = "ok";
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <3>;
			reg = <0x3a001400 0x200>;
			qcom,mactype = <0>;
			qcom,link-poll = <1>;
			devname = "eth2";
			mac-address = [000000000000];
			qcom,phy-mdio-addr = <2>;
			phy-mode = "sgmii";
		};

		avm_mac_addr_maceth_3: dp4 {
			status = "ok";
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <4>;
			reg = <0x3a001600 0x200>;
			qcom,mactype = <0>;
			qcom,link-poll = <1>;
			devname = "eth3";
			mac-address = [000000000000];
			qcom,phy-mdio-addr = <3>;
			phy-mode = "sgmii";
		};

		avm_mac_addr_maceth_4: dp6 {
			status = "ok";
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <6>;
			reg = <0x3a514000 0x4000>;
			qcom,mactype = <1>;
			qcom,link-poll = <1>;
			devname = "wan";
			mac-address = [000000000000];
			qcom,phy-mdio-addr = <28>;
			phy-mode = "sgmii";
		};

		mdio:mdio@90000 {
			#address-cells = <1>;
			#size-cells = <0>;
			status = "ok";
			pinctrl-0 = <&mdio_pins>;
			pinctrl-names = "default";
			phy-reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW
					&tlmm 15 GPIO_ACTIVE_LOW>;
			phy0: ethernet-phy@0 {
				reg = <0>;
			};
			phy1: ethernet-phy@1 {
				reg = <1>;
			};
			phy2: ethernet-phy@2 {
				reg = <2>;
			};
			phy3: ethernet-phy@3 {
				reg = <3>;
			};
			phy5: ethernet-phy@5 {
				reg = <28>;
			};
		};

		ess_switch: ess-instance {
			status = "ok";
			num_devices = <0x1>;
			ess-switch@3a000000 {
				switch_cpu_bmp = <0x1>;
				switch_lan_bmp = <0x5e>;
				switch_wan_bmp = <0x00>;
				switch_mac_mode = <0x00>;
				switch_mac_mode1 = <0xff>;
				switch_mac_mode2 = <0x0d>;
				bm_tick_mode = <0>;
				tm_tick_mode = <0>;

				qcom,port_phyinfo {
					port@0 {
						port_id = <1>;
						phy_address = <0>;
					};
					port@1 {
						port_id = <2>;
						phy_address = <1>;
					};
					port@2 {
						port_id = <3>;
						phy_address = <2>;
					};
					port@3 {
						port_id = <4>;
						phy_address = <3>;
					};
					port@5 {
						port_id = <6>;
						phy_address = <28>;
						port_mac_sel = "QGMAC_PORT";
					};
				};
			};
		};

		nss-macsec1 {
			compatible = "qcom,nss-macsec";
			phy_addr = <0x1c>;
			mdiobus = <&mdio>;
		};

		pcie0_x1: pci@28000000 {
			perst-gpio = <&tlmm 23 1>;
			status = "ok";
			pcie0_rp {
				#address-cells = <5>;
				#size-cells = <0>;
				reg = <0 0 0 0 0>;

				qcom,mhi@0 {
					reg = <0 0 0 0 0>;
				};
			};
		};

		pcie0_phy: phy@84000 {
			status = "ok";
		};

		pcie1_x1: pci@10000000 {
			perst-gpio = <&tlmm 45 1>;
			status = "ok";
			pcie1_rp {
				#address-cells = <5>;
				#size-cells = <0>;
				reg = <0 0 0 0 0>;

				qcom,mhi@1 {
					reg = <0 0 0 0 0>;
				};
			};
		};

		pcie1_phy: phy@fc000 {
			status = "ok";
		};

		pcie2_x2: pci@20000000 {
			perst-gpio = <&tlmm 29 1>;
			status = "ok";
			pcie2_rp {
				#address-cells = <5>;
				#size-cells = <0>;
				reg = <0 0 0 0 0>;

				qcom,mhi@2 {
					reg = <0 0 0 0 0>;
				};
			};
		};

		pcie2_phy: phy@8c000 {
			status = "ok";
		};
	};
};

&wifi0 {
	qcom,board_id = <0x10>;
	status = "ok";
};