// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /dts-v1/; #include "ipq9574-avm-common.dtsi" #include "ipq9574-wkk-default-memory.dtsi" / { #address-cells = <0x2>; #size-cells = <0x2>; model = "AVM Alder Evalboard 02"; soc { pinctrl@1000000 { /* HW-specific pin configuration */ spi_0_pins: spi-0-pins { pins = "gpio11", "gpio12", "gpio13", "gpio14"; function = "blsp0_spi"; drive-strength = <8>; bias-disable; }; pcie3_wake_pins: pcie3_wake_gpio { pins = "gpio33"; function = "gpio"; drive-strength = <8>; bias-pull-up; }; usb_pw_en_pins: usb_pwr_en_pinmux { pins = "gpio19"; function = "gpio"; drive-strength = <8>; bias-disable; output-low; }; sfp_pins: sfp_pinmux { sfp_rx { pins = "gpio46"; function = "rx1"; bias-disable; }; sfp_tx { pins = "gpio45"; function = "gpio"; drive-strength = <8>; bias-pull-down; output-low; }; }; i2c_1_pins: i2c-1-pinmux { pins = "gpio36", "gpio37"; function = "blsp1_i2c"; drive-strength = <8>; bias-disable; }; }; i2c_1: i2c@78b6000 { pinctrl-0 = <&i2c_1_pins>; pinctrl-names = "default"; status = "ok"; }; avm_mac_addr_maceth_4: dp6 { status = "ok"; devname = "wan"; mac-address = [000000000000]; qcom,phy-mdio-addr = <8>; }; dp5 { status = "ok"; devname = "wanmodem"; mac-address = [1CED6F8C44B7]; /* Assigned via JZ-107264 */ /delete-property/qcom,link-poll; /delete-property/qcom,phy-mdio-addr; }; avm_mac_addr_maceth_3: dp4 { status = "ok"; devname = "eth3"; mac-address = [000000000000]; qcom,phy-mdio-addr = <4>; }; avm_mac_addr_maceth_2: dp3 { status = "ok"; devname = "eth2"; mac-address = [000000000000]; qcom,phy-mdio-addr = <3>; }; avm_mac_addr_maceth_1: dp2 { status = "ok"; devname = "eth1"; mac-address = [000000000000]; qcom,phy-mdio-addr = <2>; }; avm_mac_addr_maceth_0: dp1 { status = "ok"; devname = "eth0"; mac-address = [000000000000]; qcom,phy-mdio-addr = <1>; }; pcie0_x1: pci@28000000 { perst-gpio = <&tlmm 23 1>; status = "ok"; }; pcie0_phy: phy@84000 { status = "ok"; }; pcie1_x1: pci@10000000 { perst-gpio = <&tlmm 26 1>; status = "ok"; }; pcie1_phy: phy@fc000 { status = "ok"; }; pcie2_phy: phy@8c000 { status = "ok"; }; pcie2_x2: pci@20000000 { perst-gpio = <&tlmm 29 1>; status = "ok"; }; pcie3_x2: pci@18000000 { perst-gpio = <&tlmm 32 1>; interrupts-extended = <&tlmm 33 0>; interrupt-names = "wake_gpio"; pinctrl-0 = <&pcie3_wake_pins>; pinctrl-names = "default"; interrupt-map = <0 0 0 1 &intc 0 0 189 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ <0 0 0 2 &intc 0 0 190 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ <0 0 0 3 &intc 0 0 191 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ <0 0 0 4 &intc 0 0 192 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ num-lanes = <1>; force_to_single_lane; status = "ok"; pcie3_rp { #address-cells = <5>; #size-cells = <0>; reg = <0 0 0 0 0>; qcom,mhi@3 { reg = <0 0 0 0 0>; }; }; }; pcie3_phy: phy@f4000 { status = "ok"; }; mdio@90000 { #address-cells = <0x1>; #size-cells = <0x0>; status = "ok"; pinctrl-0 = <&mdio_pins>; pinctrl-names = "default"; /* Do not touch AQR Reset (GPIO 57), as its FW is lost otherwise */ phy-reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>; phyaddr_fixup = <0xC90F018>; uniphyaddr_fixup = <0xC90F014>; mdio_clk_fixup; /* MDIO clock sequence fix up flag */ phy0: ethernet-phy@0 { reg = <1>; fixup; }; phy1: ethernet-phy@1 { reg = <2>; fixup; }; phy2: ethernet-phy@2 { reg = <3>; fixup; }; phy3: ethernet-phy@3 { reg = <4>; fixup; }; phy4: ethernet-phy@4 { reg = <30>; /delete-property/ compatible; }; phy5: ethernet-phy@5 { compatible ="ethernet-phy-ieee802.3-c45"; reg = <8>; }; }; ess-instance { num_devices = <0x1>; ess-switch@3a000000 { pinctrl-0 = <&sfp_pins>; pinctrl-names = "default"; switch_cpu_bmp = <0x1>; /* cpu port bitmap */ switch_lan_bmp = <0x5e>; /* lan port bitmap */ switch_wan_bmp = <0x20>; /* wan port bitmap */ switch_mac_mode = <0x15>; /* mac mode for uniphy instance0*/ switch_mac_mode1 = <0xe>; /* mac mode for uniphy instance1*/ switch_mac_mode2 = <0xd>; /* mac mode for uniphy instance2*/ bm_tick_mode = <0>; /* bm tick mode */ tm_tick_mode = <0>; /* tm tick mode */ qcom,port_phyinfo { port@0 { port_id = <1>; phy_address = <1>; }; port@1 { port_id = <2>; phy_address = <2>; }; port@2 { port_id = <3>; phy_address = <3>; }; port@3 { port_id = <4>; phy_address = <4>; }; port@4 { port_id = <5>; phy_address = <30>; phy_i2c_address = <30>; phy-i2c-mode; /*i2c access phy */ media-type = "sfp"; /* fiber mode */ sfp_rx_los_pin = <&tlmm 0xffff GPIO_ACTIVE_HIGH>; }; port@5 { port_id = <6>; phy_address = <8>; ethernet-phy-ieee802.3-c45; }; }; }; }; }; avm-usb-en-gpio { compatible = "avm,gpio-aggregator"; pinctrl-0 = <&usb_pw_en_pins>; pinctrl-names = "default"; gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>; gpio-line-names = "usb-pwr-en"; }; wwan { pinctrl-names = "default"; compatible = "avm,wwan", "avm,gpio-aggregator"; gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>, <&tlmm 50 GPIO_ACTIVE_HIGH>, <&tlmm 52 GPIO_ACTIVE_HIGH>, <&tlmm 21 GPIO_ACTIVE_HIGH>; gpio-line-names = "wwan_reset", "wwan_disable", "wwan_power", "wwan_vctrl"; }; }; &mdio_pins { /delete-node/ mux_0; /delete-node/ mux_1; mux_0 { pins = "gpio38"; function = "mdc"; drive-strength = <2>; bias-disable; }; mux_1 { pins = "gpio39"; function = "mdio"; drive-strength = <2>; bias-pull-up; }; }; &spi_0 { status = "ok"; pinctrl-0 = <&spi_0_pins>; pinctrl-names = "default"; cs-select = <0>; m25p80@0 { compatible = "n25q128a11"; #address-cells = <1>; #size-cells = <1>; reg = <0>; spi-max-frequency = <50000000>; }; }; &edma { /delete-property/ qcom,ppeds-num; /delete-property/ interrupts; qcom,ppeds-num = <3>; /* Number of PPEDS nodes */ /* PPE-DS node format: */ qcom,ppeds-map = <1 1 1 1 32 8>, /* PPEDS Node#0 ring and queue map */ <2 2 2 2 40 8>, /* PPEDS Node#1 ring and queue map */ <3 3 3 3 48 8>; /* PPEDS Node#2 ring and queue map */ interrupts = <0 367 4>, /* Tx complete ring id #4 IRQ info */ <0 368 4>, /* Tx complete ring id #5 IRQ info */ <0 369 4>, /* Tx complete ring id #6 IRQ info */ <0 370 4>, /* Tx complete ring id #7 IRQ info */ <0 371 4>, /* Tx complete ring id #8 IRQ info */ <0 372 4>, /* Tx complete ring id #9 IRQ info */ <0 373 4>, /* Tx complete ring id #10 IRQ info */ <0 374 4>, /* Tx complete ring id #11 IRQ info */ <0 375 4>, /* Tx complete ring id #12 IRQ info */ <0 376 4>, /* Tx complete ring id #13 IRQ info */ <0 377 4>, /* Tx complete ring id #14 IRQ info */ <0 378 4>, /* Tx complete ring id #15 IRQ info */ <0 379 4>, /* Tx complete ring id #16 IRQ info */ <0 380 4>, /* Tx complete ring id #17 IRQ info */ <0 381 4>, /* Tx complete ring id #18 IRQ info */ <0 382 4>, /* Tx complete ring id #19 IRQ info */ <0 383 4>, /* Tx complete ring id #20 IRQ info */ <0 384 4>, /* Tx complete ring id #21 IRQ info */ <0 509 4>, /* Tx complete ring id #22 IRQ info */ <0 508 4>, /* Tx complete ring id #23 IRQ info */ <0 507 4>, /* Tx complete ring id #24 IRQ info */ <0 506 4>, /* Tx complete ring id #25 IRQ info */ <0 505 4>, /* Tx complete ring id #26 IRQ info */ <0 504 4>, /* Tx complete ring id #27 IRQ info */ <0 503 4>, /* Tx complete ring id #28 IRQ info */ <0 502 4>, /* Tx complete ring id #29 IRQ info */ <0 501 4>, /* Tx complete ring id #30 IRQ info */ <0 500 4>, /* Tx complete ring id #31 IRQ info */ <0 351 4>, /* Rx desc ring id #20 IRQ info */ <0 352 4>, /* Rx desc ring id #21 IRQ info */ <0 353 4>, /* Rx desc ring id #22 IRQ info */ <0 354 4>, /* Rx desc ring id #23 IRQ info */ <0 261 4>, /* Misc error IRQ info */ <0 364 4>, /* PPEDS Node #0(TxComp ring id #1) TxComplete IRQ info */ <0 332 4>, /* PPEDS Node #0(Rx Desc ring id #1) Rx Desc IRQ info */ <0 356 4>, /* PPEDS Node #0(RxFill Desc ring id #1) Rx Fill IRQ info */ <0 365 4>, /* PPEDS Node #1(TxComp ring id #2) TxComplete IRQ info */ <0 333 4>, /* PPEDS Node #1(Rx Desc ring id #2) Rx Desc IRQ info */ <0 357 4>, /* PPEDS Node #1(RxFill Desc ring id #2) Rx Fill IRQ info */ <0 366 4>, /* PPEDS Node #2(TxComp ring id #3) TxComplete IRQ info */ <0 334 4>, /* PPEDS Node #2(Rx Desc ring id #3) Rx Desc IRQ info */ <0 358 4>; /* PPEDS Node #2(RxFill Desc ring id #3) Rx Fill IRQ info */ }; &wifi0 { qcom,board_id = <0x10>; status = "ok"; }; /* Remove unused avm special mac address definitions */ /delete-node/ &avm_mac_addr_macrouter_3;