/dts-v1/; /* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. * * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include "ipq5018.dtsi" / { #address-cells = <0x2>; #size-cells = <0x2>; model = "Qualcomm Technologies, Inc. IPQ5018/AP-MP02.1"; compatible = "qcom,ipq5018-ap-mp02.1", "qcom,ipq5018-mp02.1", "qcom,ipq5018"; interrupt-parent = <&intc>; MP_256; /delete-property/ MP_512; aliases { sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ serial0 = &blsp1_uart1; serial1 = &blsp1_uart2; ethernet0 = "/soc/dp1"; ethernet1 = "/soc/dp2"; }; chosen { bootargs = "console=ttyMSM0,115200,n8 rw init=/init"; bootargs-append = " swiotlb=1 coherent_pool=2M"; stdout-path = "serial0"; }; /* 256 MB Profile * +=========+==============+========================+ * | | | | * | Region | Start Offset | Size | * | | | | * +--------+--------------+-------------------------+ * | | | | * | | | | * | NSS | 0x40000000 | 8MB | * | | | | * | | | | * +--------+--------------+-------------------------+ * | | | | * | | | | * | | | | * | | | | * | Linux | 0x40800000 | Depends on total memory | * | | | | * | | | | * | | | | * + | | | * +--------+--------------+-------------------------+ * | | | | * | uboot | 0x4A600000 | 4MB | * | | | | * +--------+--------------+-------------------------+ * | SBL | 0x4AA00000 | 1MB | * +--------+--------------+-------------------------+ * | smem | 0x4AB00000 | 1MB | * +--------+--------------+-------------------------+ * | | | | * | TZ | 0x4AC00000 | 4MB | * | | | | * +--------+--------------+-------------------------+ * | | | | * | | | | * | | | | * | Q6 | 0x4B000000 | 20MB | * | code/ | | | * | data | | | * +--------+--------------+-------------------------+ * | | | | * |IPQ5018 | 0x4C400000 | 13MB | * | data | | | * +--------+--------------+-------------------------+ * | M3 Dump| 0x4D100000 | 1MB | * +--------+--------------+-------------------------+ * | QDSS | 0x4D200000 | 1MB | * +--------+--------------+-------------------------+ * |QCN6122 | 0x4D300000 | 13MB | * | data | | | * +--------+--------------+-------------------------+ * | M3 Dump| 0x4E000000 | 1MB | * +--------+--------------+-------------------------+ * | QDSS | 0x4E100000 | 1MB | * +--------+--------------+-------------------------+ * |QCN6122 | 0x4E200000 | 13MB | * | data | | | * +--------+--------------+-------------------------+ * | M3 Dump| 0x4EF00000 | 1MB | * +--------+--------------+-------------------------+ * | QDSS | 0x4F000000 | 1MB | * +--------+--------------+-------------------------+ * | | * | Rest of the memory for Linux | * | | * +=================================================+ */ reserved-memory { /delete-node/ nss@40000000; nss@40000000 { no-map; reg = <0x0 0x40000000 0x0 0x0800000>; }; q6_mem_regions: q6_mem_regions@4B000000 { no-map; reg = <0x0 0x4B000000 0x0 0x4100000>; }; q6_code_data: q6_code_data@4B000000 { no-map; reg = <0x0 0x4B000000 0x0 01400000>; }; q6_ipq5018_data: q6_ipq5018_data@4C400000 { no-map; reg = <0x0 0x4C400000 0x0 0xD00000>; }; m3_dump: m3_dump@4D100000 { no-map; reg = <0x0 0x4D100000 0x0 0x100000>; }; q6_etr_region: q6_etr_dump@4D200000 { no-map; reg = <0x0 0x4D200000 0x0 0x100000>; }; q6_qcn6122_data1: q6_qcn6122_data1@4D300000 { no-map; reg = <0x0 0x4D300000 0x0 0xD00000>; }; m3_dump_qcn6122_1: m3_dump_qcn6122_1@4E000000 { no-map; reg = <0x0 0x4E000000 0x0 0x100000>; }; q6_qcn6122_etr_1: q6_qcn6122_etr_1@4E100000 { no-map; reg = <0x0 0x4E100000 0x0 0x100000>; }; q6_qcn6122_data2: q6_qcn6122_data2@4E200000 { no-map; reg = <0x0 0x4E200000 0x0 0xD00000>; }; m3_dump_qcn6122_2: m3_dump_qcn6122_2@4EF00000 { no-map; reg = <0x0 0x4EF00000 0x0 0x100000>; }; q6_qcn6122_etr_2: q6_qcn6122_etr_2@4F000000 { no-map; reg = <0x0 0x4F000000 0x0 0x100000>; }; }; soc { serial@78af000 { status = "ok"; }; blsp1_uart2: serial@78b0000 { pinctrl-0 = <&blsp1_uart_pins>; pinctrl-names = "default"; }; qpic_bam: dma@7984000{ status = "disabled"; }; nand: qpic-nand@79b0000 { pinctrl-0 = <&qspi_nand_pins>; pinctrl-names = "default"; status = "disabled"; }; spi_0: spi@78b5000 { /* BLSP1 QUP0 */ pinctrl-0 = <&blsp0_spi_pins>; pinctrl-names = "default"; cs-select = <0>; status = "ok"; m25p80@0 { #address-cells = <1>; #size-cells = <1>; reg = <0>; compatible = "n25q128a11"; linux,modalias = "m25p80", "n25q128a11"; spi-max-frequency = <50000000>; use-default-sizes; }; }; mdio0: mdio@88000 { status = "ok"; ethernet-phy@0 { reg = <7>; }; }; mdio1: mdio@90000 { status = "ok"; pinctrl-0 = <&mdio1_pins &phy_pins>; pinctrl-names = "default"; phy-reset-gpio = <&tlmm 26 0>; ethernet-phy@0 { reg = <4>; }; }; ess-instance { num_devices = <0x1>; ess-switch@0x39c00000 { switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/ cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/ qcom,port_phyinfo { port@0 { port_id = <1>; phy_address = <7>; mdiobus = <&mdio0>; }; port@1 { port_id = <2>; phy_address = <0x4>; mdiobus = <&mdio1>; }; }; led_source@0 { source = <0>; mode = "normal"; speed = "all"; blink_en = "enable"; active = "low"; }; }; }; wifi0: wifi@c000000 { qcom,tgt-mem-mode = <2>; status = "ok"; }; wifi2: wifi2@c000000 { compatible = "qcom,cnss-qcn6122"; qcom,rproc = <&q6v5_wcss>; status = "disabled"; }; dp1 { device_type = "network"; compatible = "qcom,nss-dp"; clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>; clock-names = "nss-snoc-gmac-axi-clk"; qcom,id = <1>; reg = <0x39C00000 0x10000>; interrupts = ; qcom,mactype = <2>; qcom,link-poll = <1>; qcom,phy-mdio-addr = <7>; mdio-bus = <&mdio0>; local-mac-address = [000000000000]; phy-mode = "sgmii"; qcom,rx-page-mode = <0>; }; dp2 { device_type = "network"; compatible = "qcom,nss-dp"; clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>; clock-names = "nss-snoc-gmac-axi-clk"; qcom,id = <2>; reg = <0x39D00000 0x10000>; interrupts = ; qcom,mactype = <2>; qcom,link-poll = <1>; qcom,phy-mdio-addr = <4>; mdio-bus = <&mdio1>; local-mac-address = [000000000000]; phy-mode = "sgmii"; qcom,rx-page-mode = <0>; }; }; qcom,test@0 { status = "ok"; }; thermal-zones { status = "ok"; }; }; &sdhc_1 { status = "disabled"; }; &tlmm { pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>; pinctrl-names = "default"; blsp0_uart_pins: blsp0_uart_pins { blsp0_uart_rx { pins = "gpio28"; function = "blsp0_uart1"; drive-strength = <8>; input-enable; bias-disable; bias-pull-up; }; blsp0_uart_tx { pins = "gpio29"; function = "blsp0_uart1"; drive-strength = <8>; bias-disable; output-high; bias-pull-up; }; }; blsp1_uart_pins: blsp1_uart_pins { blsp1_uart_rx { pins = "gpio23"; function = "blsp1_uart2"; drive-strength = <8>; input-enable; bias-disable; bias-pull-up; }; blsp1_uart_tx { pins = "gpio25"; function = "blsp1_uart2"; drive-strength = <8>; bias-disable; output-high; bias-pull-up; }; blsp1_uart_rfr { pins = "gpio24"; function = "blsp1_uart2"; drive-strength = <8>; bias-disable; output-high; bias-pull-up; }; blsp1_uart_cts { pins = "gpio26"; function = "blsp1_uart2"; drive-strength = <8>; bias-disable; input-enable; bias-pull-up; }; }; blsp0_spi_pins: blsp0_spi_pins { mux { pins = "gpio10", "gpio11", "gpio12", "gpio13"; function = "blsp0_spi"; drive-strength = <2>; bias-disable; }; }; qspi_nand_pins: qspi_nand_pins { qspi_clock { pins = "gpio9"; function = "qspi_clk"; drive-strength = <8>; bias-disable; }; qspi_cs { pins = "gpio8"; function = "qspi_cs"; drive-strength = <8>; bias-disable; }; qspi_data { pins = "gpio4", "gpio5", "gpio6", "gpio7"; function = "qspi_data"; drive-strength = <8>; bias-disable; }; }; phy_pins: phy_pins { phy_intr { pins = "gpio25"; function = "gpio"; drive-strength = <8>; bias-disable; }; phy_reset { pins = "gpio26"; function = "gpio"; drive-strength = <8>; bias-pull-down; output-low; }; }; mdio1_pins: mdio_pinmux { mux_0 { pins = "gpio36"; function = "mdc"; drive-strength = <8>; bias-pull-up; }; mux_1 { pins = "gpio37"; function = "mdio"; drive-strength = <8>; bias-pull-up; }; }; phy_led_pins: phy_led_pins { gephy_led_pin { pins = "gpio30"; function = "led0"; drive-strength = <8>; bias-pull-down; }; }; i2c_pins: i2c_pins { i2c_scl { pins = "gpio33"; function = "blsp2_i2c0"; drive-strength = <8>; bias-disable; }; i2c_sda { pins = "gpio34"; function = "blsp2_i2c0"; drive-strength = <8>; bias-disable; }; }; btss_pins: btss_pins { phandle = <0x1>; mux_0 { pins = "gpio4"; function = "btss0"; bias-pull-down; }; mux_1 { pins = "gpio5"; function = "btss1"; bias-pull-down; }; mux_2 { pins = "gpio6"; function = "btss2"; bias-pull-down; }; mux_3 { pins = "gpio7"; function = "btss3"; bias-pull-down; }; }; button_pins: button_pins { wps_button { pins = "gpio34"; function = "gpio"; drive-strength = <8>; bias-pull-up; }; }; }; &soc { gpio_keys { compatible = "gpio-keys"; /* pinctrl-0 = <&button_pins>; pinctrl-names = "default"; */ button@1 { /* label = "wps"; linux,code = ; */ gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; linux,input-type = <1>; debounce-interval = <60>; }; }; }; &usb3 { status = "ok"; }; &eud { status = "ok"; }; &pcie_x1 { perst-gpio = <&tlmm 27 GPIO_ACTIVE_LOW>; }; &pcie_x2 { perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>; }; &dwc_0 { /delete-property/ #phy-cells; /delete-property/ phys; /delete-property/ phy-names; }; &hs_m31phy_0 { status = "ok"; }; &pcie_x1_rp { status = "disabled"; mhi_0: qcom,mhi@0 { reg = <0 0 0 0 0 >; }; }; &pcie_x2_rp { status = "disabled"; mhi_1: qcom,mhi@1 { reg = <0 0 0 0 0 >; }; }; &q6v5_wcss { compatible = "qcom,ipq5018-q6-mpd"; #address-cells = <1>; #size-cells = <1>; ranges; firmware = "IPQ5018/q6_fw.mdt"; reg = <0x0cd00000 0x4040>, <0x1938000 0x8>, <0x193d204 0x4>; reg-names = "qdsp6", "tcsr-msip", "tcsr-q6"; resets = <&gcc GCC_WCSSAON_RESET>, <&gcc GCC_WCSS_Q6_BCR>; reset-names = "wcss_aon_reset", "wcss_q6_reset"; clocks = <&gcc GCC_Q6_AXIS_CLK>, <&gcc GCC_WCSS_ECAHB_CLK>, <&gcc GCC_Q6_AXIM_CLK>, <&gcc GCC_Q6_AXIM2_CLK>, <&gcc GCC_Q6_AHB_CLK>, <&gcc GCC_Q6_AHB_S_CLK>, <&gcc GCC_WCSS_AXI_S_CLK>; clock-names = "gcc_q6_axis_clk", "gcc_wcss_ecahb_clk", "gcc_q6_axim_clk", "gcc_q6_axim2_clk", "gcc_q6_ahb_clk", "gcc_q6_ahb_s_clk", "gcc_wcss_axi_s_clk"; memory-region = <&q6_mem_regions>, <&q6_etr_region>; qcom,rproc = <&q6v5_wcss>; qcom,bootargs_smem = <507>; boot-args = <0x1 0x4 0x3 0x0F 0x0 0x0>, <0x2 0x4 0x2 0x1B 0x0 0x0>; status = "ok"; q6_wcss_pd1: remoteproc_pd1@4ab000 { compatible = "qcom,ipq5018-wcss-ahb-mpd"; reg = <0x4ab000 0x20>; reg-names = "rmb"; firmware = "IPQ5018/q6_fw.mdt"; m3_firmware = "IPQ5018/m3_fw.mdt"; interrupts-extended = <&wcss_smp2p_in 8 0>, <&wcss_smp2p_in 9 0>, <&wcss_smp2p_in 12 0>, <&wcss_smp2p_in 11 0>; interrupt-names = "fatal", "ready", "spawn-ack", "stop-ack"; resets = <&gcc GCC_WCSSAON_RESET>, <&gcc GCC_WCSS_BCR>, <&gcc GCC_CE_BCR>; reset-names = "wcss_aon_reset", "wcss_reset", "ce_reset"; clocks = <&gcc GCC_WCSS_AHB_S_CLK>, <&gcc GCC_WCSS_ACMT_CLK>, <&gcc GCC_WCSS_AXI_M_CLK>; clock-names = "gcc_wcss_ahb_s_clk", "gcc_wcss_acmt_clk", "gcc_wcss_axi_m_clk"; qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>; qcom,smem-states = <&wcss_smp2p_out 8>, <&wcss_smp2p_out 9>, <&wcss_smp2p_out 10>; qcom,smem-state-names = "shutdown", "stop", "spawn"; memory-region = <&q6_ipq5018_data>, <&m3_dump>, <&q6_etr_region>; }; q6_wcss_pd2: remoteproc_pd2 { compatible = "qcom,ipq5018-wcss-pcie-mpd"; firmware = "IPQ5018/q6_fw.mdt"; m3_firmware = "qcn6122/m3_fw.mdt"; interrupts-extended = <&wcss_smp2p_in 16 0>, <&wcss_smp2p_in 17 0>, <&wcss_smp2p_in 20 0>, <&wcss_smp2p_in 19 0>; interrupt-names = "fatal", "ready", "spawn-ack", "stop-ack"; qcom,smem-states = <&wcss_smp2p_out 16>, <&wcss_smp2p_out 17>, <&wcss_smp2p_out 18>; qcom,smem-state-names = "shutdown", "stop", "spawn"; memory-region = <&q6_qcn6122_data1>, <&m3_dump_qcn6122_1>, <&q6_qcn6122_etr_1>; }; q6_wcss_pd3: remoteproc_pd3 { compatible = "qcom,ipq5018-wcss-pcie-mpd"; firmware = "IPQ5018/q6_fw.mdt"; interrupts-extended = <&wcss_smp2p_in 24 0>, <&wcss_smp2p_in 25 0>, <&wcss_smp2p_in 28 0>, <&wcss_smp2p_in 27 0>; interrupt-names = "fatal", "ready", "spawn-ack", "stop-ack"; qcom,smem-states = <&wcss_smp2p_out 24>, <&wcss_smp2p_out 25>, <&wcss_smp2p_out 26>; qcom,smem-state-names = "shutdown", "stop", "spawn"; memory-region = <&q6_qcn6122_data2>, <&m3_dump_qcn6122_2>, <&q6_qcn6122_etr_2>; }; }; &i2c_0 { pinctrl-0 = <&i2c_pins>; pinctrl-names = "default"; }; &wifi0 { /* IPQ5018 */ qcom,multipd_arch; qcom,board_id = <0x10>; qcom,bdf-addr = <0 0 0x4C400000 0 0 0>; qcom,caldb-addr = <0 0 0 0 0 0>; qcom,caldb-size = <0x0>; qcom,userpd-subsys-name = "q6v5_wcss_userpd1"; qcom,rproc = <&q6_wcss_pd1>; mem-region = <&q6_ipq5018_data>; status = "ok"; }; &wifi1 { /* QCN6122 6G */ qcom,multipd_arch; qcom,board_id = <0x90>; qcom,tgt-mem-mode = <2>; compatible = "qcom,cnss-qcn6122"; qcom,bdf-addr = <0 0 0x4D300000 0 0 0>; qcom,caldb-addr = <0 0 0 0 0 0>; qcom,caldb-size = <0x0>; qcom,userpd-subsys-name = "q6v5_wcss_userpd2"; qcom,rproc = <&q6_wcss_pd2>; mem-region = <&q6_qcn6122_data1>; status = "ok"; }; &wifi2 { /* QCN6122 5G */ qcom,multipd_arch; qcom,board_id = <0x50>; qcom,tgt-mem-mode = <2>; compatible = "qcom,cnss-qcn6122"; qcom,bdf-addr = <0 0 0x4E200000 0 0 0>; qcom,caldb-addr = <0 0 0 0 0 0>; qcom,caldb-size = <0x0>; qcom,userpd-subsys-name = "q6v5_wcss_userpd3"; qcom,rproc = <&q6_wcss_pd3>; mem-region = <&q6_qcn6122_data2>; status = "ok"; };