/dts-v1/; /* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. * * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include "ipq5018.dtsi" / { #address-cells = <0x2>; #size-cells = <0x2>; model = "Qualcomm Technologies, Inc. IPQ5018/AP-MP03.6-C1"; compatible = "qcom,ipq5018-ap-mp03.6-c1", "qcom,ipq5018-mp03.6-c1", "qcom,ipq5018"; interrupt-parent = <&intc>; aliases { sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ serial0 = &blsp1_uart1; serial1 = &blsp1_uart2; }; chosen { bootargs = "console=ttyMSM0,115200,n8 rw init=/init"; bootargs-append = " swiotlb=1 coherent_pool=2M"; stdout-path = "serial0"; ethernet0 = "/soc/dp1"; ethernet1 = "/soc/dp2"; }; reserved-memory { #ifdef __IPQ_MEM_PROFILE_256_MB__ /* 256 MB Profile * +=========+==============+========================+ * | | | | * | Region | Start Offset | Size | * | | | | * +--------+--------------+-------------------------+ * | | | | * | | | | * | NSS | 0x40000000 | 8MB | * | | | | * | | | | * +--------+--------------+-------------------------+ * | | | | * | | | | * | | | | * | | | | * | Linux | 0x40800000 | Depends on total memory | * | | | | * | | | | * | | | | * + | | | * +--------+--------------+-------------------------+ * | | | | * | uboot | 0x4A600000 | 4MB | * | | | | * +--------+--------------+-------------------------+ * | SBL | 0x4AA00000 | 1MB | * +--------+--------------+-------------------------+ * | smem | 0x4AB00000 | 1MB | * +--------+--------------+-------------------------+ * | | | | * | TZ | 0x4AC00000 | 4MB | * | | | | * +--------+--------------+-------------------------+ * | | | | * | | | | * | | | | * | Q6 | 0x4B000000 | 23MB | * | | | | * | | | | * | | | | * +--------+--------------+-------------------------+ * | M3 Dump| 0x4C700000 | 1MB | * +--------+--------------+-------------------------+ * | QDSS | 0x4C800000 | 1MB | * +--------+--------------+-------------------------+ * | | | | * |QCN9000 | 0x4C900000 | 17MB | * | | | | * +--------+--------------+-------------------------+ * | | | | * | MHI1 | 0x4DA00000 | 5MB | * | | | | * +--------+--------------+-------------------------+ * | | * | Rest of the memory for Linux | * | | * +=================================================+ */ q6_region: memory@4b000000 { no-map; reg = <0x0 0x4b000000 0x0 0x01700000>; }; m3_dump@4c700000 { no-map; reg = <0x0 0x4C700000 0x0 0x100000>; }; q6_etr_region:q6_etr_dump@4c800000 { no-map; reg = <0x0 0x4c800000 0x0 0x100000>; }; qcn9000_pcie0: qcn9000_pcie0@4c900000 { no-map; reg = <0x0 0x4C900000 0x0 0x01100000>; }; #if defined(__CNSS2__) mhi_region1: dma_pool1@4da00000 { compatible = "shared-dma-pool"; no-map; reg = <0x0 0x4DA00000 0x0 0x00500000>; }; #endif #elif __IPQ_MEM_PROFILE_512_MB__ /* 512 MB Profile * +=========+==============+========================+ * | | | | * | Region | Start Offset | Size | * | | | | * +--------+--------------+-------------------------+ * | | | | * | | | | * | NSS | 0x40000000 | 16MB | * | | | | * | | | | * +--------+--------------+-------------------------+ * | | | | * | | | | * | | | | * | | | | * | Linux | 0x41000000 | Depends on total memory | * | | | | * | | | | * | | | | * | | | | * +--------+--------------+-------------------------+ * | | | | * | uboot | 0x4A600000 | 4MB | * | | | | * +--------+--------------+-------------------------+ * | SBL | 0x4AA00000 | 1MB | * +--------+--------------+-------------------------+ * | smem | 0x4AB00000 | 1MB | * +--------+--------------+-------------------------+ * | | | | * | TZ | 0x4AC00000 | 4MB | * | | | | * +--------+--------------+-------------------------+ * | | | | * | | | | * | | | | * | Q6 | 0x4B000000 | 23MB | * | | | | * | | | | * +--------+--------------+-------------------------+ * | M3 Dump| 0x4C700000 | 1MB | * +--------+--------------+-------------------------+ * | QDSS | 0x4C800000 | 1MB | * +--------+--------------+-------------------------+ * | caldb | 0x4C900000 | 2MB | * +--------+--------------+-------------------------+ * | | | | * |QCN9000 | 0x4CB00000 | 26MB | * | | | | * +--------+--------------+-------------------------+ * | | | | * | MHI1 | 0x4E500000 | 5MB | * | | | | * +--------+--------------+-------------------------+ * | | * | Rest of the memory for Linux | * | | * +=================================================+ */ q6_region: memory@4b000000 { no-map; reg = <0x0 0x4b000000 0x0 0x01700000>; }; m3_dump@4c700000 { no-map; reg = <0x0 0x4c700000 0x0 0x100000>; }; q6_etr_region:q6_etr_dump@4c800000 { no-map; reg = <0x0 0x4c800000 0x0 0x100000>; }; q6_caldb_region:q6_caldb_region@4c900000 { no-map; reg = <0x0 0x4c900000 0x0 0x200000>; }; qcn9000_pcie0: qcn9000_pcie0@4cb00000 { no-map; reg = <0x0 0x4CB00000 0x0 0x01A00000>; }; #if defined(__CNSS2__) mhi_region1: dma_pool1@4E500000 { compatible = "shared-dma-pool"; no-map; reg = <0x0 0x4E500000 0x0 0x00500000>; }; #endif #else /* 1G Profile * +=========+==============+========================+ * | | | | * | Region | Start Offset | Size | * | | | | * +--------+--------------+-------------------------+ * | | | | * | | | | * | NSS | 0x40000000 | 16MB | * | | | | * | | | | * +--------+--------------+-------------------------+ * | | | | * | | | | * | | | | * | | | | * | Linux | 0x41000000 | Depends on total memory | * | | | | * | | | | * | | | | * | | | | * +--------+--------------+-------------------------+ * | | | | * | uboot | 0x4A600000 | 4MB | * | | | | * +--------+--------------+-------------------------+ * | SBL | 0x4AA00000 | 1MB | * +--------+--------------+-------------------------+ * | smem | 0x4AB00000 | 1MB | * +--------+--------------+-------------------------+ * | | | | * | TZ | 0x4AC00000 | 4MB | * | | | | * +--------+--------------+-------------------------+ * | | | | * | | | | * | | | | * | Q6 | 0x4B000000 | 23MB | * | | | | * | | | | * +--------+--------------+-------------------------+ * | M3 Dump| 0x4C700000 | 1MB | * +--------+--------------+-------------------------+ * | QDSS | 0x4C800000 | 1MB | * +--------+--------------+-------------------------+ * | caldb | 0x4C900000 | 2MB | * +--------+--------------+-------------------------+ * | | | | * |QCN9000 | 0x4CB00000 | 53MB | * | | | | * +--------+--------------+-------------------------+ * | | | | * | MHI1 | 0x50000000 | 5MB | * | | | | * +--------+--------------+-------------------------+ * | | * | Rest of the memory for Linux | * | | * +=================================================+ */ q6_region: memory@4b000000 { no-map; reg = <0x0 0x4b000000 0x0 0x01700000>; }; m3_dump@4c700000 { no-map; reg = <0x0 0x4c700000 0x0 0x100000>; }; q6_etr_region:q6_etr_dump@4c800000 { no-map; reg = <0x0 0x4c800000 0x0 0x100000>; }; q6_caldb_region:q6_caldb_region@4c900000 { no-map; reg = <0x0 0x4c900000 0x0 0x200000>; }; qcn9000_pcie0: qcn9000_pcie0@4cb00000 { no-map; reg = <0x0 0x4CB00000 0x0 0x03500000>; }; #if defined(__CNSS2__) mhi_region1: dma_pool1@50000000 { compatible = "shared-dma-pool"; no-map; reg = <0x0 0x50000000 0x0 0x00500000>; }; #endif #endif }; soc { serial@78af000 { status = "ok"; }; qpic_bam: dma@7984000{ status = "ok"; }; nand: qpic-nand@79b0000 { pinctrl-0 = <&qspi_nand_pins>; pinctrl-names = "default"; status = "ok"; }; spi_0: spi@78b5000 { /* BLSP1 QUP0 */ pinctrl-0 = <&blsp0_spi_pins>; pinctrl-names = "default"; cs-select = <0>; status = "ok"; m25p80@0 { #address-cells = <1>; #size-cells = <1>; reg = <0>; compatible = "n25q128a11"; linux,modalias = "m25p80", "n25q128a11"; spi-max-frequency = <50000000>; use-default-sizes; }; }; mdio0: mdio@88000 { status = "ok"; ethernet-phy@0 { reg = <7>; }; }; mdio1: mdio@90000 { status = "ok"; pinctrl-0 = <&mdio1_pins>; pinctrl-names = "default"; phy-reset-gpio = <&tlmm 39 0>; ethernet-phy@0 { reg = <28>; }; }; ess-instance { num_devices = <0x1>; ess-switch@0x39c00000 { switch_mac_mode = <0xf>; /* mac mode for uniphy instance*/ cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/ qcom,port_phyinfo { port@0 { port_id = <1>; phy_address = <7>; mdiobus = <&mdio0>; }; port@1 { port_id = <2>; phy_address = <0x1c>; mdiobus = <&mdio1>; port_mac_sel = "QGMAC_PORT"; }; }; led_source@0 { source = <0>; mode = "normal"; speed = "all"; blink_en = "enable"; active = "high"; }; }; }; wifi0: wifi@c000000 { status = "ok"; }; dp1 { device_type = "network"; compatible = "qcom,nss-dp"; clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>; clock-names = "nss-snoc-gmac-axi-clk"; qcom,id = <1>; reg = <0x39C00000 0x10000>; interrupts = ; qcom,mactype = <2>; qcom,link-poll = <1>; qcom,phy-mdio-addr = <7>; mdio-bus = <&mdio0>; local-mac-address = [000000000000]; phy-mode = "sgmii"; qcom,rx-page-mode = <0>; }; dp2 { device_type = "network"; compatible = "qcom,nss-dp"; clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>; clock-names = "nss-snoc-gmac-axi-clk"; qcom,id = <2>; reg = <0x39D00000 0x10000>; interrupts = ; qcom,mactype = <2>; qcom,link-poll = <1>; qcom,phy-mdio-addr = <28>; mdio-bus = <&mdio1>; local-mac-address = [000000000000]; phy-mode = "sgmii"; qcom,rx-page-mode = <0>; }; nss-macsec1 { compatible = "qcom,nss-macsec"; phy_addr = <0x1c>; mdiobus = <&mdio1>; }; pcm: pcm@0xA3C0000{ pinctrl-0 = <&audio_pins>; pinctrl-names = "default"; }; }; qcom,test@0 { status = "ok"; }; thermal-zones { status = "ok"; }; }; &tlmm { pinctrl-0 = <&blsp0_uart_pins &pcie_sdx_gpio>; pinctrl-names = "default"; blsp0_uart_pins: uart_pins { blsp0_uart_rx_tx { pins = "gpio20", "gpio21"; function = "blsp0_uart0"; bias-disable; }; }; blsp0_spi_pins: blsp0_spi_pins { mux { pins = "gpio10", "gpio11", "gpio12", "gpio13"; function = "blsp0_spi"; drive-strength = <2>; bias-disable; }; }; qspi_nand_pins: qspi_nand_pins { qspi_clock { pins = "gpio9"; function = "qspi_clk"; drive-strength = <8>; bias-disable; }; qspi_cs { pins = "gpio8"; function = "qspi_cs"; drive-strength = <8>; bias-disable; }; qspi_data_0 { pins = "gpio7"; function = "qspi0"; drive-strength = <8>; bias-disable; }; qspi_data_1 { pins = "gpio6"; function = "qspi1"; drive-strength = <8>; bias-disable; }; qspi_data_2 { pins = "gpio5"; function = "qspi2"; drive-strength = <8>; bias-disable; }; qspi_data_3 { pins = "gpio4"; function = "qspi3"; drive-strength = <8>; bias-disable; }; }; mdio1_pins: mdio_pinmux { mux_0 { pins = "gpio36"; function = "mdc"; drive-strength = <8>; bias-pull-up; }; mux_1 { pins = "gpio37"; function = "mdio"; drive-strength = <8>; bias-pull-up; }; }; pcie_sdx_gpio: pcie_sdx_gpio { ap2mdm_err_ftl { pins = "gpio1"; function = "gpio"; drive-strength = <8>; bias-pull-down; }; sdx_pon_gpio { pins = "gpio26"; function = "gpio"; drive-strength = <8>; bias-pull-up; output-high; }; ap2mdm_gp_rst_n { pins = "gpio28"; function = "gpio"; drive-strength = <8>; output-high; }; }; ap2mdm_status: ap2mdm_status { pins = "gpio25"; function = "gpio"; drive-strength = <8>; bias-pull-up; output-high; }; mdm2ap_e911_status: mdm2ap_e911_status { pins = "gpio0"; drive-strength = <8>; bias-pull-down; }; pcie_wake_pins: pcie1_wake_gpio { pins = "gpio19"; function = "pcie1_wake"; drive-strength = <8>; bias-pull-up; }; audio_pins: audio_pinmux { mux_1 { pins = "gpio24"; function = "audio_rxbclk"; drive-strength = <8>; bias-pull-down; }; mux_2 { pins = "gpio25"; function = "audio_rxfsync"; drive-strength = <8>; bias-pull-down; }; mux_3 { pins = "gpio26"; function = "audio_rxd"; drive-strength = <8>; bias-pull-down; }; mux_4 { pins = "gpio27"; function = "audio_txmclk"; drive-strength = <8>; bias-pull-down; }; mux_5 { pins = "gpio28"; function = "audio_txbclk"; drive-strength = <8>; bias-pull-down; }; mux_6 { pins = "gpio29"; function = "audio_txfsync"; drive-strength = <8>; bias-pull-down; }; mux_7 { pins = "gpio30"; function = "audio_txd"; drive-strength = <8>; bias-pull-down; }; }; }; &usb3 { status = "ok"; device-power-gpio = <&tlmm 24 1>; }; &eud { status = "ok"; }; &pcie_x1 { interrupts-extended = <&tlmm 19 0>, <&tlmm 0 0>, <&intc GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "wake_gpio", "mdm2ap_e911", "global_irq"; pinctrl-0 = <&pcie_wake_pins &mdm2ap_e911_status>; e911-gpio = <&tlmm 0 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; status = "ok"; perst-gpio = <&tlmm 18 GPIO_ACTIVE_LOW>; slot_id = <0>; reg = <0x80000000 0xf1d 0x80000F20 0xa8 0x80001000 0x1000 0x78000 0x3000 0x80100000 0x1000>; reg-names = "dbi", "elbi", "atu", "parf", "config"; }; &pcie_x2 { status = "ok"; perst-gpio = <&tlmm 15 GPIO_ACTIVE_LOW>; }; &dwc_0 { /delete-property/ #phy-cells; /delete-property/ phys; /delete-property/ phy-names; }; &hs_m31phy_0 { status = "ok"; }; &pcie_x1phy { status = "ok"; }; &pcie_x2phy { status = "ok"; }; &pcie_x2_rp { status = "ok"; mhi_1: qcom,mhi@1 { reg = <0 0 0 0 0 >; qrtr_instance_id = <0x20>; qti,disable-rddm-prealloc; qti,rddm-seg-len = <0x1000>; #address-cells = <0x2>; #size-cells = <0x2>; #if defined(__CNSS2__) memory-region = <0>,<&mhi_region1>; #endif }; }; &pcie_x1_rp { status = "ok"; aliases { mhi-netdev0 = &mhi_netdev_0; mhi_netdev2 = &mhi_netdev_2; }; mhi_0: qcom,mhi@0 { reg = <0 0 0 0 0 >; ap2mdm-gpio = <&tlmm 25 0>; mdm2ap-gpio = <&tlmm 23 0>; pinctrl-0 = <&ap2mdm_status>; pinctrl-names = "default"; /* controller specific configuration */ qcom,iommu-dma = "disabled"; /* mhi bus specific settings */ mhi,ssr-negotiate; mhi_devices: mhi_devices { #address-cells = <1>; #size-cells = <0>; mhi_netdev_0: mhi_rmnet@0 { reg = <0x0>; mhi,chan = "IP_HW0"; mhi,interface-name = "rmnet_mhi"; mhi,mru = <0x4000>; mhi,enable-rate-control; mhi,chain-skb; }; mhi_rmnet@1 { reg = <0x1>; mhi,chan = "IP_HW0_RSC"; mhi,mru = <0x8000>; mhi,rsc-parent = <&mhi_netdev_0>; }; mhi_netdev_2: mhi_rmnet@2 { reg = <0x2>; mhi,chan = "IP_SW0"; mhi,interface-name = "rmnet_mhi_sw"; mhi,mru = <0x4000>; mhi,disable-chain-skb; }; mhi_qrtr { mhi,chan = "IPCR"; qcom,net-id = <1>; }; }; }; }; &q6v5_wcss { #ifdef __IPQ_MEM_PROFILE_256_MB__ memory-region = <&q6_region>, <&q6_etr_region>; #else memory-region = <&q6_region>, <&q6_etr_region>, <&q6_caldb_region>; #endif }; &wifi0 { /* IPQ5018 */ mem-region = <&q6_region>; qcom,bdf-addr = <0x4BA00000 0x4BA00000 0x4BA00000 0x0 0x0 0x0>; qcom,caldb-addr = <0x4C900000 0x4C900000 0x0 0x0 0x0 0x0>; qcom,caldb-size = <0x200000>; qcom,board_id = <0x23>; status = "ok"; }; &wifi3 { /* QCN9000 5G */ board_id = <0xa0>; hremote_node = <&qcn9000_pcie0>; #ifdef __IPQ_MEM_PROFILE_256_MB__ /* QCN9000 tgt-mem-mode=2 layout - 17MB * +=========+==============+=========+ * | Region | Start Offset | Size | * +---------+--------------+---------+ * | HREMOTE | 0x4C900000 | 11MB | * +---------+--------------+---------+ * | M3 Dump | 0x4D400000 | 1MB | * +---------+--------------+---------+ * | ETR | 0x4D500000 | 1MB | * +---------+--------------+---------+ * | Pageable| 0x4D600000 | 4MB | * +==================================+ */ base-addr = <0x4C900000>; m3-dump-addr = <0x4D400000>; etr-addr = <0x4D500000>; caldb-addr = <0>; pageable-addr = <0x4D600000>; caldb-size = <0>; hremote-size = <0xB00000>; tgt-mem-mode = <0x2>; pageable-size = <0x400000>; #elif __IPQ_MEM_PROFILE_512_MB__ /* QCN9000 tgt-mem-mode=1 layout - 26MB * +=========+==============+=========+ * | Region | Start Offset | Size | * +---------+--------------+---------+ * | HREMOTE | 0x4CB00000 | 12MB | * +---------+--------------+---------+ * | M3 Dump | 0x4D700000 | 1MB | * +---------+--------------+---------+ * | ETR | 0x4D800000 | 1MB | * +---------+--------------+---------+ * | Caldb | 0x4D900000 | 8MB | * +---------+--------------+---------+ * | Pageable| 0x4E100000 | 4MB | * +==================================+ */ base-addr = <0x4CB00000>; m3-dump-addr = <0x4D700000>; etr-addr = <0x4D800000>; caldb-addr = <0x4D900000>; pageable-addr = <0x4E100000>; caldb-size = <0x800000>; hremote-size = <0xC00000>; tgt-mem-mode = <0x1>; pageable-size = <0x400000>; #else /* QCN9000 tgt-mem-mode=0 layout - 53MB * +=========+==============+=========+ * | Region | Start Offset | Size | * +---------+--------------+---------+ * | HREMOTE | 0x4CB00000 | 35MB | * +---------+--------------+---------+ * | M3 Dump | 0x4EE00000 | 1MB | * +---------+--------------+---------+ * | ETR | 0x4EF00000 | 1MB | * +---------+--------------+---------+ * | Caldb | 0x4F000000 | 8MB | * +---------+--------------+---------+ * | Pageable| 0x4F800000 | 8MB | * +==================================+ */ base-addr = <0x4CB00000>; m3-dump-addr = <0x4EE00000>; etr-addr = <0x4EF00000>; caldb-addr = <0x4F000000>; pageable-addr = <0x4F800000>; hremote-size = <0x2300000>; caldb-size = <0x800000>; tgt-mem-mode = <0x0>; pageable-size = <0x800000>; #endif status = "ok"; };