// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* * IPQ9574 AL02-C14 board device tree source * * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; #include "ipq9574-al02-c4.dts" / { #address-cells = <0x2>; #size-cells = <0x2>; model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C14"; compatible = "qcom,ipq9574-ap-al02-c14", "qcom,ipq9574-al08", "qcom,ipq9574"; interrupt-parent = <&intc>; soc { dp1 { reg = <0x3a500000 0x4000>; qcom,mactype = <1>; qcom,phy-mdio-addr = <1>; }; dp2 { reg = <0x3a504000 0x4000>; qcom,mactype = <1>; qcom,phy-mdio-addr = <2>; }; dp3 { reg = <0x3a508000 0x4000>; qcom,mactype = <1>; qcom,phy-mdio-addr = <3>; }; dp4 { reg = <0x3a50c000 0x4000>; qcom,mactype = <1>; qcom,phy-mdio-addr = <4>; }; mdio:mdio@90000 { /*gpio60 for manhattan reset*/ phy-reset-gpio = <&tlmm 60 0>; phyaddr_fixup = <0xC90F018>; uniphyaddr_fixup = <0xC90F014>; mdio_clk_fixup; /* MDIO clock sequence fix up flag */ phy0: ethernet-phy@0 { reg = <1>; fixup; }; phy1: ethernet-phy@1 { reg = <2>; fixup; }; phy2: ethernet-phy@2 { reg = <3>; fixup; }; phy3: ethernet-phy@3 { reg = <4>; fixup; }; }; ess-instance { num_devices = <0x1>; ess-switch@3a000000 { switch_mac_mode = <0x15>; /* mac mode for uniphy instance0*/ tm_tick_mode = <1>; /* tm tick mode */ qcom,port_phyinfo { port@0 { phy_address = <1>; }; port@1 { phy_address = <2>; }; port@2 { phy_address = <3>; }; port@3 { phy_address = <4>; }; }; led_source@0 { source = <0>; mode = "normal"; speed = "all"; blink_en = "enable"; active = "high"; }; led_source@3 { source = <3>; mode = "normal"; speed = "all"; blink_en = "enable"; active = "high"; }; led_source@6 { source = <6>; mode = "normal"; speed = "all"; blink_en = "enable"; active = "high"; }; led_source@9 { source = <9>; mode = "normal"; speed = "all"; blink_en = "enable"; active = "high"; }; }; }; nss-macsec0 { compatible = "qcom,nss-macsec"; phy_addr = <0x1>; mdiobus = <&mdio>; }; nss-macsec1 { compatible = "qcom,nss-macsec"; phy_addr = <0x2>; mdiobus = <&mdio>; }; nss-macsec2 { compatible = "qcom,nss-macsec"; phy_addr = <0x3>; mdiobus = <&mdio>; }; nss-macsec3 { compatible = "qcom,nss-macsec"; phy_addr = <0x4>; mdiobus = <&mdio>; }; }; }; &pcie2_x2 { status = "disabled"; }; &pcie2_phy { status = "disabled"; }; &pcie3_x2 { status = "disabled"; }; &pcie3_phy { status = "disabled"; }; &qcn9224_pcie2 { status = "disabled"; }; &mhi_region2 { status = "disabled"; }; &qcn9224_pcie3 { status = "disabled"; }; &mhi_region3 { status = "disabled"; }; &wifi0 { // 1 below indicates GPIO is active low led-gpio = <&tlmm 64 1>; qcom,board_id = <0x20>; status = "ok"; }; &wifi5 { /* QCN9224 split-radio 5G + 6G */ hremote_node = <&qcn9224_pcie1>; board_id = <0x1006>; status = "ok"; }; &wifi6 { status = "disabled"; }; &wifi7 { status = "disabled"; }; &q6_region { status = "ok"; }; &m3_dump { status = "ok"; }; &q6_etr_region { status = "ok"; }; &q6_caldb_region { status = "ok"; }; &cpu_opp_table { opp-1800000000 { opp-supported-hw = <0>; }; opp-2208000000 { opp-supported-hw = <0>; }; };