// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * IPQ9574 AL02-C20 board device tree source
 *
 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
 */

/dts-v1/;

#include "ipq9574.dtsi"
#include "ipq9574-wkk-default-memory.dtsi"
#include "ipq9574-cpu.dtsi"

/ {
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C20";
	compatible = "qcom,ipq9574-ap-al02-c20", "qcom,ipq9574-al02", "qcom,ipq9574";
	interrupt-parent = <&intc>;

	aliases {
		serial0 = &blsp1_uart2;
		serial1 = &blsp1_uart4;
		serial2 = &blsp1_uart3;
		ethernet0 = "/soc/dp1";
		ethernet1 = "/soc/dp2";
		ethernet2 = "/soc/dp3";
		ethernet3 = "/soc/dp4";
		ethernet4 = "/soc/dp5";
		ethernet5 = "/soc/dp6";
	};

	chosen {
		stdout-path = "serial0";
	};

	soc {
		pinctrl@1000000 {
			pci0_pin: pci0-pinmux {
				pins = "gpio23";
				function = "gpio";
				drive-strength = <8>;
				bias-pull-up;
				output-low;
			};

			pci1_pin: pci1-pinmux {
				pins = "gpio26";
				function = "gpio";
				drive-strength = <8>;
				bias-pull-down;
				output-low;
			};

			pci2_pin: pci2-pinmux {
				pins = "gpio29";
				function = "gpio";
				drive-strength = <8>;
				bias-pull-down;
				output-low;
			};

			pci3_pin: pci3-pinmux {
				pins = "gpio32";
				function = "gpio";
				drive-strength = <8>;
				bias-pull-up;
				output-low;
			};

			blsp1_uart2_pins: blsp1_uart2_pinmux {
				pins = "gpio34", "gpio35";
				function = "blsp2_uart";
				drive-strength = <8>;
				bias-disable;
			};

			gps_pins: gps_pins {
				blsp3_uart_pinmux {
					pins = "gpio17", "gpio18";
					function = "blsp3_uart";
					drive-strength = <8>;
					bias-disable;
				 };

				gps_on_off {
					pins = "gpio7";
					function = "gpio";
					drive-strength = <8>;
					bias-pull-down;
				 };
			 };

			leds_pins: leds_pinmux {
				led0_2g {
					pins = "gpio64";
					function = "gpio";
					drive-strength = <8>;
					bias-pull-up;
				};
			};

			qspi_nand_pins: qspi_nand_pins {
				qspi_clock {
					pins = "gpio5";
					function = "qspi_clk";
					drive-strength = <8>;
					bias-disable;
				};

				qspi_cs {
					pins = "gpio4";
					function = "qspi_cs";
					drive-strength = <8>;
					bias-disable;
				};

				qspi_data {
					pins = "gpio0", "gpio1", "gpio2", "gpio3";
					function = "qspi_data";
					drive-strength = <8>;
					bias-disable;
				};
			};

			spi_0_pins: spi-0-pins {
				pins = "gpio11", "gpio12", "gpio13", "gpio14";
				function = "blsp0_spi";
				drive-strength = <8>;
				bias-disable;
			};

			i2c_3_pins: i2c-3-pins {
				pins = "gpio15", "gpio16";
				function = "blsp3_i2c";
				drive-strength = <8>;
				bias-disable;
			};

			mdio_pins: mdio_pinmux {
				mux_0 {
					pins = "gpio38";
					function = "mdc";
					drive-strength = <8>;
					bias-disable;
				};
				mux_1 {
					pins = "gpio39";
					function = "mdio";
					drive-strength = <8>;
					bias-pull-up;
				};
			};

			button_pins: button_pins {
				wps_button {
					pins = "gpio37";
					function = "gpio";
					drive-strength = <8>;
					bias-pull-up;
				};
			};

			QCC710_pins: QCC710_pins {
				blsp1_uart4_pinmux {
					pins = "gpio50", "gpio51", "gpio52", "gpio53";
					function = "blsp4_uart";
					drive-strength = <8>;
					bias-disable;
				};
				QCC710_reset {
					pins = "gpio19";
					function = "gpio";
					drive-strength = <8>;
					bias-pull-down;
				};
			};

			pta_QCC710: pta_QCC710 {
				pta1_0 {
					pins = "gpio56";
					function = "pta1_0";
					drive-strength = <8>;
					bias-disable;
				};
				pta1_1 {
					pins = "gpio54";
					function = "pta1_1";
					drive-strength = <8>;
					bias-disable;
				};
				pta1_2 {
					pins = "gpio55";
					function = "pta1_2";
					drive-strength = <8>;
					bias-disable;
				};
			};
		};

		blsp1_uart2: serial@78b1000 {
			pinctrl-0 = <&blsp1_uart2_pins>;
			pinctrl-names = "default";
			status = "ok";
		};

		blsp1_uart3: serial@78b2000 {
			pinctrl-0 = <&gps_pins>;
			pinctrl-names = "default";
			status = "ok";
		 };

		blsp1_uart4: serial@78b3000 {
			pinctrl-0 = <&QCC710_pins &pta_QCC710>;
			pinctrl-names = "default";
			status = "ok";
		};

		gpio_keys {
			compatible = "gpio-keys";
			pinctrl-0 = <&button_pins>;
			pinctrl-names = "default";
			status = "ok";

			button@1 {
				label = "wps";
				linux,code = <KEY_WPS_BUTTON>;
				gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
				linux,input-type = <1>;
				debounce-interval = <60>;
			};
		};

		dp1 {
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <1>;
			reg = <0x3a001000 0x200>;
			qcom,mactype = <0>;
			qcom,link-poll = <1>;
			local-mac-address = [000000000000];
			qcom,phy-mdio-addr = <16>;
			phy-mode = "sgmii";
		};

		dp2 {
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <2>;
			reg = <0x3a001200 0x200>;
			qcom,mactype = <0>;
			qcom,link-poll = <1>;
			local-mac-address = [000000000000];
			qcom,phy-mdio-addr = <17>;
			phy-mode = "sgmii";
		};

		dp3 {
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <3>;
			reg = <0x3a001400 0x200>;
			qcom,mactype = <0>;
			qcom,link-poll = <1>;
			local-mac-address = [000000000000];
			qcom,phy-mdio-addr = <18>;
			phy-mode = "sgmii";
		};

		dp4 {
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <4>;
			reg = <0x3a001600 0x200>;
			qcom,mactype = <0>;
			qcom,link-poll = <1>;
			local-mac-address = [000000000000];
			qcom,phy-mdio-addr = <19>;
			phy-mode = "sgmii";
		};

		dp5 {
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <5>;
			reg = <0x3a510000 0x4000>;
			qcom,mactype = <1>;
			qcom,link-poll = <1>;
			local-mac-address = [000000000000];
			qcom,phy-mdio-addr = <8>;
			phy-mode = "sgmii";
		};

		dp6 {
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <6>;
			reg = <0x3a514000 0x4000>;
			qcom,mactype = <1>;
			qcom,link-poll = <1>;
			local-mac-address = [000000000000];
			qcom,phy-mdio-addr = <0>;
			phy-mode = "sgmii";
		};

		license_manager {
			compatible = "qti,license-manager-service";
			device-license-termination;
		};

		qpic_bam: dma@7984000 {
			status = "ok";
		};

		qpic_nand: nand@79b0000 {
			status = "ok";
			pinctrl-0 = <&qspi_nand_pins>;
			pinctrl-names = "default";

			nand@0 {
				reg = <0>;
				#address-cells = <1>;
				#size-cells = <1>;

				nand-ecc-strength = <4>;
				nand-ecc-step-size = <512>;
				nand-bus-width = <8>;
			};
		};

		spi_0: spi@78b5000 { /* BLSP1 QUP0 */
			status = "ok";
			pinctrl-0 = <&spi_0_pins>;
			pinctrl-names = "default";
			cs-select = <0>;

			m25p80@0 {
				compatible = "n25q128a11";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0>;
				spi-max-frequency = <50000000>;
			};
		};

		eud: qcom,msm-eud {
			status = "ok";
		};

		i2c_3: i2c@78b8000 {
			status = "ok";
			pinctrl-0 = <&i2c_3_pins>;
			pinctrl-names = "default";

			bmp390@77 {
				compatible = "bosch,bmp390";
				reg = <0x77>;
			};
		};

		usb: usb3@8A00000 {
			status = "ok";
		};

		qusb_phy_0: qusb@7B000 {
			status = "ok";
		};

		ssphy_0: ssphy@7D000 {
			status = "ok";
		};

		leds {
			compatible = "gpio-leds";
			pinctrl-0 = <&leds_pins>;
			pinctrl-names = "default";
			led@64 {
				label = "led0_2g";
				gpios = <&tlmm 64 GPIO_ACTIVE_LOW>;
				linux,default-trigger = "led_2g";
				default-state = "off";
			};
		};

		pcie0_x1: pci@28000000 {
			pinctrl-0 = <&pci0_pin>;
			pinctrl-names = "default";
			perst-gpio = <&tlmm 23 1>;
			max-payload-size = <1>; // 1-256 TLP bytes for WKK
			status = "ok";
			pcie0_rp {
				reg = <0 0 0 0 0>;

				wifi@0 {
					reg = <0 0 0 0 0>;

					qti,disable-rddm-prealloc;
					qti,rddm-seg-len = <0x1000>;
					boot-args = <0x2 0x4 0x34 0x3 0x0 0x0     /* MX Rail, GPIO52, Drive strength 0x3 */
							0x4 0x4 0x18 0x3 0x0 0x0  /* RFA1p2 Rail, GPIO24, Drive strength 0x3 */
							0x0 0x4 0x0 0x0 0x0 0x0>; /* End of arguments */
					license-file = "";
#if defined(__CNSS2__)
					qrtr_node_id = <0x30>;
					memory-region = <0>,<&mhi_region0>;
#endif
				};

			};
		};

		pcie0_phy: phy@84000 {
			status = "ok";
		};

		pcie1_x1: pci@10000000 {
			pinctrl-0 = <&pci1_pin>;
			pinctrl-names = "default";
			perst-gpio = <&tlmm 26 1>;
			max-payload-size = <1>; // 1-256 TLP bytes for WKK
			status = "ok";
			pcie1_rp {
				reg = <0 0 0 0 0>;

				wifi@1 {
					reg = <0 0 0 0 0>;

					qti,disable-rddm-prealloc;
					qti,rddm-seg-len = <0x1000>;
					boot-args = <0x2 0x4 0x34 0x3 0x0 0x0     /* MX Rail, GPIO52, Drive strength 0x3 */
							0x4 0x4 0x18 0x3 0x0 0x0  /* RFA1p2 Rail, GPIO24, Drive strength 0x3 */
							0x0 0x4 0x0 0x0 0x0 0x0>; /* End of arguments */
					license-file = "";
#if defined(__CNSS2__)
					qrtr_node_id = <0x31>;
					memory-region = <0>,<&mhi_region1>;
#else
				       /* qcn9224 tgt-mem-mode=0 layout - 46MB
					* refer ipq9574-wkk-default-memory.dtsi
					* +=========+==============+=========+
					* |  Region | Start Offset |   Size  |
					* +---------+--------------+---------+
					* | HREMOTE |  0x52500000  |   36MB  |
					* +---------+--------------+---------+
					* | M3 Dump |  0x54900000  |   1MB   |
					* +---------+--------------+---------+
					* |   ETR   |  0x54A00000  |   1MB   |
					* +---------+--------------+---------+
					* |  Caldb  |  0x54B00000  |   8MB   |
					* +==================================+
					*/
					memory-region = <&qcn9224_pcie1>;
					qcom,board_id = <0x01>;
#endif
				};
			};
		};

		pcie1_phy: phy@fc000 {
			status = "ok";
		};

		pcie2_x2: pci@20000000 {
			pinctrl-0 = <&pci2_pin>;
			pinctrl-names = "default";
			perst-gpio = <&tlmm 29 1>;
			max-payload-size = <1>; // 1-256 TLP bytes for WKK
			status = "ok";
			pcie2_rp {
				reg = <0 0 0 0 0>;

				wifi@2 {
					reg = <0 0 0 0 0>;

					qti,disable-rddm-prealloc;
					qti,rddm-seg-len = <0x1000>;
					boot-args = <0x2 0x4 0x34 0x3 0x0 0x0     /* MX Rail, GPIO52, Drive strength 0x3 */
							0x4 0x4 0x18 0x3 0x0 0x0  /* RFA1p2 Rail, GPIO24, Drive strength 0x3 */
							0x0 0x4 0x0 0x0 0x0 0x0>; /* End of arguments */
					license-file = "";
#if defined(__CNSS2__)
					qrtr_node_id = <0x32>;
					memory-region = <0>,<&mhi_region2>;
#else
					/* qcn9224 tgt-mem-mode=0 layout - 46MB
					* refer ipq9574-wkk-default-memory.dtsi
					* +=========+==============+=========+
					* |  Region | Start Offset |   Size  |
					* +---------+--------------+---------+
					* | HREMOTE |  0x56D00000  |   36MB  |
					* +---------+--------------+---------+
					* | M3 Dump |  0x59100000  |   1MB   |
					* +---------+--------------+---------+
					* |   ETR   |  0x59200000  |   1MB   |
					* +---------+--------------+---------+
					* |  Caldb  |  0x59300000  |   8MB   |
					* +==================================+
					*/
					memory-region = <&qcn9224_pcie2>;
					qcom,board_id = <0x04>;
#endif
				};
			};
		};

		pcie2_phy: phy@8c000 {
			status = "ok";
		};

		pcie3_x2: pci@18000000 {
			pinctrl-0 = <&pci3_pin>;
			pinctrl-names = "default";
			perst-gpio = <&tlmm 32 1>;
			max-payload-size = <1>; // 1-256 TLP bytes for WKK
			status = "ok";
			pcie3_rp {
				reg = <0 0 0 0 0>;

				wifi@3 {
					reg = <0 0 0 0 0>;

					qti,disable-rddm-prealloc;
					qti,rddm-seg-len = <0x1000>;
					boot-args = <0x2 0x4 0x34 0x3 0x0 0x0     /* MX Rail, GPIO52, Drive strength 0x3 */
							0x4 0x4 0x18 0x3 0x0 0x0  /* RFA1p2 Rail, GPIO24, Drive strength 0x3 */
							0x0 0x4 0x0 0x0 0x0 0x0>; /* End of arguments */
					license-file = "";
#if defined(__CNSS2__)
					qrtr_node_id = <0x33>;
					memory-region = <0>,<&mhi_region3>;
#else
					/* qcn9224 tgt-mem-mode=0 layout - 46MB
					 * refer ipq9574-wkk-default-memory.dtsi
					 * +=========+==============+=========+
					 * |  Region | Start Offset |   Size  |
					 * +---------+--------------+---------+
					 * | HREMOTE |  0x5B500000  |   36MB  |
					 * +---------+--------------+---------+
					 * | M3 Dump |  0x5D900000  |   1MB   |
					 * +---------+--------------+---------+
					 * |   ETR   |  0x5DA00000  |   1MB   |
					 * +---------+--------------+---------+
					 * |  Caldb  |  0x5DB00000  |   8MB   |
					 * +==================================+
					 */
					memory-region = <&qcn9224_pcie3>;
					qcom,board_id = <0x02>;
#endif
				};
			};
		};

		pcie3_phy: phy@f4000 {
			status = "ok";
		};

		qcom,test@0 {
			qcom,wlan-ramdump-dynamic = <0x600000>;
		};

		mdio@90000 {
			status = "ok";
			pinctrl-0 = <&mdio_pins>;
			pinctrl-names = "default";
			/*gpio60 for malibu reset, gpio36 for both aqr reset reserved */
			phy-reset-gpio = <&tlmm 60 0>;
			phy0: ethernet-phy@0 {
				reg = <16>;
			};
			phy1: ethernet-phy@1 {
				reg = <17>;
			};
			phy2: ethernet-phy@2 {
				reg = <18>;
			};
			phy3: ethernet-phy@3 {
				reg = <19>;
			};
			phy4: ethernet-phy@4 {
				compatible ="ethernet-phy-ieee802.3-c45";
				reg = <8>;
			};
			phy5: ethernet-phy@5 {
				compatible ="ethernet-phy-ieee802.3-c45";
				reg = <0>;
			};
		};

		ess-instance {
			num_devices = <0x1>;
			ess-switch@3a000000 {
				switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
				switch_lan_bmp = <0x3e>; /* lan port bitmap */
				switch_wan_bmp = <0x40>; /* wan port bitmap */
				switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
				switch_mac_mode1 = <0xd>; /* mac mode for uniphy instance1*/
				switch_mac_mode2 = <0xd>; /* mac mode for uniphy instance2*/
				bm_tick_mode = <0>; /* bm tick mode */
				tm_tick_mode = <0>; /* tm tick mode */

				qcom,port_phyinfo {
					port@0 {
						port_id = <1>;
						phy_address = <16>;
					};
					port@1 {
						port_id = <2>;
						phy_address = <17>;
					};
					port@2 {
						port_id = <3>;
						phy_address = <18>;
					};
					port@3 {
						port_id = <4>;
						phy_address = <19>;
					};
					port@4 {
						port_id = <5>;
						phy_address = <8>;
						ethernet-phy-ieee802.3-c45;
					};
					port@5 {
						port_id = <6>;
						phy_address = <0>;
						ethernet-phy-ieee802.3-c45;
					};
				};

			};
		};

		/* EDMA host driver configuration for the board */
		edma@3ab00000 {
			qcom,txdesc-ring-start = <4>;		/* Tx desc ring start ID */
			qcom,txdesc-rings = <28>;		/* Total number of Tx desc rings to be provisioned */
			qcom,txcmpl-ring-start = <4>;		/* Tx complete ring start ID */
			qcom,txcmpl-rings = <28>;		/* Total number of Tx complete rings to be provisioned */
			qcom,rxfill-ring-start = <4>;		/* Rx fill ring start ID */
			qcom,rxfill-rings = <4>;		/* Total number of Rx fill rings to be provisioned */
			qcom,rxdesc-ring-start = <20>;		/* Rx desc ring start ID */
			qcom,rxdesc-rings = <4>;		/* Total number of Rx desc rings to be provisioned */
			qcom,rx-page-mode = <0>;		/* Rx fill ring page mode */
			qcom,tx-map-priority-level = <1>;	/* Tx priority level per port */
			qcom,rx-map-priority-level = <1>;	/* Rx priority level per core */
			qcom,ppeds-num = <4>;			/* Number of PPEDS nodes */
			/* PPE-DS node format: <Rx-fill Tx-cmpl Rx Tx Queue-base Queue-count> */
			qcom,ppeds-map = <1 1 1 1 32 8>,	/* PPEDS Node#0 ring and queue map */
					<2 2 2 2 40 8>,		/* PPEDS Node#1 ring and queue map */
					<3 3 3 3 48 8>,		/* PPEDS Node#2 ring and queue map */
					<0 0 0 0 56 8>;		/* PPEDS Node#3 ring and queue map */
			qcom,txdesc-map = <8 9 10 11>,		/* Port0 per-core Tx ring map */
					<12 13 14 15>,		/* Port1 per-core Tx ring map */
					<16 17 18 19>,		/* Port2 per-core Tx ring map */
					<20 21 22 23>,		/* Port3 per-core Tx ring map */
					<24 25 26 27>,		/* Port4 per-core Tx ring map */
					<28 29 30 31>,		/* Port5 per-core Tx ring map */
					<4 5 6 7>;		/* Used only for VP" */
			qcom,txdesc-fc-grp-map = <1 2 3 4 5 6>;	/* Per GMAC flow control group map */
			qcom,rxfill-map = <4 5 6 7>;		/* Per-core Rx fill ring map */
			qcom,rxdesc-map = <20 21 22 23>;	/* Per-core Rx desc ring map */
			qcom,rx-queue-start = <0>;		/* Rx queue start */
			qcom,rx-ring-queue-map = <0 8 16 24>,	/* Priority 0 queues per-core Rx ring map */
					<1 9 17 25>,		/* Priority 1 queues per-core Rx ring map */
					<2 10 18 26>,		/* Priority 2 queues per-core Rx ring map */
					<3 11 19 27>,		/* Priority 3 queues per-core Rx ring map */
					<4 12 20 28>,		/* Priority 4 queues per-core Rx ring map */
					<5 13 21 29>,		/* Priority 5 queues per-core Rx ring map */
					<6 14 22 30>,		/* Priority 6 queues per-core Rx ring map */
					<7 15 23 31>;		/* Priority 7 queues per-core Rx ring map */
			qcom,txdesc_point_offload_ring = <0>;		/* Txdesc point offlaod ring */
			qcom,txcmpl_point_offload_ring = <0>;		/* Txcmpl point offlaod ring */
			qcom,rxfill_point_offload_ring = <0>;		/* Rxfill point offlaod ring */
			qcom,rxdesc_point_offload_ring = <0>;		/* Rxdesc point offlaod ring */
			qcom,vp-id = <8>;			/* Virtual port dummy MAC Id */
			interrupts = <0 367 4>,			/* Tx complete ring id #4 IRQ info */
				   <0 368 4>,			/* Tx complete ring id #5 IRQ info */
				   <0 369 4>,			/* Tx complete ring id #6 IRQ info */
				   <0 370 4>,			/* Tx complete ring id #7 IRQ info */
				   <0 371 4>,			/* Tx complete ring id #8 IRQ info */
				   <0 372 4>,			/* Tx complete ring id #9 IRQ info */
				   <0 373 4>,			/* Tx complete ring id #10 IRQ info */
				   <0 374 4>,			/* Tx complete ring id #11 IRQ info */
				   <0 375 4>,			/* Tx complete ring id #12 IRQ info */
				   <0 376 4>,			/* Tx complete ring id #13 IRQ info */
				   <0 377 4>,			/* Tx complete ring id #14 IRQ info */
				   <0 378 4>,			/* Tx complete ring id #15 IRQ info */
				   <0 379 4>,			/* Tx complete ring id #16 IRQ info */
				   <0 380 4>,			/* Tx complete ring id #17 IRQ info */
				   <0 381 4>,			/* Tx complete ring id #18 IRQ info */
				   <0 382 4>,			/* Tx complete ring id #19 IRQ info */
				   <0 383 4>,			/* Tx complete ring id #20 IRQ info */
				   <0 384 4>,			/* Tx complete ring id #21 IRQ info */
				   <0 509 4>,			/* Tx complete ring id #22 IRQ info */
				   <0 508 4>,			/* Tx complete ring id #23 IRQ info */
				   <0 507 4>,			/* Tx complete ring id #24 IRQ info */
				   <0 506 4>,			/* Tx complete ring id #25 IRQ info */
				   <0 505 4>,			/* Tx complete ring id #26 IRQ info */
				   <0 504 4>,			/* Tx complete ring id #27 IRQ info */
				   <0 503 4>,			/* Tx complete ring id #28 IRQ info */
				   <0 502 4>,			/* Tx complete ring id #29 IRQ info */
				   <0 501 4>,			/* Tx complete ring id #30 IRQ info */
				   <0 500 4>,			/* Tx complete ring id #31 IRQ info */
				   <0 351 4>,			/* Rx desc ring id #20 IRQ info */
				   <0 352 4>,			/* Rx desc ring id #21 IRQ info */
				   <0 353 4>,			/* Rx desc ring id #22 IRQ info */
				   <0 354 4>,			/* Rx desc ring id #23 IRQ info */
				   <0 261 4>,			/* Misc error IRQ info */
				   <0 364 4>,			/* PPEDS Node #0(TxComp ring id #1) TxComplete IRQ info */
				   <0 332 4>,			/* PPEDS Node #0(Rx Desc ring id #1) Rx Desc IRQ info */
				   <0 356 4>,			/* PPEDS Node #0(RxFill Desc ring id #1) Rx Fill IRQ info */
				   <0 365 4>,			/* PPEDS Node #1(TxComp ring id #2) TxComplete IRQ info */
				   <0 333 4>,			/* PPEDS Node #1(Rx Desc ring id #2) Rx Desc IRQ info */
				   <0 357 4>,			/* PPEDS Node #1(RxFill Desc ring id #2) Rx Fill IRQ info */
				   <0 366 4>,			/* PPEDS Node #2(TxComp ring id #3) TxComplete IRQ info */
				   <0 334 4>,			/* PPEDS Node #2(Rx Desc ring id #3) Rx Desc IRQ info */
				   <0 358 4>,			/* PPEDS Node #2(RxFill Desc ring id #3) Rx Fill IRQ info */
				   <0 363 4>,			/* PPEDS Node #3(TxComp ring id #0) TxComplete IRQ info */
				   <0 331 4>,			/* PPEDS Node #3(Rx Desc ring id #0) Rx Desc IRQ info */
				   <0 355 4>;			/* PPEDS Node #3(RxFill Desc ring id #0) Rx Fill IRQ info */

		};

	};
};

/* Enable IPQ9574 integrated radio's reserved memory */
&q6_region {
	status = "ok";
};

&m3_dump {
	status = "ok";
};

&q6_etr_region {
	status = "ok";
};

&q6_caldb_region {
	status = "ok";
};

/* Enable the reserved memory regions of QCN9224 on PCIe0, PCIe1, PCIe2, PCIe3 */

&mhi_region0 {
	status = "ok";
};

&qcn9224_pcie0 {
	status = "ok";
};

&qcn9224_pcie1 {
	status = "ok";
};

&mhi_region1 {
	status = "ok";
};

&qcn9224_pcie2 {
	status = "ok";
};

&mhi_region2 {
	status = "ok";
};

&qcn9224_pcie3 {
	status = "ok";
};

&mhi_region3 {
	status = "ok";
};

/* MLO GLOBAL MEM REGION size is 22MB for RDP with 4 QCN9224 radios */
&mlo_global_mem0 {
	size = <0x0 0x1800000>;
	status = "ok";
};

&wifi0 {
       led-gpio = <&tlmm 64 1>;
       status = "disabled";
};

&wifi4 {
	hremote_node = <&qcn9224_pcie0>;
	board_id = <0x01>;
	interrupt-bmap = <0x080512>;
	status = "ok";
};

&wifi5 {
	hremote_node = <&qcn9224_pcie1>;
	board_id = <0x011>;
	interrupt-bmap = <0x080512>;
	status = "ok";
};

&wifi6 {
	hremote_node = <&qcn9224_pcie2>;
	board_id = <0x04>;
	interrupt-bmap = <0x080512>;
	status = "ok";
};

&wifi7 {
	hremote_node = <&qcn9224_pcie3>;
	board_id = <0x12>;
	interrupt-bmap = <0x080512>;
	status = "ok";
};