// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * IPQ9574 AL02-C9 board device tree source
 *
 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
 */

/dts-v1/;

#include "ipq9574-al02-c6.dts"

/ {
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C9";
	compatible = "qcom,ipq9574-ap-al02-c9", "qcom,ipq9574-al02", "qcom,ipq9574";
	interrupt-parent = <&intc>;

	aliases {
                /delete-property/ethernet5;
        };

	soc {
		wsi: wsi {
			id = <0>;
			num_chip = <2>;
		};

		pcie0_x1: pci@28000000 {
			status = "ok";
			pcie0_rp {
				reg = <0 0 0 0 0>;

				wifi@0 {
					reg = <0 0 0 0 0>;

					qti,disable-rddm-prealloc;
					qti,rddm-seg-len = <0x1000>;
					boot-args = <0x2 0x4 0x34 0x3 0x0 0x0     /* MX Rail, GPIO52, Drive strength 0x3 */
							0x4 0x4 0x18 0x3 0x0 0x0  /* RFA1p2 Rail, GPIO24, Drive strength 0x3 */
							0x0 0x4 0x0 0x0 0x0 0x0>; /* End of arguments */
					license-file = "";
#if defined(__CNSS2__)
					qrtr_node_id = <0x30>;
					memory-region = <0>,<&mhi_region0>;
#else
					/* qcn9224 tgt-mem-mode=0 layout
					* refer ipq9574-wkk-default-memory.dtsi */
					memory-region = <&qcn9224_pcie0>;
					qcom,board_id = <0x1010>;
					qcom,wsi = <&wsi>;
#endif
					status = "ok";
				};
			};
		};

		pcie0_phy: phy@84000 {
			status = "ok";
		};

#if !defined(__CNSS2__)
		pcie2_x2: pci@20000000 {
			status = "ok";
			pcie2_rp {
				reg = <0 0 0 0 0>;
				wifi@2 {
					reg = <0 0 0 0 0>;

					/* qcn9224 tgt-mem-mode=0 layout
					* refer ipq9574-wkk-default-memory.dtsi */
					memory-region = <&qcn9224_pcie2>;
					qcom,board_id = <0x100e>;
					status = "ok";
					qcom,wsi = <&wsi>;
				};
			};
		};
#endif
		pcie3_x2: pci@18000000 {
			status = "disabled";
			/delete-node/ pcie3_rp;
			pcie3_rp {
				reg = <0 0 0 0 0>;
			};
		};

		pcie3_phy: phy@f4000 {
			status = "disabled";
		};

		dp5 {
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <6>;
			reg = <0x3a514000 0x4000>;
			qcom,mactype = <1>;
			qcom,link-poll = <1>;
			local-mac-address = [000000000000];
			qcom,phy-mdio-addr = <0>;
			phy-mode = "sgmii";
                };

		/delete-node/dp6;

		mdio@90000 {
			phy4: ethernet-phy@4 {
				reg = <0>;
			};
			/delete-node/ ethernet-phy@5;
		};

		ess-instance {
			ess-switch@3a000000 {
				switch_lan_bmp = <0x1e>; /* lan port bitmap */
				switch_wan_bmp = <0x40>; /* wan port bitmap */
				switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
				qcom,port_phyinfo {
					port@4 {
						port_id = <6>;
						phy_address = <0>;
					};

					/delete-node/port@5;
				};
			};
		};
	};
};

/* In AL02-C9, the max supported CPU Freq is 1.5 GHz. Disabling frequencies beyond 1.5GHz*/
&cpu_opp_table {
	opp-1800000000 {
		opp-supported-hw = <0>;
	};

	opp-2208000000 {
		opp-supported-hw = <0>;
	};
};

/* Disable IPQ9574 integrated radio's reserved memory */
&q6_region {
	status = "disabled";
};

&m3_dump {
	status = "disabled";
};

&q6_etr_region {
	status = "disabled";
};

&q6_caldb_region {
	status = "disabled";
};

&qcn9224_pcie0 {
	status = "ok";
};

&mhi_region0 {
	status = "ok";
};

&qcn9224_pcie3 {
	status = "disabled";
};

&mhi_region3 {
	status = "disabled";
};

/* MLO GLOBAL MEM REGION size is 13MB for RDP with 2 QCN224 radios */
&mlo_global_mem0 {
	size = <0x0 0xD00000>;
	status = "ok";
};

&wifi0 {
	/* Disable IPQ9574 integratd 2G Radio */
	status = "disabled";
};

&wifi4 {
	/* QCN9224 split-radio 2.4G + 5G *(Low) */
	hremote_node = <&qcn9224_pcie0>;
	board_id = <0x1010>;
	status = "ok";
};

&wifi5 {
	status = "disabled";
};

&wifi6 {
	/* QCN9224 split-radio 5G (High) + 6G */
	hremote_node = <&qcn9224_pcie2>;
	board_id = <0x100e>;
	status = "ok";
};

&wifi7 {
	status = "disabled";
};