/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#ifndef _hw_mdio_h_
#define _hw_mdio_h_

/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#define MDIO_VERSION                 (*(volatile unsigned *)(MDIO_BASE + 0x00))

/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#define MDIO_CR                      (*(volatile unsigned *)(MDIO_BASE + 0x04))
#define MDIO_CR_CLKDIV(clkdiv)       ((clkdiv) << 0)
#define MDIO_CR_MAXCHAN(maxchan)     ((maxchan) << 8)
#define MDIO_CR_IRQ_TEST_EN          (1 << 17)
#define MDIO_CR_FAULT_DETECT_EN      (1 << 18)
#define MDIO_CR_FAULT                (1 << 19)
#define MDIO_CR_PREAMBLE             (1 << 20)
#define MDIO_CR_ENABLE               (1 << 30)
#define MDIO_CR_IDLE                 (1 << 31)

/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#define MDIO_ALIVE                   (*(volatile unsigned *)(MDIO_BASE + 0x08))

/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#define MDIO_LINK                    (*(volatile unsigned *)(MDIO_BASE + 0x0C))

/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#define MDIO_IRQ_RAW                 (*(volatile unsigned *)(MDIO_BASE + 0x10))

/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#define MDIO_IRQ_MASK                (*(volatile unsigned *)(MDIO_BASE + 0x14))

/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#define MDIO_USER_IRQ_RAW            (*(volatile unsigned *)(MDIO_BASE + 0x20))

/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#define MDIO_USER_IRQ_MASK           (*(volatile unsigned *)(MDIO_BASE + 0x24))

/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#define MDIO_USER_IRQ_MASK           (*(volatile unsigned *)(MDIO_BASE + 0x24))

/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#define MDIO_USER_IRQ_SET_MASK       (*(volatile unsigned *)(MDIO_BASE + 0x28))

/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#define MDIO_USER_IRQ_CLEAR_MASK     (*(volatile unsigned *)(MDIO_BASE + 0x2C))

/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#define MDIO_USER_ACCESS_0           (*(volatile unsigned *)(MDIO_BASE + 0x80))
#define MDIO_USER_ACCESS_1           (*(volatile unsigned *)(MDIO_BASE + 0x88))
#define MDIO_USER_ACCESS_DATA(data)       ((data) << 0)
#define MDIO_USER_ACCESS_PHYADDR(addr)    ((addr) << 16)
#define MDIO_USER_ACCESS_REGADDR(addr)    ((addr) << 21)
#define MDIO_USER_ACCESS_ACK              (1 << 29)
#define MDIO_USER_ACCESS_WRITE            (1 << 30)
#define MDIO_USER_ACCESS_GO               (1U << 31)


/*-------------------------------------------------------------------------------------*\
\*-------------------------------------------------------------------------------------*/
#define MDIO_USER_PHY_SELECT_0           (*(volatile unsigned *)(MDIO_BASE + 0x84))
#define MDIO_USER_PHY_SELECT_1           (*(volatile unsigned *)(MDIO_BASE + 0x8C))
#define MDIO_USER_PHY_SELECT_PHY_MON(addr)  ((addr) << 0)
#define MDIO_USER_PHY_SELECT_LINK_IRQ_EN    (1 << 6)
#define MDIO_USER_PHY_SELECT_LINK_SEL       (1 << 7)

#endif /*--- #ifndef _hw_mdio_h_ ---*/