#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <asm/io.h>
#include <asm/arch/hw.h>
#include <asm/memory.h>
#include <asm/arch/memory.h>
#include <asm/arch/irq.h>
#include <asm/arch/hardware.h>
#include <asm/arch/system_module.h>
#include <asm/arch/hw_timer.h>
#include <asm/arch/hw_clock.h>


struct system_regs *HW_SYSTEM;
struct _hw_psc *HW_POWER;
struct davinci_hw_timer *HW_TIMER[3];
struct intc_registers_t *HW_IRQ;

/*------------------------------------------------------------------------------------------*\
\*------------------------------------------------------------------------------------------*/
void debug_show_timer(unsigned int id) {
    struct davinci_hw_timer *T = HW_TIMER[id];
    printk("[hw_timer %u]%s%s clksource: %s timer12 %s timer34 %s\n", id,
            T->emumgt_clkspd.Bits.free ? " free" : "",
            T->emumgt_clkspd.Bits.soft ? " soft" : "",
            T->tcr.Bits.clksrc ? "1" : "0",
            T->tgcr.Bits.unreset12 ? "go" : "reset", 
            T->tgcr.Bits.unreset34 ? "go" : "reset"
            );

    printk("\ttimer mode %x psc34 %x tddr34 %x\n", T->tgcr.Bits.timmode, T->tgcr.Bits.psc34, T->tgcr.Bits.tddr34);

    if(T->tcr.Bits.enable12)
        printk("\tenable: %x count12: 0x%08x period12: 0x%08x\n", T->tcr.Bits.enable12, T->tim12, T->prd12);
    if(T->tcr.Bits.enable34)
        printk("\tenable: %x count34: 0x%08x period34: 0x%08x\n", T->tcr.Bits.enable34, T->tim34, T->prd34);

    if(id == 2)
        printk("\twatchdog: %s flag: %s\n", 
                T->wdtcr.Bits.wdt_enable ? "enabled" : "disabled",
                T->wdtcr.Bits.wdt_flag ? "set" : "unset");
}

char *irq_names[] = {
    "vdint0",
    "vdint1",
    "vdint2",
    "histnt",
    "h3aint",
    "prvuint",
    "rszint",
    "reserved 7",
    "vencint",
    "asqint",
    "imxint",
    "vlcdint",
    "reserved 12",
    "emacint",
    "reserved 14",
    "reserved 15",
    "edma3cc_int0",
    "edma3cc_errint",
    "edma3cc_errint0",
    "edma3cc_errint1",
    "pscint",
    "reserved 21",
    "ideint",
    "reserved 23",
    "aspxint",
    "asprint",
    "mmcint",
    "sdioint",
    "reserved 28",
    "ddrint",
    "emifaint",
    "vlqint",
    "tint0",
    "tint1",
    "tint2",
    "tint3",
    "pwmint0",
    "pwmint1",
    "pwmint2",
    "i2cint",
    "uartint0",
    "uartint1",
    "uartint2",
    "spint0",
    "spint1",
    "reserved 45",
    "dsp2arm0",
    "dsp2arm1",
    "gpio0",
    "gpio1",
    "gpio2",
    "gpio3",
    "gpio4",
    "gpio5",
    "gpio6",
    "gpio7",
    "gpiobnk0",
    "gpiobnk1",
    "gpiobnk2",
    "gpiobnk3",
    "gpiobnk4",
    "commtx",
    "commrx",
    "emuint"
};

void print_irq_names(unsigned int r1, unsigned int r2) {
    unsigned int i;
    for(i = 0 ; i < 32 ; i++) {
        if(r1 & (1 << i))
            printk(" %s", irq_names[i]);
    }
    for(i = 0 ; i < 32 ; i++) {
        if(r2 & (1 << i))
            printk(" %s", irq_names[32 + i]);
    }
}

/*------------------------------------------------------------------------------------------*\
\*------------------------------------------------------------------------------------------*/
void debug_show_irq(void) {
    /*--- int i; ---*/
//    printk("[hw_irq] fiq0 0x%x", HW_IRQ->fiq0);	/* 0x0 */
//    printk(" fiq1 0x%x", HW_IRQ->fiq1);	/* 0x4 */
//    print_irq_names(HW_IRQ->fiq0, HW_IRQ->fiq1);	
//    printk("\n");

//    printk("[hw_irq] irq0 0x%x", HW_IRQ->irq0);	/* 0x8 */
//    printk(" irq1 0x%x", HW_IRQ->irq1);	/* 0xC */
//    print_irq_names(HW_IRQ->irq0, HW_IRQ->irq1);	
//    printk("\n");

    printk("[hw_irq] fiqentry 0x%x", HW_IRQ->fiqentry);	/* 0x10 */
    printk(" irqentry 0x%x\n", HW_IRQ->irqentry);	/* 0x14 */

    printk("[hw_irq] eint0: 0x%x ", HW_IRQ->eint0);	/* 0x18 */
    printk(" eint1: 0x%x (", HW_IRQ->eint1);	/* 0x1C */
    print_irq_names(HW_IRQ->eint0, HW_IRQ->eint1);	
    printk(")\n");

    printk("[hw_irq] inctl 0x%x\n", HW_IRQ->inctl);	/* 0x20 */
    printk("[hw_irq] eabase 0x%x\n", HW_IRQ->eabase);	/* 0x24 */
    printk("[hw_irq] intpri0 0x%x\n", HW_IRQ->intpri0);	/* 0x30 */
    printk("[hw_irq] intpri1 0x%x\n", HW_IRQ->intpri1);	/* 0x34 */
    printk("[hw_irq] intpri2 0x%x\n", HW_IRQ->intpri2);	/* 0x38 */
    printk("[hw_irq] intpri3 0x%x\n", HW_IRQ->intpri3);	/* 0x3C */
    printk("[hw_irq] intpri4 0x%x\n", HW_IRQ->intpri4);	/* 0x30 */
    printk("[hw_irq] intpri5 0x%x\n", HW_IRQ->intpri5);	/* 0x34 */
    printk("[hw_irq] intpri6 0x%x\n", HW_IRQ->intpri6);	/* 0x38 */
    printk("[hw_irq] intpri7 0x%x\n", HW_IRQ->intpri7);	/* 0x3C */

#if 0
    for(i = 0 ; i < 0x30 ; i++)
        /*--- printk("[0x%x] 0x%x\n", i, *(unsigned int *)IRAM_ADDRESS(IRAM_PHYS + i)); ---*/
        printk("[0x%x] 0x%x\n", i, *(unsigned int *)(IRAM_VIRT + i));
    for(i = 0x100 ; i < 0x130 ; i++)
        /*--- printk("[0x%x] 0x%x\n", i, *(unsigned int *)IRAM_ADDRESS(IRAM_PHYS + i)); ---*/
        printk("[0x%x] 0x%x\n", i, *(unsigned int *)(IRAM_VIRT + i));
#endif
}

/*------------------------------------------------------------------------------------------*\
\*------------------------------------------------------------------------------------------*/
#if 0
unsigned int debug_read_physical_addr(unsigned int virt) {
    unsigned int ptr;
    unsigned int level1, level2;
    ptr = (unsigned int *)(((virt >> 20) << 2) | (unsigned int)swapper_pg_dir);
    level1 = *ptr;
    switch(level1 & 0x03) {
        case 0: /* fault */
            printk("[debug_read_physical_addr] 0x%08x --> FAULT\n", virt);
            return 0;
        case 1: /* Coarse page table */
            break;
        case 2: /* Section */
            return ((level1 >> 20) << 20) | (virt & ((1 << 20) - 1));
            break;
        case 3: /* fine page table */
            level2 = ((level1 >> 12) << 12);
            level2 |= ((virt >> 10) & ((1 << 10) - 1)) << 2;
            ptr = (unsigned int *)level2;
            level2 = *ptr;
            break;
    }
}
#endif


/*------------------------------------------------------------------------------------------*\
\*------------------------------------------------------------------------------------------*/
void debug_print_mmu(void) {
    printk("[debug_print_mmu] swapper_pg_dir = 0x%p\n", swapper_pg_dir);
    printk("[debug_print_mmu] *swapper_pg_dir = 0x%x\n", *(unsigned int *)swapper_pg_dir);
}

/*------------------------------------------------------------------------------------------*\
\*------------------------------------------------------------------------------------------*/
void debug_show_system_regs(void) {
    printk("[hw_system_regs] pinmux0 0x%08x pinmux1 0x%08x\n",
            HW_SYSTEM->pinmux0.Reg, HW_SYSTEM->pinmux1.Reg);
}

char *power_down_names[] = {
    "LPSC_VPSSMSTR",
    "LPSC_VPSSSLV",
    "LPSC_TPCC",
    "LPSC_TPTC0",
    "LPSC_TPTC1",
    "LPSC_EMAC",
    "LPSC_EMAC_WRAPPER",
    "LPSC_MDIO",
    "LPSC_IEEE1394",
    "LPSC_USB",
    "LPSC_ATA",
    "LPSC_VLYNQ",
    "LPSC_UHPI",
    "LPSC_DDR_EMIF",
    "LPSC_AEMIF",
    "LPSC_MMC_SD",
    "LPSC_MEMSTICK",
    "LPSC_McBSP",
    "LPSC_I2C",
    "LPSC_UART0",
    "LPSC_UART1",
    "LPSC_UART2",
    "LPSC_SPI",
    "LPSC_PWM0",
    "LPSC_PWM1",
    "LPSC_PWM2",
    "LPSC_GPIO",
    "LPSC_TIMER0",
    "LPSC_TIMER1",
    "LPSC_TIMER2",
    "LPSC_SYSTEM_SUBSYS",
    "LPSC_ARM",
    "LPSC_SCR2",
    "LPSC_SCR3",
    "LPSC_SCR4",
    "LPSC_CROSSBAR",
    "LPSC_CFG27",
    "LPSC_CFG3",
    "LPSC_CFG5",
    "LPSC_GEM",
    "LPSC_IMCOP"
};

/*------------------------------------------------------------------------------------------*\
\*------------------------------------------------------------------------------------------*/
void debug_show_psc(void) {
    unsigned int i;
    char *state_name[] = {
        "software reset disable state",
        "sync reset",
        "disable",
        "enable",
        "transition"
        "state5",
        "state6",
        "state7",
        "state8",
        "state9",
        "state10",
        "state11",
        "state12",
        "state13",
        "state14",
        "state15",
        "state16",
        "state17",
        "state18",
        "state19",
        "state20",
        "state21",
        "state22",
        "state23",
        "state24",
        "state25",
        "state26",
        "state27",
        "state28",
        "state29",
        "state30",
        "state31"
    };
    unsigned state;
    printk("[hw_psc] enabled: \n");
    for(i = 0 ; i < 41 ; i++) {
        state = HW_POWER->mdstat[i] & ((1 << 5) - 1);
        printk("\t%s: %s\n", power_down_names[i], state_name[state]);
    }
}

/*------------------------------------------------------------------------------------------*\
\*------------------------------------------------------------------------------------------*/
#define io_to_virt(a)       ((a) - io_phys + io_virt)
void debug_init(unsigned int io_virt, unsigned int io_phys) {
    printk("[debug_init]: io_virt 0x%08x io_phys 0x%08x\n", io_virt, io_phys);

    HW_SYSTEM = (struct system_regs *)io_to_virt(SYSTEM_BASE);
    HW_TIMER[0]  = (struct davinci_hw_timer *)io_to_virt(TIMER0_BASE);
    HW_TIMER[1]  = (struct davinci_hw_timer *)io_to_virt(TIMER1_BASE);
    HW_TIMER[2]  = (struct davinci_hw_timer *)io_to_virt(TIMER2_BASE);
    HW_IRQ       = (struct intc_registers_t *)io_to_virt(INTERRUPT_BASE);
    HW_POWER     = (struct _hw_psc *)io_to_virt(PSC_BASE);

    printk("[debug_init]: HW_SYSTEM: 0x%08x\n", (unsigned int)HW_SYSTEM);
    printk("[debug_init]: HW_TIMER: 0x%08x 0x%08x 0x%08x\n", (unsigned int)HW_TIMER[0], (unsigned int)HW_TIMER[1], (unsigned int)HW_TIMER[2] );
    printk("[debug_init]: HW_IRQ: 0x%08x\n", (unsigned int)HW_IRQ);
    printk("[debug_init]: HW_POWER: 0x%08x\n", (unsigned int)HW_POWER);

}