#ifndef __PFORM_CFG_H__
#define __PFORM_CFG_H__

#include <linux/config.h>
#include <linux/module.h>

#include <soc.h>

#if defined(CONFIG_MIPS_SANGAM)
#include <asm/mach-avalanche/sangam/sangam.h>
#include <asm/mach-avalanche/sangam/sangam_clk_cntl.h>
#include <asm/mach-avalanche/sangam/sangam_boards.h>
#endif


#if defined(CONFIG_MIPS_APEX)
#include <asm/mach-avalanche/apex/apex.h>
#include <asm/mach-avalanche/apex/apex_clk_cntl.h>
#include <asm/mach-avalanche/apex/apex_boards.h>
#endif


#if defined(CONFIG_MIPS_TITAN)
#include <asm/mach-avalanche/titan/titan.h>
#include <asm/mach-avalanche/titan/titan_clk_cntl.h>
#include <asm/mach-avalanche/titan/titan_boards.h>
#endif

#if defined(CONFIG_MIPS_PUMAS)
#include <asm/mach-avalanche/puma-s/puma-s.h>
#include <asm/mach-avalanche/puma-s/puma-s_clk_cntl.h>
#include <asm/mach-avalanche/puma-s/puma-s_boards.h>
#endif

#if defined(CONFIG_MIPS_YAMUNA)
#include <yamuna.h>
#include <yamuna_clk_cntl.h>
#include <yamuna_boards.h>
#include <yamuna_pci.h>
#include <yamuna_spi.h>
#endif

#if defined(CONFIG_MIPS_AVALANCHE_INTC)
#include <avalanche_intc.h>
#endif

#if defined(CONFIG_MIPS_AVALANCHE_PCI)
#include <avalanche_pci.h>
#endif

#if defined(CONFIG_MIPS_AVALANCHE_QUICK_IIC)
#include <avalanche_i2c.h>
#endif

#include <haltypes.h>

/*! TODO(boto): move this define to the global configuration file! */
#undef CONFIG_MIPS_AVALANCHE_COLORED_LED

#if defined(CONFIG_MIPS_AVALANCHE_LED)
/*! NOTE(boto): fixed the header paths */
//#include <led_ioctl.h>
//#include <led_config.h>
//#include <led_hal.h>
#include <asm/mach-ur8/led_ioctl.h>
#include <asm/mach-ur8/led_config.h>
#include <asm/mach-ur8/led_hal.h>
#endif

#if defined(CONFIG_MIPS_AVALANCHE_COLORED_LED)
#include <led_hal.h>
#endif

#if defined(CONFIG_DMA_NONCOHERENT)
#ifdef CONFIG_K0_COHERENCY_ALGO_WT_WA
#define MIPS_4KC
#else
#define MIPS_4KEC
#endif
#endif

#if !defined(CONFIG_CPU_LITTLE_ENDIAN)
#define PAL_NATIVE_ENDIAN_BIG
#endif


#if !defined(CONFIG_DMA_NONCOHERENT) && !defined(CONFIG_MIPS_UNCACHED)
#error "Error in MIPS cache configuration. PAL SYS cache APIs will not work."
#endif

#endif /* __PFORM_CFG_H__ */