/******************************************************************************* **+--------------------------------------------------------------------------+** **| **** |** **| **** |** **| ******o*** |** **| ********_///_**** |** **| ***** /_//_/ **** |** **| ** ** (__/ **** |** **| ********* |** **| **** |** **| *** |** **| |** **| Copyright (c) 1998-2006 Texas Instruments Incorporated |** **| ALL RIGHTS RESERVED |** **| |** **+--------------------------------------------------------------------------+** *******************************************************************************/ /** \file ddc_cpsarDrv.h \brief CPSAR DDC internal header file This file contains data structures and interfaces internal to CPSAR specific DDC implementation. This file is compliant to the PSP Framework 1.0 definitions and prototypes. @author Greg Guyotte 10/31/2006 AV Modified the cpsarTxPktProcess and cpsarRxPktProcess APIs to return the packets serviced. 11/13/2006 JP Defined Bugfix and BuildNum Version Strings 01/09/2007 EP Added one counter for multiple BD recycling. */ #ifndef __DDC_CPSAR_DRV_H__ #define __DDC_CPSAR_DRV_H__ /* *This file will be included ONLY by ALL CPSAR DDC "implementation" files and * hence must define CPSAR_DDC macro to get the right definition of CpsarDDCObj */ #define CPSAR_DDC #define CPSAR_DDC_GETSTATS /** * \defgroup CPSAR_DDC_Internal CPSAR DDC Internal * * CPSAR DDC Layer Internal Data Structures/Functions */ /*@{*/ /* Required for hiding internal object name behind the public name */ //typedef struct _CpsarDDCObj_t CpsarDDCObj; #include "ddc_cpsar.h" /* DDC CPSAR Interface */ #define MAX_RX_FRAGS 1 /** * \brief CPSAR DDC Debug flags * * The makefile must #define CPSAR_DDC_DEBUG in order to enable debug. * IMPORTANT NOTE: The debug flags need to be enabled carefully as it could * flood the console/sink point of the debug traces and also affect the * functionality of the overall system */ #define CPSAR_DEBUG_FUNCTION_ENTRY (0x1 << 1) #define CPSAR_DEBUG_FUNCTION_EXIT (0x1 << 2) #define CPSAR_DEBUG_BUSY_FUNCTION_ENTRY (0x1 << 3) #define CPSAR_DEBUG_BUSY_FUNCTION_EXIT (0x1 << 4) #define CPSAR_DEBUG_TX (0x1 << 6) #define CPSAR_DEBUG_RX (0x1 << 7) #define CPSAR_DEBUG_PORT_UPDATE (0x1 << 8) #define CPSAR_DEBUG_TEARDOWN (0x1 << 9) /* CPSAR Rx Error Defines */ #define CPSAR_RX_ERR_CRC 0 #define CPSAR_RX_ERR_LENGTH 1 #define CPSAR_RX_ERR_ABORT 2 #ifdef CPSAR_DDC_DEBUG #define LOGERR(format, args...) hDDC->ddaIf->ddaErrLog(format, ##args); #define LOGMSG(flag, format, args... ) { if (flag & CpsarDDCDebug) hDDC->ddaIf->ddaPrintf(format, ## args); } #else #define LOGERR(format, args...) #define LOGMSG(flag, format, args... ) #endif /* Version macro */ #define CPSAR_DDC_MAJOR_VERSION 0 #define CPSAR_DDC_MINOR_VERSION 3 #define CPSAR_DDC_BUGFIX_VERSION 1 #define CPSAR_DDC_BUILD_VERSION 00 //const char CpsarDDCVersionString[] = "CPSAR DDC version 0.1"; //AV_SM_CPPI typedef volatile struct { /* hardware descriptor fields from this point */ Int32 nextPktPtr; /**< next (hardware) packet pointer */ Int32 tags; /**< Source tag (31:16), Dest Tag (15:0) */ Int32 pktInfo; /**< Pkt type, error, proto specific fields, pkt len */ Int32 buf0Ptr; /**< Buffer pointer (buffer 0) */ Int32 off_bLen; /**< Buffer 0 offset (31:16), buffer 0 length (15:0) */ Ptr nextBDPtr; /**< Pointer to the next buffer descriptor */ Int32 dummy[4]; /**< required for cache alignment to 16-byte boundary*/ /* software only fields from this point */ Ptr nextSwBDPtr; Ptr dataPtr; /**< DataPtr (virtual address) of the buffer allocated */ Ptr bufToken; /**< Placeholder for a pointer to a token */ Ptr txEopBD; /**< Pointer to end of packet BD (used on TX int) */ Ptr pktToken; /**< Used to store a packet token on Send */ Uint32 numFrags; } Cppi4BD; typedef struct { Char *bdMemPtr; /**< Pointer to descriptor block */ Uint32 bdMemSize; /**< Size of descriptor block */ Uint32 numBd; /**< Number of descriptors in block */ struct BdMemChunk *ptrNext; /**< Pointer to next mem chunk */ }BdMemChunk; /* Forward declaration */ //typedef struct _CpsarRxCppiCh_t CpsarRxCppiCh; /** * \brief TX Channel Control Structure * * Used by CPSAR DDC code to process TX Buffer Descriptors */ typedef struct { /** Configuration info */ CpsarChInfo chInfo; /**< Channel config/info */ /* CPPI specific */ unsigned int allocSize; /**< Tx BD pool allocated memory size */ unsigned char *bdMem; /**< Tx BD Memory pointer */ Cppi4BD *bdPoolHead; /**< Free BD Pool Head */ #ifdef CPSAR_DDC_GETSTATS unsigned int outOfTxBD; /**< out of tx bd errors */ #endif void * cppi4TxChHnd; /**< CPPI4 Tx PAL Handle */ Cppi4BD * savedBD; /**< CPPI4 Tx last unprocessed BD. */ } CpsarTxCppiCh; /** * \brief RX Channel Control Structure * * Used by CPSAR DDC code to process RX Buffer Descriptors */ typedef struct { CpsarChInfo chInfo; /**< Channel config/info */ DDC_NetPktObj *pktQueue; /**< Array of NetPktObj for encapsulating received packet data and sending to DDA */ DDC_NetBufObj *bufQueue; /**< Array of NetBufObj for storing buffer information, part of NetPktObj */ unsigned int *rxBufferPtr; /**< Array of buffer pointers, used to store replacement buffer addresses during rx packet processing */ unsigned int *rxDataToken; /**< Array of token pointers, used to store replacement token addresses during rx packet processing */ #ifdef CPSAR_DDC_GETSTATS unsigned int outOfRxBuffers; /**< NO buffers available */ unsigned int rxCrcErrors; /**< Number of CRC errors */ unsigned int rxLengthErrors; /**< Number of Length errors (AAL5 packets > 1366 cells) */ unsigned int rxAbortErrors; /**< Number of Abort errors (AAL5 packets with 0 packet length) */ unsigned int rxMultiBDs; #endif void * cppi4RxChHnd; /**< CPPI4 Rx PAL Handle */ Cppi4BD * savedBD; /**< CPPI4 Rx last unprocessed BD. */ BdMemChunk *MemChunk; BdMemChunk *BdMemList; /**< Pointer to linked list of memory chunk structs */ } CpsarRxCppiCh; /** * \brief CPSAR DDC object * * CPSAR DDC layer Object - encapsulates all bookeeping and data structure for * CPSAR DDC */ typedef struct { /** DDC generic parameters */ unsigned int versionId; /**< Version Id */ unsigned int instId; /**< Instance id/number */ DDC_DriverState state; /**< DDC State */ DDA_Handle hDDA; /**< DDA Handle */ /** CPSAR specific parameters - DDC device specifics */ void * cppi4PAL; /**< CPPI4 PAL Handle */ CpsarInitConfig initCfg; /**< Initialization Configuration */ CpsarTxCppiCh txCppi[CPSAR_MAX_TX_CHANNELS]; /**< Tx Control structure pointers */ CpsarRxCppiCh rxCppi[CPSAR_MAX_RX_CHANNELS]; /**< Rx Control structure pointers */ unsigned int txIsCreated; /**< TX Channel created ? */ unsigned int rxIsCreated; /**< RX Channel created ? */ unsigned int txIsOpen; /**< TX channel opened ? */ unsigned int rxIsOpen; /**< RX channel opened ? */ unsigned int txTeardownPending; /**< IS TX Teardown pending ? */ unsigned int rxTeardownPending; /**< IS RX Teardown pending ? */ unsigned int txIntLine[CPPI4_NUM_TX_POP_QUEUES]; /**< Tx interrupt line number */ unsigned int rxIntLine[CPPI4_NUM_RX_POP_QUEUES]; /**< Rx interrupt line number */ unsigned int txIntLineCount[CPPI4_NUM_TX_POP_QUEUES]; /**< Number of channels using a given Tx pop queue */ unsigned int rxIntLineCount[CPPI4_NUM_RX_POP_QUEUES]; /**< Number of channels using a given Rx pop queue */ CSL_SarRegsOvly regs; /**< Pointer points to CPSAR Base address */ CSL_ScratchpadRegsOvly scratchpad_regs; /**< Pointer to scratchpad registers */ #ifdef CPSAR_DDC_GETSTATS unsigned int rxIntCount[CPPI4_NUM_RX_POP_QUEUES]; /**< # of times CpsarRxBDProc called */ unsigned int txIntCount[CPPI4_NUM_TX_POP_QUEUES]; /**< # of times CpsarTxBDProc called */ unsigned int rxEmptyIntCount[CPPI4_NUM_RX_POP_QUEUES]; /**< # of interrupts with nothing to do */ unsigned int txEmptyIntCount[CPPI4_NUM_TX_POP_QUEUES]; /**< # of interrupts with nothing to do */ #endif } CpsarDDCObj; /* Function prototypes */ int DDC_cpsarSend(CpsarDDCObj *hDDC, DDC_NetPktObj *pkt, int channel, void * sendArgs); int cpsarTxPktProcess (CpsarDDCObj *hDDC, int channel, int pktsTobeProc, int * pktsDone); int cpsarRxPktProcess (CpsarDDCObj *hDDC, int channel, int pktsTobeProc, int * pktsDone); int cpsarTxBDProc(CpsarDDCObj *hDDC, unsigned int ch, int pktsToProcess, Bool *isEOQ); int cpsarRxBDProc(CpsarDDCObj *hDDC, unsigned int ch, int pktsToProcess, Bool *isEOQ); /** * \brief DDC_CpsarTxPktProcess * * DDA calls the packet packet processing function when the device interrupt is * pending. DDA typically calls this function in a thread context. * * @param hDDC DDC Handle * @param channel Interrupt channel number * @param pktsPending Not currently used. * @param pktArgs Not currently used. * @return Number of packets processed */ typedef int (*DDC_CpsarTxPktProcess) ( CpsarDDCObj *hDDC, int channel, int *pktsPending, void * pktArgs); /*@}*/ #endif /* __DDC_CPSAR_DRV_H__ */