--- zzzz-none-000/linux-2.6.13.1/include/asm-mips/serial.h	2005-09-10 02:42:58.000000000 +0000
+++ ohio-7170-487/linux-2.6.13.1/include/asm-mips/serial.h	2006-11-06 16:02:03.000000000 +0000
@@ -330,6 +330,43 @@
 #define DDB5477_SERIAL_PORT_DEFNS
 #endif
 
+#if defined(CONFIG_MIPS_OHIO)
+#include <asm/mips-boards/ohio.h>
+#include <asm/mips-boards/ohioint.h>
+#define MIPS_OHIO_SERIAL_PORT_DEFNS \
+        {   .baud_base = OHIO_BASE_BAUD, \
+            .irq = OHIOINT_UART0, \
+            .iomem_base =  (u8*)OHIO_UART0_BASE, \
+            .iomem_reg_shift = 2, \
+            .flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST, \
+            .io_type = UPIO_MEM \
+        },
+#elif defined(CONFIG_MIPS_AR7)
+#include <asm/mips-boards/ar7.h>
+#include <asm/mips-boards/ar7int.h>
+#define MIPS_AR7_SERIAL_PORT_DEFNS \
+        {   .baud_base = AR7_BASE_BAUD, \
+            .irq = AR7INT_UART0, \
+            .iomem_base =  (u8*)AR7_UART0_BASE, \
+            .iomem_reg_shift = 2, \
+            .flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST, \
+            .io_type = UPIO_MEM \
+        },
+#elif defined(CONFIG_MIPS_UR8)
+#include <asm/mips-boards/ur8.h>
+#include <asm/mips-boards/ur8int.h>
+#define MIPS_UR8_SERIAL_PORT_DEFNS \
+        {   .baud_base = UR8_BASE_BAUD, \
+            .irq = UR8INT_UART0, \
+            .iomem_base =  (u8*)UR8_UART0_BASE, \
+            .iomem_reg_shift = 2, \
+            .flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST, \
+            .io_type = UPIO_MEM \
+        },
+#else
+#define MIPS_OHIO_SERIAL_PORT_DEFNS
+#endif
+
 #ifdef CONFIG_SGI_IP32
 /*
  * The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory
@@ -341,20 +378,61 @@
 #define IP32_SERIAL_PORT_DEFNS
 #endif /* CONFIG_SGI_IP32 */
 
+#if defined(CONFIG_MIPS_OHIO)
+#define SERIAL_PORT_DFNS				\
+	COBALT_SERIAL_PORT_DEFNS			\
+	DDB5477_SERIAL_PORT_DEFNS			\
+	EV96100_SERIAL_PORT_DEFNS			\
+	IP32_SERIAL_PORT_DEFNS              \
+	ITE_SERIAL_PORT_DEFNS          		\
+	IVR_SERIAL_PORT_DEFNS          		\
+	JAZZ_SERIAL_PORT_DEFNS				\
+	STD_SERIAL_PORT_DEFNS				\
+	MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS		\
+	MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS		\
+	MOMENCO_OCELOT_SERIAL_PORT_DEFNS		\
+	MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS		\
+	TXX927_SERIAL_PORT_DEFNS    \
+	AU1000_SERIAL_PORT_DEFNS    \
+    MIPS_OHIO_SERIAL_PORT_DEFNS
+#endif /*--- #if defined(CONFIG_MIPS_OHIO) ---*/
+
+#if defined(CONFIG_MIPS_AR7)
+#define SERIAL_PORT_DFNS				\
+	COBALT_SERIAL_PORT_DEFNS			\
+	DDB5477_SERIAL_PORT_DEFNS			\
+	EV96100_SERIAL_PORT_DEFNS			\
+	IP32_SERIAL_PORT_DEFNS              \
+	ITE_SERIAL_PORT_DEFNS          		\
+	IVR_SERIAL_PORT_DEFNS          		\
+	JAZZ_SERIAL_PORT_DEFNS				\
+	STD_SERIAL_PORT_DEFNS				\
+	MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS		\
+	MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS		\
+	MOMENCO_OCELOT_SERIAL_PORT_DEFNS		\
+	MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS		\
+	TXX927_SERIAL_PORT_DEFNS    \
+	AU1000_SERIAL_PORT_DEFNS    \
+    MIPS_AR7_SERIAL_PORT_DEFNS
+#endif /*--- #if defined(CONFIG_MIPS_AR7) ---*/
+
+#if defined(CONFIG_MIPS_UR8)
 #define SERIAL_PORT_DFNS				\
 	COBALT_SERIAL_PORT_DEFNS			\
 	DDB5477_SERIAL_PORT_DEFNS			\
 	EV96100_SERIAL_PORT_DEFNS			\
-	IP32_SERIAL_PORT_DEFNS                          \
-	ITE_SERIAL_PORT_DEFNS           		\
-	IVR_SERIAL_PORT_DEFNS           		\
+	IP32_SERIAL_PORT_DEFNS              \
+	ITE_SERIAL_PORT_DEFNS          		\
+	IVR_SERIAL_PORT_DEFNS          		\
 	JAZZ_SERIAL_PORT_DEFNS				\
 	STD_SERIAL_PORT_DEFNS				\
 	MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS		\
 	MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS		\
 	MOMENCO_OCELOT_SERIAL_PORT_DEFNS		\
 	MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS		\
-	TXX927_SERIAL_PORT_DEFNS                        \
-	AU1000_SERIAL_PORT_DEFNS
+	TXX927_SERIAL_PORT_DEFNS    \
+	AU1000_SERIAL_PORT_DEFNS    \
+    MIPS_UR8_SERIAL_PORT_DEFNS
+#endif /*--- #if defined(CONFIG_MIPS_UR8) ---*/
 
 #endif /* _ASM_SERIAL_H */