#ifndef __hw_timer_h__
#define __hw_timer_h__

#include <mach/hardware.h>

#define BIG_ENDIAN

#define PUMA_TIMER0_BASE      IO_ADDRESS(0x8610B00)
#define PUMA_TIMER1_BASE      IO_ADDRESS(0x8610C00)
#define PUMA_TIMER2_BASE      IO_ADDRESS(0x8610D00)
#define PUMA_WDT_BASE         IO_ADDRESS(0x8611F00)

struct _timer_hw {
    union __timer_control {
        volatile unsigned int reg;
        volatile struct _timer_control {
#ifdef LITTLE_ENDIAN
            unsigned int go : 1;
            unsigned int mode : 1;
            unsigned int prescale : 4;
            unsigned int reserved1 : 9;
            unsigned int prescale_enable : 1;
            unsigned int reserved2 : 16;
#endif/*--- #ifdef LITTLE_ENDIAN ---*/
#ifdef BIG_ENDIAN
            unsigned int reserved2 : 16;
            unsigned int prescale_enable : 1;
            unsigned int reserved1 : 9;
            unsigned int prescale : 4;
            unsigned int mode : 1;
            unsigned int go : 1;
#endif/*--- #ifdef BIG_ENDIAN ---*/
        } Bits;
    } timer_control;
    volatile unsigned int timer_load_reg;
    volatile unsigned int timer_value_reg;
    volatile unsigned int timer_interrupt_reg;
};

#endif/*--- #ifndef __hw_timer_h__ ---*/