/******************************************************************************
**
** FILE NAME    : ifxmips_pmon_reg.h
** PROJECT      : IFX UEIP
** MODULES      : PMON
**
** DATE         : 21 July 2009
** AUTHOR       : Lei Chuanhua
** DESCRIPTION  : IFX Performance Monitor
** COPYRIGHT    :       Copyright (c) 2009
**                      Infineon Technologies AG
**                      Am Campeon 1-12, 85579 Neubiberg, Germany
**
**    This program is free software; you can redistribute it and/or modify
**    it under the terms of the GNU General Public License as published by
**    the Free Software Foundation; either version 2 of the License, or
**    (at your option) any later version.
**
** HISTORY
** $Date        $Author         $Comment
** 21 July 2009  Lei Chuanhua    The first UEIP release
*******************************************************************************/
/*!
  \file ifxmips_pmon_reg.h
  \ingroup IFX_PMON
  \brief ifx pmon driver register definition
*/
#ifndef IFXMIPS_PMON_REG_H
#define IFXMIPS_PMON_REG_H

#define IFX_PMON_PHY_BASE    0x1F700400
#define IFX_PMON_VIRT_BASE  (IFX_PMON_PHY_BASE | KSEG1)
#define IFX_PMON_SIZE        256

#define IFX_PMON_PCEESCR0    ((volatile u32 *)(IFX_PMON_VIRT_BASE + 0x00))
#define IFX_PMON_PCEESCR1    ((volatile u32 *)(IFX_PMON_VIRT_BASE + 0x08))
#define IFX_PMON_PCEESCR2    ((volatile u32 *)(IFX_PMON_VIRT_BASE + 0x10))
#define IFX_PMON_PCEESCR3    ((volatile u32 *)(IFX_PMON_VIRT_BASE + 0x18))

/* Quick access */
#define IFX_PMON_PCEESCR(x)  ((volatile u32 *)(IFX_PMON_VIRT_BASE + ((x) << 3)))


#define IFX_PMON_EVENT_MASK                         0x1F

#define IFX_PMON_IS_DDR_EVENT(_x) ((_x) >= IFX_PMON_EVENT_DDR_READ && (_x) <= IFX_PMON_EVENT_DDR_EIGHT_WORD_64BIT_WIRTE)

#define IFX_PMON_IS_AHB_EVENT(_x) ((_x) >= IFX_PMON_EVENT_AHB_READ_CYCLES && (_x) <= IFX_PMON_EVENT_AHB_WRITE_CPT)

#define IFX_PMON_IS_DMA_EVENT(_x) ((_x) >= IFX_PMON_EVENT_DMA_RX_BLOCK_CNT && (_x) <= IFX_PMON_EVENT_DMA_TX_BLOCK_CNT)

    
/* Performance Monitoring Interface */
#define IFX_PMON_PMICR       ((volatile u32 *)(IFX_PMON_VIRT_BASE + 0x30))

#define IFX_PMON_DDR_EN      0x00000001
#define IFX_PMON_DMA_EN      0x00000002
#define IFX_PMON_AHB_EN      0x00000004

#define IFX_PMON_PMI_ALL     (IFX_PMON_DDR_EN | IFX_PMON_DMA_EN | IFX_PMON_AHB_EN)

#endif /* IFXMIPS_PMON_REG_H */