--- zzzz-none-000/linux-2.6.28.10/arch/arm/mm/Kconfig	2009-05-02 18:54:43.000000000 +0000
+++ puma5-6360-529/linux-2.6.28.10/arch/arm/mm/Kconfig	2009-01-08 16:06:36.000000000 +0000
@@ -315,6 +315,27 @@
 	  Say Y if you want support for the ARM1026EJ-S processor.
 	  Otherwise, say N.
 
+# ARM1176ZJ-S
+config CPU_ARM11176
+	bool "Support ARM1176ZJ-S processor"
+    select CPU_32
+    select CPU_V6
+    select CPU_32v6K
+    select CPU_32v6
+    select CPU_ABRT_EV6
+    select CPU_CACHE_V6
+    select CPU_CACHE_VIPT
+    select CPU_COPY_V6
+    select CPU_TLB_V6
+    select CPU_CP15
+    select CPU_CP15_MMU
+	help
+	  The ARM1026EJ-S is an implementation of the ARMv5TEJ architecture
+	  based upon the ARM10 integer core.
+
+	  Say Y if you want support for the ARM1026EJ-S processor.
+	  Otherwise, say N.
+
 # SA110
 config CPU_SA110
 	bool "Support StrongARM(R) SA-110 processor" if !ARCH_EBSA110 && !FOOTBRIDGE && !ARCH_TBOX && !ARCH_SHARK && !ARCH_NEXUSPCI && ARCH_RPC
@@ -400,7 +421,7 @@
 # ARMv6
 config CPU_V6
 	bool "Support ARM V6 processor"
-	depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176
+	depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || ARCH_PUMA5
 	default y if ARCH_MX3
 	default y if ARCH_MSM
 	select CPU_32v6
@@ -745,7 +766,7 @@
 
 config CACHE_L2X0
 	bool "Enable the L2x0 outer cache controller"
-	depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176
+	depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || ARCH_PUMA5
 	default y
 	select OUTER_CACHE
 	help