--- zzzz-none-000/linux-2.6.28.10/arch/mips/include/asm/mipsregs.h	2009-05-02 18:54:43.000000000 +0000
+++ puma5-6360-529/linux-2.6.28.10/arch/mips/include/asm/mipsregs.h	2010-03-09 12:51:36.000000000 +0000
@@ -790,6 +790,21 @@
 #define read_c0_wired()		__read_32bit_c0_register($6, 0)
 #define write_c0_wired(val)	__write_32bit_c0_register($6, 0, val)
 
+#define read_c0_srsconf0()		__read_32bit_c0_register($6, 1)
+#define write_c0_srsconf0(val)	__write_32bit_c0_register($6, 1, val)
+
+#define read_c0_srsconf1()		__read_32bit_c0_register($6, 2)
+#define write_c0_srsconf1(val)	__write_32bit_c0_register($6, 2, val)
+
+#define read_c0_srsconf2()		__read_32bit_c0_register($6, 3)
+#define write_c0_srsconf2(val)	__write_32bit_c0_register($6, 3, val)
+
+#define read_c0_srsconf3()		__read_32bit_c0_register($6, 4)
+#define write_c0_srsconf3(val)	__write_32bit_c0_register($6, 4, val)
+
+#define read_c0_srsconf4()		__read_32bit_c0_register($6, 5)
+#define write_c0_srsconf4(val)	__write_32bit_c0_register($6, 5, val)
+
 #define read_c0_info()		__read_32bit_c0_register($7, 0)
 
 #define read_c0_cache()		__read_32bit_c0_register($7, 0)	/* TX39xx */