--- zzzz-none-000/linux-2.6.28.10/arch/mips/kernel/cpu-probe.c	2009-05-02 18:54:43.000000000 +0000
+++ puma5-6360-529/linux-2.6.28.10/arch/mips/kernel/cpu-probe.c	2010-12-15 12:24:37.000000000 +0000
@@ -23,6 +23,10 @@
 #include <asm/system.h>
 #include <asm/watch.h>
 
+#ifdef CONFIG_MACH_FUSIV_MIPS1
+#include <adi6843.h>
+#endif
+
 /*
  * Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
  * the implementation of the "wait" feature differs between CPU families. This
@@ -164,9 +168,14 @@
 	case CPU_24K:
 	case CPU_34K:
 	case CPU_1004K:
-		cpu_wait = r4k_wait;
-		if (read_c0_config7() & MIPS_CONF7_WII)
-			cpu_wait = r4k_wait_irqoff;
+        if(cpu_wait == NULL) {
+            if (read_c0_config7() & MIPS_CONF7_WII)
+                cpu_wait = r4k_wait_irqoff;
+            else
+                cpu_wait = r4k_wait;
+        } else {
+            printk(KERN_ERR "[%s] cpu_wait already set up %pF\n", __FUNCTION__, cpu_wait);
+        }
 		break;
 
 	case CPU_74K:
@@ -581,6 +590,17 @@
 			     MIPS_CPU_32FPR;
 		c->tlbsize = 64;
 		break;
+#ifdef CONFIG_MACH_FUSIV_MIPS1
+	case PRID_IMP_FUSIV_MIPS1:
+		/* CPU ID for Fusiv MIPS1 Lexra */ 
+		c->processor_id = (FUSIV_PRID << 16 )| PRID_IMP_FUSIV_MIPS1;
+		__cpu_name[cpu] = "Fusiv MIPS1";
+		c->cputype = CPU_R3000;
+		c->isa_level = MIPS_CPU_ISA_I;
+		c->options = MIPS_CPU_TLB;
+		c->tlbsize = 64;
+		break;
+#endif
 	}
 }