--- zzzz-none-000/linux-2.6.28.10/arch/mips/kernel/irq_cpu.c	2009-05-02 18:54:43.000000000 +0000
+++ puma5-6360-529/linux-2.6.28.10/arch/mips/kernel/irq_cpu.c	2010-03-24 07:28:06.000000000 +0000
@@ -31,6 +31,7 @@
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
 
+#include <irq.h>
 #include <asm/irq_cpu.h>
 #include <asm/mipsregs.h>
 #include <asm/mipsmtregs.h>
@@ -102,6 +103,8 @@
 	int irq_base = MIPS_CPU_IRQ_BASE;
 	int i;
 
+    printk("[%s] irq_base %d\n", __FUNCTION__, irq_base);
+
 	/* Mask interrupts. */
 	clear_c0_status(ST0_IM);
 	clear_c0_cause(CAUSEF_IP);
@@ -111,8 +114,11 @@
 	 * leave them uninitialized for other processors.
 	 */
 	if (cpu_has_mipsmt)
-		for (i = irq_base; i < irq_base + 2; i++)
-			set_irq_chip(i, &mips_mt_cpu_irq_controller);
+		for (i = irq_base; i < irq_base + 2; i++) {
+			/*--- set_irq_chip(i, &mips_mt_cpu_irq_controller); ---*/
+ 			set_irq_chip_and_handler(i, &mips_mt_cpu_irq_controller,
+ 						 handle_percpu_irq);
+        }
 
 	for (i = irq_base + 2; i < irq_base + 8; i++)
 		set_irq_chip_and_handler(i, &mips_cpu_irq_controller,